8D(o   ,Pine H64$2pine64,pine-h64allwinner,sun50i-h6cpus cpu@02arm,cortex-a53arm,armv8=cpuIMpsci[cpu@12arm,cortex-a53arm,armv8=cpuIMpsci[cpu@22arm,cortex-a53arm,armv8=cpuIMpsci[cpu@32arm,cortex-a53arm,armv8=cpuIMpsci[internal-osc-clkc 2fixed-clockp$iosc[osc24M_clkc 2fixed-clockpn6osc24M[osc32k_clkc 2fixed-clockposc32k[pmu2arm,cortex-a53-pmu0psci 2arm,psci-0.2Tsmctimer2arm,armv8-timer0   soc 2simple-bus clock@30010002allwinner,sun50i-h6-ccuI hoscloscioscc[ pinctrl@300b0002allwinner,sun50i-h6-pinctrlI0356; apbhosclosc[ mmc0-pins)PF0PF1PF2PF3PF4PF5.mmc07F[ mmc2-pins5)PC1PC4PC5PC6PC7PC8PC9PC10PC11PC12PC13PC14.mmc27F[ uart0-ph)PH0PH1.uart0[interrupt-controller@3021000 2arm,gic-400 I @ `   [mmc@402000012allwinner,sun50i-h6-mmcallwinner,sun50i-a64-mmcI C @ahbmmcS Zahb #fokay mdefault{   mmc@402100012allwinner,sun50i-h6-mmcallwinner,sun50i-a64-mmcI D AahbmmcS Zahb $ fdisabled mmc@402200032allwinner,sun50i-h6-emmcallwinner,sun50i-a64-emmcI  E BahbmmcS Zahb %fokay mdefault{  serial@50000002snps,dw-apb-uartI  FS fokaymdefault{serial@50004002snps,dw-apb-uartI  GS  fdisabledserial@50008002snps,dw-apb-uartI  HS  fdisabledserial@5000c002snps,dw-apb-uartI   IS  fdisabledclock@70100002allwinner,sun50i-h6-r-ccuI hoscloscioscpll-periphc[interrupt-controller@702100062allwinner,sun50i-h6-r-intcallwinner,sun6i-a31-r-intcI `[pinctrl@70220002allwinner,sun50i-h6-r-pinctrlI ioapbhosclosc[r-i2c)PL0PL1.s_i2c[i2c@70814002allwinner,sun6i-a31-i2cI kSmdefault{fokay pmic@36 2x-powers,axp805x-powers,axp806I6regulatorsaldo12Z.2ZFvcc-plaldo22Z.2Z Fvcc-ac200aldo32Z.2Z Fvcc-3v3-1bldo1w@.w@ Fvcc-bias-pllbldo2w@.w@Fvcc-efuse-pcie-hdmi-io[bldo3w@.w@ Fvcc-dcxoiobldo4cldo12Z.2Z Fvcc-3v3-2[ cldo22Z.2Z Fvcc-wifi-1cldo32Z.2Z Fvcc-wifi-2dcdca \.zFvdd-cpudcdcc \.zFvdd-gpudcdcd.Fvdd-sysdcdceO.O Fvcc-dramswrtc@51 2nxp,pcf8563IQcaliasesU/soc/serial@5000000chosen]serial0:115200n8leds 2gpio-ledsheartbeatipine-h64:green:heartbeatlinkipine-h64:white:linkstatusipine-h64:blue:status interrupt-parent#address-cells#size-cellsmodelcompatibledevice_typeregenable-methodphandle#clock-cellsclock-frequencyclock-accuracyclock-output-namesinterruptsinterrupt-affinityrangesclocksclock-names#reset-cellsgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellspinsfunctiondrive-strengthbias-pull-upresetsreset-namesstatuspinctrl-namespinctrl-0vmmc-supplycd-gpiosbus-widthvqmmc-supplynon-removablecap-mmc-hw-resetreg-shiftreg-io-widthx-powers,self-working-moderegulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-nameserial0stdout-pathlabel