'8('"amd,seattle-overdriveamd,seattle +*7AMD Seattle Development Board (Overdrive)interrupt-controller@e1101000arm,gic-400arm,cortex-a15-gic=R+@c    g ryv2m@e0080000arm,gic-v2m-framec@ytimerarm,armv8-timer0g   pmuarm,armv8-pmuv3`g     smb simple-bus+rclk100mhz_0 fixed-clockadl3clk_100mhzclk375mhz fixed-clockZ ccpclk_375mhzclk333mhz fixed-clock-@sataclk_333mhzyclk500mhz_0 fixed-clockepcieclk_500mhzclk500mhz_1 fixed-clockedmaclk_500mhzclk250mhz_4 fixed-clock沀miscclk_250mhzyclk100mhz_1 fixed-clockuartspiclk_100mhzysata@e0300000snps,dwc-ahcic0 gcsata@e0d00000 disabledsnps,dwc-ahcic gbi2c@e1000000oksnps,designware-i2cc gei2c@e0050000 disabledsnps,designware-i2cc gTserial@e1010000arm,pl011arm,primecellc gHuartclkapb_pclkspi@e1020000okarm,pl022arm,primecellc gJ apb_pclkspi@e1030000okarm,pl022arm,primecellc gI apb_pclk#+sdcard@0 mmc-spi-slotc*1-< H K gQaqgpio@e1040000okarm,pl061arm,primecellc gg=R apb_pclkygpio@e1050000okarm,pl061arm,primecellc=R gf apb_pclkgpio@e0020000 disabledarm,pl061arm,primecellc=R gn apb_pclkgpio@e0030000 disabledarm,pl061arm,primecellc=R gm apb_pclkgpio@e0080000 disabledarm,pl061arm,primecellc=R gi apb_pclkccp@e0100000okamd,ccp-seattle-v1ac gpcie@f0000000pci-host-ecam-generic+Rpcic !"#CTr@@okccn@e8000000 arm,ccn-504c g|kcs@e0010000 disabled ipmi-kcsipmic gchosen/smb/serial@e1010000 compatibleinterrupt-parent#address-cells#size-cellsmodelinterrupt-controller#interrupt-cellsreginterruptsrangesphandlemsi-controllerarm,msi-base-spiarm,msi-num-spisdma-ranges#clock-cellsclock-frequencyclock-output-namesclocksdma-coherentstatusclock-namesspi-controllernum-csspi-max-frequencyvoltage-rangesgpiospl022,hierarchypl022,interfacepl022,com-modepl022,rx-level-trigpl022,tx-level-trig#gpio-cellsgpio-controllerdevice_typebus-rangemsi-parentinterrupt-map-maskinterrupt-mapreg-sizereg-spacingstdout-path