8(|nvidia,p2571nvidia,tegra210 +'7NVIDIA Tegra210 P2571 reference designpcie@1003000nvidia,tegra210-pcie=pci0I08 MpadsaficsWbc bintrmsir b+  FH,pexafipll_ecmlFHJpexafipcie_x disabledpci@1,0=pciI disabled+pci@2,0=pciI disabled+host1x@50000000"nvidia,tegra210-host1xsimple-busIP@WAChost1xhost1x+TTdpaux@54040000nvidia,tegra210-dpauxIT W / dpauxparentdpaux  disabledpinmux-aux dpaux-io"aux+ pinmux-i2c dpaux-io"i2c+ pinmux-off dpaux-io"off+ i2c-bus+vi@54080000nvidia,tegra210-viIT WE disabledtsec@54100000nvidia,tegra210-tsecITdc@54200000nvidia,tegra210-dcIT  WI dcparentdc3dc@54240000nvidia,tegra210-dcIT$ WJ dcparentdc3dsi@54300000nvidia,tegra210-dsiIT00dsilpparent0dsi ? disabled+vic@54340000nvidia,tegra210-vicIT4 WHvicvic nvjpg@54380000nvidia,tegra210-nvjpgIT8 disableddsi@54400000nvidia,tegra210-dsiIT@RdsilpparentRdsi ? disabled+nvdec@54480000nvidia,tegra210-nvdecITH disablednvenc@544c0000nvidia,tegra210-nvencITL disabledtsec@54500000nvidia,tegra210-tsecITP disabledsor@54540000nvidia,tegra210-sorITT WL /sorparentdpsafesorU_ i  sauxi2coff  disabledsor@54580000nvidia,tegra210-sor1ITX WK(/soroutparentdpsafesorU _ i  sauxi2coff  disableddpaux@545c0000nvidia,tegra124-dpauxIT\ W/ dpauxparentdpaux  disabledpinmux-aux dpaux-io"aux+pinmux-i2c dpaux-io"i2c+ pinmux-off dpaux-io"off+ i2c-bus+isp@54600000nvidia,tegra210-ispIT` WG disabledisp@54680000nvidia,tegra210-ispITh WF disabledi2c@546c0000nvidia,tegra210-i2c-viITl W disabledinterrupt-controller@50041000 arm,gic-400r@IPP P@ P`  W  +gpu@57000000 nvidia,gm20b IWXWbstallnonstall+ gpupwrrefgpu disabledinterrupt-controller@60004000nvidia,tegra210-ictlr`I`@@`A@`B@`C@`D@`E@r +timer@60005000+nvidia,tegra210-timernvidia,tegra20-timerI`PHW)*yztimerclock@60006000nvidia,tegra210-carI``+flow-controller@60007000nvidia,tegra210-flowctrlI`pgpio@6000d000)nvidia,tegra210-gpionvidia,tegra30-gpioI``W !"#7WY}rdma@60020000.nvidia,tegra210-apbdmanvidia,tegra148-apbdmaI`Whijklmnopqrstuvw"dma"dma+apbmisc@70000800/nvidia,tegra210-apbmiscnvidia,tegra20-apbmisc Ipdpdpinmux@700008d4nvidia,tegra210-pinmux Ipp0sbootUpinmux+pex_l0_rst_n_pa0pex_l0_rst_n_pa0%pex_l0_clkreq_n_pa1pex_l0_clkreq_n_pa12rsvd1%pex_wake_n_pa2pex_wake_n_pa22rsvd1%pex_l1_rst_n_pa3pex_l1_rst_n_pa32rsvd1%pex_l1_clkreq_n_pa4pex_l1_clkreq_n_pa42rsvd1%sata_led_active_pa5sata_led_active_pa5pa6pa62rsvd1dap1_fs_pb0 dap1_fs_pb02rsvd1dap1_din_pb1 dap1_din_pb12rsvd1dap1_dout_pb2dap1_dout_pb22rsvd1dap1_sclk_pb3dap1_sclk_pb32rsvd1spi2_mosi_pb4spi2_mosi_pb42rsvd2spi2_miso_pb5spi2_miso_pb52rsvd2spi2_sck_pb6 spi2_sck_pb62rsvd2spi2_cs0_pb7 spi2_cs0_pb72rsvd2spi1_mosi_pc0spi1_mosi_pc02rsvd1spi1_miso_pc1spi1_miso_pc12rsvd1spi1_sck_pc2 spi1_sck_pc22rsvd1spi1_cs0_pc3 spi1_cs0_pc32rsvd1spi1_cs1_pc4 spi1_cs1_pc42rsvd1spi4_sck_pc5 spi4_sck_pc52rsvd1spi4_cs0_pc6 spi4_cs0_pc62rsvd1spi4_mosi_pc7spi4_mosi_pc72rsvd1spi4_miso_pd0spi4_miso_pd02rsvd1uart3_tx_pd1 uart3_tx_pd12rsvd2uart3_rx_pd2 uart3_rx_pd22rsvd2uart3_rts_pd3uart3_rts_pd32rsvd2uart3_cts_pd4uart3_cts_pd4dmic1_clk_pe0dmic1_clk_pe02i2s3dmic1_dat_pe1dmic1_dat_pe12i2s3dmic2_clk_pe2dmic2_clk_pe22i2s3dmic2_dat_pe3dmic2_dat_pe32i2s3dmic3_clk_pe4dmic3_clk_pe4dmic3_dat_pe5dmic3_dat_pe52rsvd2pe6pe62rsvd0pe7pe72pwm3gen3_i2c_scl_pf0gen3_i2c_scl_pf02i2c3%gen3_i2c_sda_pf1gen3_i2c_sda_pf12i2c3%uart2_tx_pg0 uart2_tx_pg0uart2_rx_pg1 uart2_rx_pg12uartbuart2_rts_pg2uart2_rts_pg22rsvd2uart2_cts_pg3uart2_cts_pg32rsvd2wifi_en_ph0 wifi_en_ph0wifi_rst_ph1 wifi_rst_ph12rsvd0wifi_wake_ap_ph2wifi_wake_ap_ph2ap_wake_bt_ph3ap_wake_bt_ph3bt_rst_ph4 bt_rst_ph4bt_wake_ap_ph5bt_wake_ap_ph5ph6ph62rsvd0ap_wake_nfc_ph7ap_wake_nfc_ph72rsvd0nfc_en_pi0 nfc_en_pi0nfc_int_pi1 nfc_int_pi1gps_en_pi2 gps_en_pi22rsvd0gps_rst_pi3 gps_rst_pi32rsvd0uart4_tx_pi4 uart4_tx_pi42uartduart4_rx_pi5 uart4_rx_pi52uartduart4_rts_pi6uart4_rts_pi62uartduart4_cts_pi7uart4_cts_pi72uartdgen1_i2c_sda_pj0gen1_i2c_sda_pj02i2c1%gen1_i2c_scl_pj1gen1_i2c_scl_pj12i2c1%gen2_i2c_scl_pj2gen2_i2c_scl_pj22i2c2%gen2_i2c_sda_pj3gen2_i2c_sda_pj32i2c2%dap4_fs_pj4 dap4_fs_pj42rsvd1dap4_din_pj5 dap4_din_pj52rsvd1dap4_dout_pj6dap4_dout_pj62rsvd1dap4_sclk_pj7dap4_sclk_pj72rsvd1pk0pk02rsvd2pk1pk12rsvd2pk2pk22rsvd2pk3pk32rsvd2pk4pk42rsvd1pk5pk52rsvd1pk6pk62rsvd1pk7pk72rsvd1pl0pl02rsvd0pl1pl12rsvd1sdmmc1_clk_pm0sdmmc1_clk_pm02sdmmc1sdmmc1_cmd_pm1sdmmc1_cmd_pm12sdmmc1sdmmc1_dat3_pm2sdmmc1_dat3_pm22sdmmc1sdmmc1_dat2_pm3sdmmc1_dat2_pm32sdmmc1sdmmc1_dat1_pm4sdmmc1_dat1_pm42sdmmc1sdmmc1_dat0_pm5sdmmc1_dat0_pm52sdmmc1sdmmc3_clk_pp0sdmmc3_clk_pp02sdmmc3sdmmc3_cmd_pp1sdmmc3_cmd_pp12sdmmc3sdmmc3_dat3_pp2sdmmc3_dat3_pp22sdmmc3sdmmc3_dat2_pp3sdmmc3_dat2_pp32sdmmc3sdmmc3_dat1_pp4sdmmc3_dat1_pp42sdmmc3sdmmc3_dat0_pp5sdmmc3_dat0_pp52sdmmc3cam1_mclk_ps0cam1_mclk_ps02rsvd1cam2_mclk_ps1cam2_mclk_ps12rsvd1cam_i2c_scl_ps2cam_i2c_scl_ps22i2cvi%cam_i2c_sda_ps3cam_i2c_sda_ps32i2cvi%cam_rst_ps4 cam_rst_ps42rsvd1cam_af_en_ps5cam_af_en_ps52rsvd2cam_flash_en_ps6cam_flash_en_ps62rsvd2cam1_pwdn_ps7cam1_pwdn_ps72rsvd1cam2_pwdn_pt0cam2_pwdn_pt02rsvd1cam1_strobe_pt1cam1_strobe_pt12rsvd1uart1_tx_pu0 uart1_tx_pu02uartauart1_rx_pu1 uart1_rx_pu12uartauart1_rts_pu2uart1_rts_pu22uartauart1_cts_pu3uart1_cts_pu32uartalcd_bl_pwm_pv0lcd_bl_pwm_pv02pwm0lcd_bl_en_pv1lcd_bl_en_pv1lcd_rst_pv2 lcd_rst_pv22rsvd0lcd_gpio1_pv3lcd_gpio1_pv32rsvd1lcd_gpio2_pv4lcd_gpio2_pv42pwm1ap_ready_pv5 ap_ready_pv52rsvd0touch_rst_pv6touch_rst_pv6touch_clk_pv7touch_clk_pv72rsvd1modem_wake_ap_px0modem_wake_ap_px02rsvd0touch_int_px1touch_int_px12rsvd0motion_int_px2motion_int_px22rsvd0als_prox_int_px3als_prox_int_px32rsvd0temp_alert_px4temp_alert_px4button_power_on_px5button_power_on_px52rsvd0button_vol_up_px6button_vol_up_px6button_vol_down_px7button_vol_down_px7button_slide_sw_py0button_slide_sw_py02rsvd0button_home_py1button_home_py1lcd_te_py2 lcd_te_py22rsvd1pwr_i2c_scl_py3pwr_i2c_scl_py32i2cpmu%pwr_i2c_sda_py4pwr_i2c_sda_py42i2cpmu%clk_32k_out_py5clk_32k_out_py52socpz0pz0pz1pz12sdmmc1pz2pz22rsvd2pz3pz32rsvd1pz4pz4pz5pz52socdap2_fs_paa0 dap2_fs_paa02i2s2dap2_sclk_paa1dap2_sclk_paa12i2s2dap2_din_paa2dap2_din_paa22i2s2dap2_dout_paa3dap2_dout_paa32i2s2aud_mclk_pbb0aud_mclk_pbb02auddvfs_pwm_pbb1dvfs_pwm_pbb12cldvfsdvfs_clk_pbb2dvfs_clk_pbb2gpio_x1_aud_pbb3gpio_x1_aud_pbb32rsvd0gpio_x3_aud_pbb4gpio_x3_aud_pbb42rsvd0hdmi_cec_pcc0hdmi_cec_pcc02cec%hdmi_int_dp_hpd_pcc1hdmi_int_dp_hpd_pcc1%spdif_out_pcc2spdif_out_pcc22rsvd1spdif_in_pcc3spdif_in_pcc3usb_vbus_en0_pcc4usb_vbus_en0_pcc42usb%usb_vbus_en1_pcc5usb_vbus_en1_pcc52usb%dp_hpd0_pcc6 dp_hpd0_pcc62rsvd1pcc7pcc72rsvd0%spi2_cs1_pdd0spi2_cs1_pdd02rsvd1qspi_sck_pee0qspi_sck_pee02rsvd1qspi_cs_n_pee1qspi_cs_n_pee12rsvd1qspi_io0_pee2qspi_io0_pee22rsvd1qspi_io1_pee3qspi_io1_pee32rsvd1qspi_io2_pee4qspi_io2_pee42rsvd1qspi_io3_pee5qspi_io3_pee52rsvd1core_pwr_req core_pwr_req2corecpu_pwr_req cpu_pwr_req2cpupwr_int_n pwr_int_n2pmiclk_32k_in clk_32k_in2clkjtag_rtck jtag_rtck2jtagclk_reqclk_req2sysshutdown shutdown 2shutdownserial@70006000)nvidia,tegra210-uartnvidia,tegra20-uartIp`@B W$serialserialLQrxtxokayserial@70006040)nvidia,tegra210-uartnvidia,tegra20-uartIp`@@B W%serialserialL  Qrxtx disabledserial@70006200)nvidia,tegra210-uartnvidia,tegra20-uartIpb@B W.7serial7serialL  Qrxtx disabledserial@70006300)nvidia,tegra210-uartnvidia,tegra20-uartIpc@B WZAserialAserialLQrxtx disabledpwm@7000a000'nvidia,tegra210-pwmnvidia,tegra20-pwmIp[pwmpwm disabledi2c@7000c000(nvidia,tegra210-i2cnvidia,tegra114-i2cIp W&+ div-clk i2cLQrxtx disabledi2c@7000c400(nvidia,tegra210-i2cnvidia,tegra114-i2cIp WT+6div-clk6i2cLQrxtx disabledi2c@7000c500(nvidia,tegra210-i2cnvidia,tegra114-i2cIp W\+Cdiv-clkCi2cLQrxtx disabledi2c@7000c700(nvidia,tegra210-i2cnvidia,tegra114-i2cIp Wx+gdiv-clkgi2cLQrxtxU _  sdefaultidle disabledi2c@7000d000(nvidia,tegra210-i2cnvidia,tegra114-i2cIp W5+/div-clk/i2cLQrxtxokayfi2c@7000d100(nvidia,tegra210-i2cnvidia,tegra114-i2cIp W?+div-clki2cLQrxtxU _  sdefaultidle disabledspi@7000d400(nvidia,tegra210-spinvidia,tegra114-spiIp W;+)spi)spiLQrxtx disabledspi@7000d600(nvidia,tegra210-spinvidia,tegra114-spiIp WR+,spi,spiLQrxtx disabledspi@7000d800(nvidia,tegra210-spinvidia,tegra114-spiIp WS+.spi.spiLQrxtx disabledspi@7000da00(nvidia,tegra210-spinvidia,tegra114-spiIp W]+DspiDspiLQrxtx disabledrtc@7000e000'nvidia,tegra210-rtcnvidia,tegra20-rtcIp Wrtcpmc@7000e400nvidia,tegra210-pmcIp %pclkclk32k_invpowergatesaudk+sor@40R8@40R8+xusbaxusbb!_xusbcYYvicvicvic+fuse@7000f800nvidia,tegra210-efuseIpfuse'fusememory-controller@70019000nvidia,tegra210-mcIp mc WM+sata@70020000nvidia,tegra210-ahci0Ipp ppp W|{satasata-oob|{satasata-oobsata-cold disabledhda@70030000'nvidia,tegra210-hdanvidia,tegra30-hdaIp WQ}ohdahda2hdmihda2codec_2x}ohdahda2hdmihda2codec_2x  disabledusb@70090000nvidia,tegra210-xusb0Ip p p MhcdfpciipfsW'(XYj"xxusb_hostxusb_host_srcxusb_falcon_srcxusb_ssxusb_ss_div2xusb_ss_srcxusb_hs_srcxusb_fs_srcpll_u_480mclk_mpll_eYxusb_hostxusb_ssxusb_src disabledpadctl@7009f000nvidia,tegra210-xusb-padctlIp padctl disabled+padsusb2trk disabledlanesusb2-0 disabledusb2-1 disabledusb2-2 disabledusb2-3 disabledhsictrk disabledlaneshsic-0 disabledhsic-1 disabledpciepllphy disabledlanespcie-0 disabledpcie-1 disabledpcie-2 disabledpcie-3 disabledpcie-4 disabledpcie-5 disabledpcie-6 disabledsatapllphy disabledlanessata-0 disabledportsusb2-0 disabledusb2-1 disabledusb2-2 disabledusb2-3 disabledhsic-0 disabledusb3-0 disabledusb3-1 disabledusb3-2 disabledusb3-3 disabledsdhci@700b0000,nvidia,tegra210-sdhcinvidia,tegra124-sdhciIp  Wsdhcisdhci disabledsdhci@700b0200,nvidia,tegra210-sdhcinvidia,tegra124-sdhciIp  W sdhci sdhci disabledsdhci@700b0400,nvidia,tegra210-sdhcinvidia,tegra124-sdhciIp  WEsdhciEsdhci disabledsdhci@700b0600,nvidia,tegra210-sdhcinvidia,tegra124-sdhciIp  Wsdhcisdhciokaymipi@700e3000nvidia,tegra210-mipiIp08 mipi-cal +aconnect@702c0000nvidia,tegra210-aconnectk apeapb2ape +p,p, disableddma@702e2000nvidia,tegra210-admaIp.  W !"#$%&'()*+,-jd_audio disabledagic@702f9000nvidia,tegra210-agicrIp/p/  Wfclk disabled+spi@70410000nvidia,tegra210-qspiIpA W +qspiqspiLQrxtx disabledusb@7d0000002nvidia,tegra210-ehcinvidia,tegra30-ehciusb-ehciI}@ Wutmiusbusb  disabledusb-phy@7d000000/nvidia,tegra210-usb-phynvidia,tegra30-usb-phy I}@}@utmiregpll_uutmi-padsusbutmi-pads0G\r   disabled+usb@7d0040002nvidia,tegra210-ehcinvidia,tegra30-ehciusb-ehciI}@@ Wutmi:usb:usb  disabledusb-phy@7d004000/nvidia,tegra210-usb-phynvidia,tegra30-usb-phy I}@@}@utmi:regpll_uutmi-pads:usbutmi-pads0G\r   disabled+cpus+cpu@0=cpuarm,cortex-a57I pscicpu@1=cpuarm,cortex-a57I pscicpu@2=cpuarm,cortex-a57I pscicpu@3=cpuarm,cortex-a57I pscitimerarm,armv8-timer0W    thermal-sensor@700e2000nvidia,tegra210-soctherm Ip ``Msoctherm-regcar-reg W0dNtsensorsocthermN soctherm+throttle-cfgsheavy.d>UW+thermal-zonescpuf|tripscpu-shutdown-tripd Dcriticalthrottle-tripDhot+cooling-mapsmap0 memf|tripsmem-shutdown-tripX Dcriticalcooling-mapsgpuf|tripsgpu-shutdown-tripX Dcriticalthrottle-tripDhot+cooling-mapsmap0 pllxf|tripspllx-shutdown-tripX Dcriticalcooling-mapsaliases/rtc@7000e000/serial@70006000chosenserial0:115200n8memory=memoryIclocks simple-bus+clock@0 fixed-clockIf+psci arm,psci-0.2smc compatibleinterrupt-parent#address-cells#size-cellsmodeldevice_typeregreg-namesinterruptsinterrupt-names#interrupt-cellsinterrupt-map-maskinterrupt-mapbus-rangerangesclocksclock-namesresetsreset-namesstatusassigned-addressesnvidia,num-lanesiommuspower-domainsgroupsfunctionphandlenvidia,headnvidia,mipi-calibratepinctrl-0pinctrl-1pinctrl-2pinctrl-namesinterrupt-controller#clock-cells#reset-cells#gpio-cellsgpio-controller#dma-cellsnvidia,pinsnvidia,pullnvidia,tristatenvidia,enable-inputnvidia,open-drainnvidia,io-hvnvidia,functionreg-shiftdmasdma-names#pwm-cellsclock-frequencynvidia,invert-interrupt#power-domain-cells#iommu-cellsnvidia,xusb-padctl#phy-cellsbus-widthnon-removable#nvidia,mipi-calibrate-cellsphy_typenvidia,phynvidia,hssync-start-delaynvidia,idle-wait-delaynvidia,elastic-limitnvidia,term-range-adjnvidia,xcvr-setupnvidia,xcvr-lsfslewnvidia,xcvr-lsrslewnvidia,hssquelch-levelnvidia,hsdiscon-levelnvidia,xcvr-hsslewnvidia,has-utmi-pad-registersenable-method#thermal-sensor-cellsnvidia,prioritynvidia,cpu-throt-percent#cooling-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicertc1serial0stdout-path