b.8[(v[.rockchip,px5-evbrockchip,px5rockchip,rk3368 +7Rockchip PX5 EVBaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff660000Q/i2c@ff140000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/serial@ff180000m/serial@ff190000u/serial@ff690000}/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53arm,armv8pscicpu@1cpuarm,cortex-a53arm,armv8pscicpu@2cpuarm,cortex-a53arm,armv8pscicpu@3cpuarm,cortex-a53arm,armv8psci cpu@100cpuarm,cortex-a53arm,armv8pscicpu@101cpuarm,cortex-a53arm,armv8pscicpu@102cpuarm,cortex-a53arm,armv8pscicpu@103cpuarm,cortex-a53arm,armv8psciamba simple-bus+dma-controller@ff250000arm,pl330arm,primecell%@  apb_pclkdma-controller@ff600000arm,pl330arm,primecell`@  apb_pclk9arm-pmuarm,armv8-pmuv3`pqrstuvw   psci arm,psci-0.2smctimerarm,armv8-timer0   oscillator fixed-clock3n6Cxin24mVdwmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @cр   D r vbiuciuciu-driveciu-sampleq | resetokaydefault Z5Adwmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @cр   E s wbiuciuciu-driveciu-sampleq !| reset disableddwmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc@cр   G u ybiuciuciu-driveciu-sampleq #| resetokay3рNYhndefault  5Asaradc@ff100000rockchip,saradc $| I [saradcapb_pclk| W saradc-apb disabledspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi A Rspiclkapb_pclk ,default + disabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi B Sspiclkapb_pclk -default + disabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi C Tspiclkapb_pclk )default  !+ disabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c >+i2c Ndefault "okaytouchscreen@40silead,gsl1680@ # # i2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c ?+i2c Odefault $ disabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c @+i2c Pdefault % disabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c A+i2c Qdefault & disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uart3n6 M Ubaudclkapb_pclk 7 disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uart3n6 N Vbaudclkapb_pclk 8 disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uart3n6 P Xbaudclkapb_pclk : disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uart3n6 Q Ybaudclkapb_pclk ;okaythermal-zonescpud'tripscpu_alert0$*passive(cpu_alert18*passive)cpu_crits* criticalcooling-mapsmap05( :map15) :gpud'tripsgpu_alert08*passive*gpu_crit8* criticalcooling-mapsmap05* :tsadc@ff280000rockchip,rk3368-tsadc( % H Ztsadcapb_pclk|  tsadc-apbinitdefaultsleep +I,S+]ssokay'ethernet@ff290000rockchip,rk3368-gmac) macirq-8  f g c ]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac disabledusb@ff500000 generic-ehciP  usbhostokayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2X  otgotg@@ okayi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2ce Li2c <default .+okaypmic@1brockchip,rk808 /default 0122>2J2V2b2n2z222Cxin32krk808-clkout2VregulatorsDCDC_REG1 ``vdd_cpuDCDC_REG2 ``vdd_logDCDC_REG3vcc_ddrDCDC_REG42Z2Zvcc_ioLDO_REG1w@w@ vcc18_flashLDO_REG22Z2Zvcca_33LDO_REG3B@B@vdd_10LDO_REG42Z2Zavdd_33LDO_REG5w@2Z vccio_sdLDO_REG6B@B@ vdd10_lcdLDO_REG7w@w@vcc_18LDO_REG8w@w@ vcc18_lcdSWITCH_REG1vcc_sdSWITCH_REG2 vcc33_lcdi2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cf =+i2c Mdefault 3okayaccelerometer@18 bosch,bma250 4pwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault 5 _pwm disabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault 6 _pwm disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmh  _pwm disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmh0default 7 _pwm disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uarti O Wbaudclkapb_pclk 9default 8 disabledmbox@ff6b0000rockchip,rk3368-mailboxk0 E pclk_mailbox) disabledsyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfds<io-domains&rockchip,rk3368-pmu-io-voltage-domain disabledreboot-modesyscon-reboot-mode5pcfg-pull-downpcfg-pull-none!=pcfg-pull-none-12ma!. ?emmcemmc-clk==emmc-cmd=>emmc-pwr=>emmc-bus1=>emmc-bus4@=>>>>emmc-bus8=>>>>>>>>gmacrgmii-pins====? ? ??? ?======rmii-pins====? ? ?====i2c0i2c0-xfer ===.i2c1i2c1-xfer ===3i2c2i2c2-xfer = =="i2c3i2c3-xfer ===$i2c4i2c4-xfer ===%i2c5i2c5-xfer ===&i2si2s-8ch-bus= = ========;pwm0pwm0-pin==5pwm1pwm1-pin==6pwm3pwm3-pin==7sdio0sdio0-bus1=>sdio0-bus4@=>>>>sdio0-cmd=>sdio0-clk==sdio0-cd=>sdio0-wp=>sdio0-pwr=>sdio0-bkpwr=>sdio0-int=>sdmmcsdmmc-clk= = sdmmc-cmd= > sdmmc-cd= >sdmmc-bus1=>sdmmc-bus4@=>>>> spdifspdif-tx==:spi0spi0-clk=>spi0-cs0=>spi0-cs1=>spi0-tx=>spi0-rx=>spi1spi1-clk=>spi1-cs0=>spi1-cs1=>spi1-rx=>spi1-tx=>spi2spi2-clk= >spi2-cs0= >!spi2-rx= > spi2-tx= >tsadcotp-gpio==+otp-out==,uart0uart0-xfer =>=uart0-cts==uart0-rts==uart1uart1-xfer =>=uart1-cts==uart1-rts==uart2uart2-xfer =>=8uart3uart3-xfer =>=uart3-cts==uart3-rts==uart4uart4-xfer =>=uart4-cts==uart4-rts==keyspwr-key==@pmicpmic-sleep==1pmic-int=>0chosenKserial4:115200n8memory@0@memorygpio-keys gpio-keysdefault @power / WGPIO Power]thvcc-sys-regulatorregulator-fixedvcc_sysLK@LK@2 compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2cpudevice_typeregenable-method#cooling-cellsphandlerangesinterrupts#dma-cellsarm,pl330-broken-no-flushpclocksclock-namesinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyfifo-depthresetsreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delayno-emmcno-sdiosd-uhs-sdr12sd-uhs-sdr25pinctrl-namespinctrl-0rockchip,default-sample-phasevmmc-supplyvqmmc-supplydisable-wpmmc-hs200-1_8vno-sdnon-removable#io-channel-cellspower-gpiostouchscreen-size-xtouchscreen-size-ysilead,max-fingersreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-name#pwm-cells#mbox-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-names#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathlabellinux,codewakeup-source