Ɲ8( vamrs,ficusrockchip,rk3399 +796boards RK3399 Ficusaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/dwmmc@fe310000y/dwmmc@fe320000~/sdhci@fe330000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53arm,armv8pscid  cpu@1cpuarm,cortex-a53arm,armv8pscid  cpu@2cpuarm,cortex-a53arm,armv8pscid  cpu@3cpuarm,cortex-a53arm,armv8pscid  cpu@100cpuarm,cortex-a72arm,armv8psci   cpu@101cpuarm,cortex-a72arm,armv8psci   display-subsystemrockchip,display-subsystem$ pmu_a53arm,cortex-a53-pmu*pmu_a72arm,cortex-a72-pmu*psci arm,psci-1.0smctimerarm,armv8-timer@*   5xin24m fixed-clockLn6\xin24moamba simple-bus+|dma-controller@ff6d0000arm,pl330arm,primecellm@ * apb_pclkdma-controller@ff6e0000arm,pl330arm,primecelln@ * apb_pclkpcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+ Gaclkaclk-perfhclkpm0*123syslegacyclient`  ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38|8"()coremgmtmgmt-stickypipepmpclkaclk5okay <EOdefault]ginterrupt-controllerwethernet@fe300000rockchip,rk3399-gmac0* macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac" )stmmaceth5okayinputrgmiiOdefault]  'P*(3dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@*@<р Mbiuciuciu-driveciu-sampleJ"y)reset 5disableddwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@*A<рU  Lbiuciuciu-driveciu-sampleJ"z)reset5okayjtL Odefault] !sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13* NU Nclk_xinclk_ahb\emmc_cardclocko" phy_arasan5okayj 2~usb@fe380000 generic-ehci8*#usbhostarbiterutmi$usb5okayusb@fe3a0000 generic-ohci:*#usbhostarbiterutmi$usb5okayusb@fe3c0000 generic-ehci<*%usbhostarbiterutmi&usb5okayusb@fe3e0000 generic-ohci>* %usbhostarbiterutmi&usb5okayusb@fe800000rockchip,rk3399-dwc3+|0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk"% )usb3-otg5okayusb@fe800000 snps,dwc3*i@host'(usb2-phyusb3-phy Hutmi_wideQi5okayusb@fe900000rockchip,rk3399-dwc3+|0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk"& )usb3-otg5okayusb@fe900000 snps,dwc3*n@host)*usb2-phyusb3-phy Hutmi_wideQi5okaydp@fec00000rockchip,rk3399-cdn-dp* rU  ruocore-clkpclkspdifgrf+, "HJ)spdifdptxapbcore 5disabledportsport+endpoint@0-endpoint@1.interrupt-controller@fee00000 arm,gic-v3+|wP * interrupt-controller@fee20000arm,gic-v3-itsppi-partitionsinterrupt-partition-0interrupt-partition-1saradc@ff100000rockchip,rk3399-saradc*>Pesaradcapb_pclk" )saradc-apb 5disabledi2c@ff110000rockchip,rk3399-i2cAU AU i2cpclk*;Odefault]/+5okayi2c@ff120000rockchip,rk3399-i2cBU BV i2cpclk*#Odefault]0+5okayi2c@ff130000rockchip,rk3399-i2cCU CW i2cpclk*"Odefault]1+5okayi2c@ff140000rockchip,rk3399-i2cDU DX i2cpclk*&Odefault]2+ 5disabledi2c@ff150000rockchip,rk3399-i2cEU EY i2cpclk*%Odefault]3+ 5disabledi2c@ff160000rockchip,rk3399-i2cFU FZ i2cpclk*$Odefault]4+ 5disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclk*c1;Odefault]565okayserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclk*b1;Odefault]7 5disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclk*d1;Odefault]85okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclk*e1;Odefault]9 5disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclk*DOdefault]:;<=+ 5disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk*5Odefault]>?@A+ 5disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk*4Odefault]BCDE+ 5disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclk*COdefault]FGHI+ 5disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclk*Odefault]JKLM+ 5disabledthermal-zonescpuHd^lNtripscpu_alert0|ppassiveOcpu_alert1|$passivePcpu_crit|s criticalcooling-mapsmap0O map1PgpuHd^lNtripsgpu_alert0|$passiveQgpu_crit|s criticalcooling-mapsmap0Q tsadc@ff260000rockchip,rk3399-tsadc&*aOU qOdtsadcapb_pclk" )tsadc-apbsOinitdefaultsleep]RSR 5disabledNqos@ffa58000syscon [qos@ffa5c000syscon \qos@ffa60080syscon qos@ffa60100syscon qos@ffa60180syscon qos@ffa70000syscon _qos@ffa70080syscon `qos@ffa74000syscon@ ]qos@ffa76000syscon` ^qos@ffa90000syscon aqos@ffa98000syscon Tqos@ffaa0000syscon bqos@ffaa0080syscon cqos@ffaa8000syscon dqos@ffaa8080syscon eqos@ffab0000syscon Uqos@ffab0080syscon Vqos@ffab8000syscon Wqos@ffac0000syscon Xqos@ffac0080syscon Yqos@ffac8000syscon fqos@ffac8080syscon gqos@ffad0000syscon hqos@ffad8080syscon qos@ffae0000syscon Zpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+pd_iep@34"Tpd_rga@33!UVpd_vcodec@31Wpd_vdu@32 XYpd_gpu@35#Zpd_edp@25lpd_emmc@23[pd_gmac@22f\pd_sd@27L]pd_sdioaudio@28^pd_usb3@24_`pd_vio@15+pd_hdcp@21rapd_isp0@19bcpd_isp1@20depd_tcpc0@RK3399_PD_TCPC0~}pd_tcpc1@RK3399_PD_TCPC1 pd_vo@16+pd_vopb@17fgpd_vopl@18hsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2+zio-domains&rockchip,rk3399-pmu-io-voltage-domain5okayispi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5jjspiclkapb_pclk*<Odefault]klmn+ 5disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7jj"baudclkapb_pclk*f1;Odefault]o 5disabledi2c@ff3c0000rockchip,rk3399-i2c<j U j j i2cpclk*9Odefault]p+5okayL)regulator@40silergy,syr827@A ^vdd_cpu_bm 4`q5okay regulator-state-memregulator@41silergy,syr828AA^vdd_gpum 4`qregulator-state-mempmic@1brockchip,rk808 r*Odefault]so\xin32krk808-clkout2+q7qCqOq[qgqsqqqiregulatorsDCDC_REG1 ^vdd_centerm qpregulator-state-memDCDC_REG2 ^vdd_cpu_lm qp regulator-state-memDCDC_REG3^vcc_ddrregulator-state-memDCDC_REG4^vcc_1v8mw@w@iregulator-state-memw@LDO_REG1 ^vcc1v8_dvpmw@w@regulator-state-memw@LDO_REG2 ^vcca1v8_hdmimw@w@regulator-state-memw@LDO_REG3 ^vcca_1v8mw@w@regulator-state-memw@LDO_REG4^vcc_sdmw@2Zregulator-state-mem2ZLDO_REG5 ^vcc3v0_sdm--regulator-state-mem-LDO_REG6^vcc_1v5m``regulator-state-mem`LDO_REG7 ^vcca0v9_hdmim  regulator-state-mem LDO_REG8^vcc_3v0m--|regulator-state-mem-SWITCH_REG1 ^vcc3v3_s3regulator-state-memSWITCH_REG2 ^vcc3v3_s0regulator-state-memi2c@ff3d0000rockchip,rk3399-i2c=j U j j i2cpclk*8Odefault]t+5okayi2c@ff3e0000rockchip,rk3399-i2c>j U j j i2cpclk*:Odefault]u+ 5disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmBOdefault]vjpwm 5disabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmBOdefault]wjpwm 5disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB Odefault]xjpwm5okaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0Odefault]yjpwm5okayiommu@ff650800rockchip,iommue@*svpu_mmu aclkiface 5disablediommu@ff660480rockchip,iommu f@f@*u vdec_mmu aclkiface 5disablediommu@ff670800rockchip,iommug@**iep_mmu aclkiface 5disabledrga@ff680000rockchip,rk3399-rgah*7maclkhclksclk"jgi )coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruuzo jU(Jjclock-controller@ff760000rockchip,rk3399-cruvo @BCx@U#g/;рxh<4`#Fׄׄ syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domain5okay{%{2?|usb2-phy@e450rockchip,rk3399-usb2phyP{phyclko\clk_usbphy0_480m5okay#host-portO* linestate5okay}$otg-portO0*ghjotg-bvalidotg-idlinestate5okay'usb2-phy@e460rockchip,rk3399-usb2phy`|phyclko\clk_usbphy1_480m5okay%host-portO* linestate5okay}&otg-portO0*lmootg-bvalidotg-idlinestate5okay)phy@f780rockchip,rk3399-emmc-phy$~emmcclkO5okay"pcie-phyrockchip,rk3399-pcie-phyrefclkO")phy5okayphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~U"L)uphyuphy-pipeuphy-tcphy5okaydp-portO+usb3-portO(phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-refU "M)uphyuphy-pipeuphy-tcphy5okaydp-portO,usb3-portO*watchdog@ff848000 snps,dw-wdt|*xrktimer@ff850000rockchip,rk3399-timer*QhZ pclktimerspdif@ff870000rockchip,rk3399-spdif*BZ_tx mclkhclkUOdefault] 5disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s*'Z_txrxi2s_clki2s_hclkVOdefault] 5disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s*(Z_txrxi2s_clki2s_hclkWOdefault] 5disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s*)Z_txrxi2s_clki2s_hclkX 5disabledvop@ff8f0000rockchip,rk3399-vop-lit>*wUׄaclk_vopdclk_vophclk_vopi" )axiahbdclk5okayport+ endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4.iommu@ff8f3f00rockchip,iommu?*w vopl_mmu aclkiface5okayvop@ff900000rockchip,rk3399-vop-big>*vUׄaclk_vopdclk_vophclk_vopi" )axiahbdclk5okayport+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4-iommu@ff903f00rockchip,iommu?*v vopb_mmu aclkiface5okayiommu@ff914000rockchip,iommu @P*+ isp0_mmu aclkifacepiommu@ff924000rockchip,iommu @P*, isp1_mmu aclkifacephdmi-soundsimple-audio-cardi2s hdmi-sound 5disabledsimple-audio-card,cpusimple-audio-card,codechdmi@ff940000rockchip,rk3399-dw-hdmi*(tqpoiahbisfrcecgrfvpll;5okayOdefault]portsport+endpoint@0endpoint@1mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi*- porefpclkphy_cfggrf")apb 5disabledports+port@0+endpoint@0endpoint@1mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi*. qorefpclkphy_cfggrf")apb 5disabledports+port@0+endpoint@0endpoint@1edp@ff970000rockchip,rk3399-edp* jlo dppclkgrfOdefault]")dp 5disabledports+port@0+endpoint@0endpoint@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600* jobmmugpu# 5disabledpinctrlrockchip,rk3399-pinctrlz+|gpio0@ff720000rockchip,gpio-bankrj* wgpio1@ff730000rockchip,gpio-banksj* wrgpio2@ff780000rockchip,gpio-bankxP* wgpio3@ff788000rockchip,gpio-bankxQ* wgpio4@ff790000rockchip,gpio-bankyR* wpcfg-pull-up pcfg-pull-down !pcfg-pull-none 0pcfg-pull-none-12ma 0 = pcfg-pull-none-13ma 0 = pcfg-pull-none-18ma 0 =pcfg-pull-none-20ma 0 =pcfg-pull-up-2ma  =pcfg-pull-up-8ma  =pcfg-pull-up-18ma  =pcfg-pull-up-20ma  =pcfg-pull-down-4ma ! =pcfg-pull-down-8ma ! =pcfg-pull-down-12ma ! = pcfg-pull-down-18ma ! =pcfg-pull-down-20ma ! =pcfg-output-high Lpcfg-output-low Xclockclk-32k cedpedp-hpd cgmacrgmii-pins c    rmii-pins c     rgmii-sleep-pins ci2c0i2c0-xfer cpi2c1i2c1-xfer c/i2c2i2c2-xfer c0i2c3i2c3-xfer c1i2c4i2c4-xfer c  ti2c5i2c5-xfer c  2i2c6i2c6-xfer c  3i2c7i2c7-xfer c4i2c8i2c8-xfer cui2s0i2s0-2ch-bus` ci2s0-8ch-bus ci2s1i2s1-2ch-busP csdio0sdio0-bus1 csdio0-bus4@ csdio0-cmd csdio0-clk csdio0-cd csdio0-pwr csdio0-bkpwr csdio0-wp csdio0-int csdmmcsdmmc-bus1 csdmmc-bus4@ c   !sdmmc-clk c sdmmc-cmd c sdmmc-cd c sdmmc-wp csuspendap-pwroff cddrio-pwroff cspdifspdif-bus cspdif-bus-1 cspi0spi0-clk c:spi0-cs0 c=spi0-cs1 cspi0-tx c;spi0-rx c<spi1spi1-clk c >spi1-cs0 c Aspi1-rx c@spi1-tx c?spi2spi2-clk c Bspi2-cs0 c Espi2-rx c Dspi2-tx c Cspi3spi3-clk ckspi3-cs0 cnspi3-rx cmspi3-tx clspi4spi4-clk cFspi4-cs0 cIspi4-rx cHspi4-tx cGspi5spi5-clk cJspi5-cs0 cMspi5-rx cLspi5-tx cKtestclktest-clkout0 ctest-clkout1 ctest-clkout2 ctsadcotp-gpio cRotp-out cSuart0uart0-xfer c5uart0-cts c6uart0-rts cuart1uart1-xfer c  7uart2auart2a-xfer c uart2buart2b-xfer cuart2cuart2c-xfer c8uart3uart3-xfer c9uart3-cts cuart3-rts cuart4uart4-xfer couarthdcpuarthdcp-xfer cpwm0pwm0-pin cvpwm0-pin-pull-down cvop0-pwm-pin cvop1-pwm-pin cpwm1pwm1-pin cwpwm1-pin-pull-down cpwm2pwm2-pin cxpwm2-pin-pull-down cpwm3apwm3a-pin cypwm3bpwm3b-pin chdmihdmi-i2c-xfer chdmi-cec cpciepci-clkreqn-cpm cpci-clkreqnb-cpm cpcie-drv cpmicpmic-int-l csvsel1-gpio cvsel2-gpio cusb2host-vbus-drv copp-table0operating-points-v2 q opp00 |Q 5 @opp01 |#F 5opp02 |0, Popp03 |< Hopp04 |G B@opp05 |Tfr *opp-table1operating-points-v2 q opp00 |Q 5 @opp01 |#F 5opp02 |0, opp03 |< Yopp04 |G ~opp05 |Tfr opp06 |_" opp07 |kI Oopp-table2operating-points-v2opp00 |  5opp01 |@ 5opp02 |ׄ opp03 |e Yopp04 |#F Hopp05 |/ chosen serial2:1500000n8external-gmac-clock fixed-clockLsY@ \clkin_gmacovcc1v8-s0regulator-fixed ^vcc1v8_s0mw@w@{vcc-sysregulator-fixed^vcc_sysmLK@LK@qvcc3v3-sysregulator-fixed ^vcc3v3_sysm2Z2Zqvcc3v3-pcie-regulatorregulator-fixed  rOdefault] ^vcc3v3_pciem2Z2Zvcc5v0-host-regulatorregulator-fixed  Odefault] ^vcc5v0_hostmLK@LK@q} compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8mmc0mmc1mmc2serial0serial1serial2serial3serial4cpudevice_typeregenable-methodclocks#cooling-cellsdynamic-power-coefficientoperating-points-v2cpu-supplyphandleportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0vpcie3v3-supplyinterrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthassigned-clock-ratesbus-widthcap-mmc-highspeedcap-sd-highspeedclock-freq-min-maxdisable-wpsd-uhs-sdr104vqmmc-supplycard-detect-delayarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#power-domain-cellspm_qospmu1830-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsfcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#iommu-cells#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdmasdma-namesiommusrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathenable-active-high