/8z(Sz4isee,am335x-base0033isee,am335x-igep0033ti,am33xx +$7IGEP COM AM335x on AQUILA Expansionchosenaliases=/ocp/i2c@44e0b000B/ocp/i2c@4802a000G/ocp/i2c@4819c000L/ocp/serial@44e09000T/ocp/serial@48022000\/ocp/serial@48024000d/ocp/serial@481a6000l/ocp/serial@481a8000t/ocp/serial@481aa000|/ocp/can@481cc000/ocp/can@481d0000/ocp/usb@47400000/usb@47401000/ocp/usb@47400000/usb@47401800#/ocp/usb@47400000/usb-phy@47401300#/ocp/usb@47400000/usb-phy@47401b00&/ocp/ethernet@4a100000/slave@4a100200&/ocp/ethernet@4a100000/slave@4a100300/ocp/spi@48030000/ocp/spi@481a0000/ocp/mmc@48060000/ocp/mmc@481d8000/ocp/mmc@47810000cpus+cpu@0arm,cortex-a8cpucpuopp-tableoperating-points-v2-ti-cpu#opp50-300000000+ 2~4(@Qopp100-275000000+d* 2r@Qopp100-300000000+ 2r@ Qopp100-500000000+e 2r@opp100-600000000+#F 2r@@opp120-600000000+#F 2O@@opp120-720000000+*T 2O@@oppturbo-720000000+*T 29pP@oppturbo-800000000+/ 29pP@oppnitro-1000000000+; 27DL@pmu@4b000000arm,cortex-a8-pmu]Khdebugsssocti,omap-inframpu ti,omap3-mpuhmpurocp simple-bus+zhl3_mainl4_wkup@44c00000ti,am3-l4-wkupsimple-bus+ zD(wkup_m3@100000ti,am3352-wkup-m3@  umemdmemhwkup_m3am335x-pm-firmware.elf##prcm@200000ti,am3-prcmsimple-bus @+ z @clocks+clk_32768_ck fixed-clock#clk_rc32k_ck fixed-clock}#virt_19200000_ck fixed-clock$#virt_24000000_ck fixed-clockn6#virt_25000000_ck fixed-clock}x@# virt_26000000_ck fixed-clock#!tclkin_ck fixed-clock#dpll_core_ck@490ti,am3-dpll-core-clock \h# dpll_core_x2_ckti,am3-dpll-x2-clock # dpll_core_m4_ck@480ti,divider-clock #dpll_core_m5_ck@484ti,divider-clock #dpll_core_m6_ck@4d8ti,divider-clock dpll_mpu_ck@488ti,am3-dpll-clock  ,#dpll_mpu_m2_ck@4a8ti,divider-clockdpll_ddr_ck@494ti,am3-dpll-no-gate-clock 4@# dpll_ddr_m2_ck@4a0ti,divider-clock # dpll_ddr_m2_div2_ckfixed-factor-clock dpll_disp_ck@498ti,am3-dpll-no-gate-clock HT# dpll_disp_m2_ck@4a4ti,divider-clock #dpll_per_ck@48c!ti,am3-dpll-no-gate-j-type-clock p#dpll_per_m2_ck@4acti,divider-clock#dpll_per_m2_div4_wkupdm_ckfixed-factor-clockdpll_per_m2_div4_ckfixed-factor-clockclk_24mhzfixed-factor-clock#clkdiv32k_ckfixed-factor-clockl3_gclkfixed-factor-clock#pruss_ocp_gclk@530 ti,mux-clock0mmu_fck@914ti,gate-clock timer1_fck@528 ti,mux-clock8(#1timer2_fck@508 ti,mux-clock8#2timer3_fck@50c ti,mux-clock8 timer4_fck@510 ti,mux-clock8timer5_fck@518 ti,mux-clock8timer6_fck@51c ti,mux-clock8timer7_fck@504 ti,mux-clock8usbotg_fck@47cti,gate-clock|dpll_core_m4_div2_ckfixed-factor-clock#ieee5000_fck@e4ti,gate-clockwdt1_fck@538 ti,mux-clock88l4_rtc_gclkfixed-factor-clockl4hs_gclkfixed-factor-clockl3s_gclkfixed-factor-clockl4fw_gclkfixed-factor-clockl4ls_gclkfixed-factor-clock#"sysclk_div_ckfixed-factor-clockcpsw_125mhz_gclkfixed-factor-clock#:cpsw_cpts_rft_clk@520 ti,mux-clock #;gpio0_dbclk_mux_ck@53c ti,mux-clock8<lcd_gclk@534 ti,mux-clock 4#mmc_clkfixed-factor-clockgfx_fclk_clksel_ck@52c ti,mux-clock,#gfx_fck_div_ck@52cti,divider-clock,sysclkout_pre_ck@700 ti,mux-clock #clkout2_div_ck@700ti,divider-clock#clkout2_ck@700ti,gate-clockclockdomainsl4_per_cm@0 ti,omap4-cm+ zclk@14 ti,clkctrl<#l4_wkup_cm@400 ti,omap4-cm+ zclk@4 ti,clkctrlmpu_cm@600 ti,omap4-cm+ zclk@4 ti,clkctrll4_rtc_cm@800 ti,omap4-cm+ zclk@0 ti,clkctrlgfx_l3_cm@900 ti,omap4-cm + z clk@4 ti,clkctrll4_cefuse_cm@a00 ti,omap4-cm + z clk@20 ti,clkctrl scm@210000ti,am3-scmsimple-bus! + z! pinmux@800pinctrl-single8+ ;pinmux_i2c0_pinsX00#+pinmux_nandflash_pinsxX000 00000p0t7|#=pinmux_uart0_pinsXp0t#*pinmux_leds_pinsX\#@pinmux_nxp_hdmi_pinsX #Cpinmux_nxp_hdmi_off_pinsX #Dpinmux_leds_base_pinsXT#Escm_conf@0sysconsimple-bus+ z#clocks+sys_clkin_ck@40 ti,mux-clock !@#adc_tsc_fckfixed-factor-clockdcan0_fckfixed-factor-clock#/dcan1_fckfixed-factor-clock#0mcasp0_fckfixed-factor-clockmcasp1_fckfixed-factor-clocksmartreflex0_fckfixed-factor-clocksmartreflex1_fckfixed-factor-clocksha0_fckfixed-factor-clockaes0_fckfixed-factor-clockrng_fckfixed-factor-clockehrpwm0_tbclk@44e10664ti,gate-clock"d#7ehrpwm1_tbclk@44e10664ti,gate-clock"d#8ehrpwm2_tbclk@44e10664ti,gate-clock"d#9wkup_m3_ipc@1324ti,am3352-wkup-m3-ipc$$]Nl#u$%dma-router@f90ti,am335x-edma-crossbar@| &#-clockdomainsinterrupt-controller@48200000ti,am33xx-intcH #edma@49000000ti,edma3-tpcchtpccI edma3_cc ] 'edma3_ccintedma3_mperredma3_ccerrint@|'()#&tptc@49800000ti,edma3-tptchtptc0I]pedma3_tcerrint#'tptc@49900000ti,edma3-tptchtptc1I]qedma3_tcerrint#(tptc@49a00000ti,edma3-tptchtptc2I]redma3_tcerrint#)gpio@44e07000ti,omap4-gpiohgpio1Dp]`gpio@4804c000ti,omap4-gpiohgpio2H]b#Agpio@481ac000ti,omap4-gpiohgpio3H] #Fgpio@481ae000ti,omap4-gpiohgpio4H]>serial@44e09000ti,am3352-uartti,omap3-uarthuart1lD ]Hokay&&txrx)default7*serial@48022000ti,am3352-uartti,omap3-uarthuart2lH ]I disabled&&txrxserial@48024000ti,am3352-uartti,omap3-uarthuart3lH@ ]J disabled&&txrxserial@481a6000ti,am3352-uartti,omap3-uarthuart4lH` ], disabledserial@481a8000ti,am3352-uartti,omap3-uarthuart5lH ]- disabledserial@481aa000ti,am3352-uartti,omap3-uarthuart6lH ]. disabledi2c@44e0b000 ti,omap4-i2c+hi2c1D]Fokay)default7+#Btps@2d- ti,tps65910A,M,Y,e,q,},,,regulators+regulator@0vrtcregulator@1vioregulator@2vdd1vdd_mpu t #regulator@3vdd2 vdd_core t0 regulator@4vdd3regulator@5vdig1regulator@6vdig2regulator@7vpllregulator@8vdacregulator@9 vaux1regulator@10 vaux2regulator@11 vaux33regulator@12 vmmcregulator@13 vbbeeprom@50 atmel,24c256Pi2c@4802a000 ti,omap4-i2c+hi2c2H]G disabledi2c@4819c000 ti,omap4-i2c+hi2c3H] disabledmmc@48060000ti,omap4-hsmmchmmc1)@ --txrx]@Hokay].immc@481d8000ti,omap4-hsmmchmmc2)&&txrx]H disabledmmc@47810000ti,omap4-hsmmchmmc3)]G disabledspinlock@480ca000ti,omap4-hwspinlockH  hspinlockswdt@44e35000 ti,omap3-wdt hwd_timer2DP][can@481cc000ti,am3352-d_canhd_can0H /fck D]4 disabledcan@481d0000ti,am3352-d_canhd_can1H 0fck D]7 disabledmailbox@480c8000ti,omap4-mailboxH ]Mhmailbox#$wkup_m3  #%timer@44e31000ti,am335x-timer-1msD]Chtimer11fcktimer@48040000ti,am335x-timerH]Dhtimer22fcktimer@48042000ti,am335x-timerH ]Ehtimer3timer@48044000ti,am335x-timerH@]\htimer4timer@48046000ti,am335x-timerH`]]htimer5timer@48048000ti,am335x-timerH]^htimer6timer@4804a000ti,am335x-timerH]_htimer7rtc@44e3e000ti,am3352-rtcti,da830-rtcD]KLhrtc 8int-clkspi@48030000ti,omap4-mcspi+H]Ahspi00&&&&tx0rx0tx1rx1 disabledspi@481a0000ti,omap4-mcspi+H]}hspi10&*&+&,&-tx0rx0tx1rx1 disabledusb@47400000ti,am33xx-usbG@z+ husb_otg_hsokaycontrol@44e10620ti,am335x-usb-ctrl-moduleD DHphy_ctrlwakeupokay#3usb-phy@47401300ti,am335x-usb-phyG@phyokay3#4usb@47401000ti,musb-am33xxokayG@G@ mccontrol]mc*otg2DS cp4h5555555555 5 5 5 5 55555555555 5 5 5 5 5rx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15usb-phy@47401b00ti,am335x-usb-phyG@phyokay3#6usb@47401800ti,musb-am33xxokayG@G@ mccontrol]mc*host2DS cp6h555555555555555555555555555555rx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15dma-controller@47402000ti,am3359-cppi41 G@G@ G@0G@@@#gluecontrollerschedulerqueuemgr]glue|uokay#5epwmss@48300000ti,am33xx-pwmssH0hepwmss0+ disabled$zH0H0H0H0H0H0ecap@48300100ti,am3352-ecapti,am33xx-ecapH0"fck]ecap0 disabledpwm@48300200"ti,am3352-ehrpwmti,am33xx-ehrpwmH07" tbclkfck disabledepwmss@48302000ti,am33xx-pwmssH0 hepwmss1+ disabled$zH0!H0!H0!H0!H0"H0"ecap@48302100ti,am3352-ecapti,am33xx-ecapH0!"fck]/ecap1 disabledpwm@48302200"ti,am3352-ehrpwmti,am33xx-ehrpwmH0"8" tbclkfck disabledepwmss@48304000ti,am33xx-pwmssH0@hepwmss2+ disabled$zH0AH0AH0AH0AH0BH0Becap@48304100ti,am3352-ecapti,am33xx-ecapH0A"fck]=ecap2 disabledpwm@48304200"ti,am3352-ehrpwmti,am33xx-ehrpwmH0B9" tbclkfck disabledethernet@4a100000ti,am335x-cpswti,cpswhcpgmac0:; fckcpts  JJ+]()*+zokaymdio@4a101000ti,cpsw-mdioti,davinci_mdio+ hdavinci_mdioB@Jokay#<slave@4a100200 < rmiislave@4a100300 < rmiicpsw-phy-sel@44e10650ti,am3352-cpsw-phy-selDP gmii-sel)ocmcram@40300000 mmio-sram@0 z@0+pm-sram-code@0ti,sram8#pm-sram-data@1000ti,sramE#elm@48080000ti,am3352-elmH ]helmokay#?lcdc@4830e000ti,am33xx-tilcdcH0]$hlcdcokaytscadc@44e0d000ti,am3359-tscadcD]hadc_tsc disabled&5&9 fifo0fifo1tscti,am3359-tscadcJti,am3359-adcemif@4c000000ti,emif-am3352Lhemif]eu\gpmc@50000000ti,am3352-gpmchgpmcgP ]d &4rxtxz+okay)default7=z#>nand@0,0ti,omap2-nand  >] >bch8,,$"7,JX(gu6@RR(+'?partition@01SPLpartition@11U-bootpartition@2 1U-Boot Env&partition@31Kernel(Ppartition@4 1File Systemxsham@53100000ti,omap4-shamhshamS]m &$rxaes@53500000 ti,omap4-aeshaesSP]g&&txrxmcasp@48038000ti,am33xx-mcasp-audiohmcasp0H F@mpudat]PQtxrx disabled&& txrxmcasp@4803c000ti,am33xx-mcasp-audiohmcasp1H F@@mpudat]RStxrx disabled& & txrxrng@48310000 ti,omap4-rnghrngH1 ]omemory@80000000memory׀leds)default7@ gpio-ledsled01com:green:user A7onfixedregulator0regulator-fixedvbatLK@LK@ #,fixedregulator1regulator-fixedvmmc2Z2Z#.hdmiti,tilcdc,slaveEB )defaultoff7CIDokayleds_base)default7E gpio-ledsled01base:red:user A7offled11base:green:user F7off compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3serial4serial5d-can0d-can1usb0usb1phy0phy1ethernet0ethernet1spi0spi1mmc0mmc1mmc2device_typeregoperating-points-v2clocksclock-namesclock-latencycpu0-supplysysconphandleopp-hzopp-microvoltopp-supported-hwopp-suspendinterruptsti,hwmodspm-sramrangesreg-namesti,pm-firmware#clock-cellsclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-rate-parentti,bit-shift#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsti,rprocmboxes#dma-cellsdma-requestsdma-mastersinterrupt-controller#interrupt-cellsinterrupt-namesti,tptcsti,edma-memcpy-channelsgpio-controller#gpio-cellsstatusdmasdma-namespinctrl-namespinctrl-0vcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-compatibleregulator-always-onregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onti,dual-voltti,needs-special-resetti,needs-special-hs-handlingvmmc-supplybus-width#hwlock-cellssyscon-raminit#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-send-noirqti,mbox-txti,mbox-rxti,timer-alwonti,timer-pwmti,spi-num-csti,ctrl_mod#phy-cellsdr_modementor,multipointmentor,num-epsmentor,ram-bitsmentor,powerphys#dma-channels#dma-requests#pwm-cellscpdma_channelsale_entriesbd_ram_sizemac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftbus_freqmac-addressphy_idphy-modermii-clock-extprotect-execpool#io-channel-cellsti,no-idleti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsrb-gpiosnand-bus-widthti,nand-ecc-optgpmc,device-widthgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,clk-activation-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsti,elm-idlabeldefault-statei2cpinctrl-1