8( ` timll,omap3-devkit8000ti,omap3 +7TimLL OMAP3 Devkit8000chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000 s/connector0 |/connector1cpus+cpu@0arm,cortex-a8cpucpu(HАg8 Odp` 'ppmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+6pinmux_twl4030_pinsSAgpinmux_dss_dpi_pinsSgscm_conf@270sysconsimple-busp0+ p0gpbias_regulator@2b0ti,pbias-omap3ti,pbias-omapopbias_mmc_omap2430vpbias_mmc_omap2430w@-gclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhgmcbsp5_fckti,composite-clockgmcbsp1_mux_fck@4ti,composite-mux-clockg mcbsp1_fckti,composite-clock gmcbsp2_mux_fck@4ti,composite-mux-clock g mcbsp2_fckti,composite-clock gmcbsp3_mux_fck@68ti,composite-mux-clock hgmcbsp3_fckti,composite-clock gmcbsp4_mux_fck@68ti,composite-mux-clock hgmcbsp4_fckti,composite-clockgclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+6pinmux_twl4030_vpins Sgaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYgosc_sys_ck@d40 ti,mux-clock @gsys_ck@1270ti,divider-clockpgsys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clockgdpll4_x2_ckfixed-factor-clockcorex2_fckfixed-factor-clockgwkup_l4_ickfixed-factor-clockgMcorex2_d3_fckfixed-factor-clockgcorex2_d5_fckfixed-factor-clockgclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockg?virt_12m_ck fixed-clockgvirt_13m_ck fixed-clock]@gvirt_19200000_ck fixed-clock$gvirt_26000000_ck fixed-clockgvirt_38_4m_ck fixed-clockIgdpll4_ck@d00ti,omap3-dpll-per-clock D 0gdpll4_m2_ck@d48ti,divider-clock? Hgdpll4_m2x2_mul_ckfixed-factor-clockg dpll4_m2x2_ck@d00ti,gate-clock  %g!omap_96m_alwon_fckfixed-factor-clock!g(dpll3_ck@d00ti,omap3-dpll-core-clock @ 0gdpll3_m3_ck@1140ti,divider-clock@g"dpll3_m3x2_mul_ckfixed-factor-clock"g#dpll3_m3x2_ck@d00ti,gate-clock#  %g$emu_core_alwon_ckfixed-factor-clock$gasys_altclk fixed-clockg-mcbsp_clks fixed-clockgdpll3_m2_ck@d40ti,divider-clock @gcore_ckfixed-factor-clockg%dpll1_fck@940ti,divider-clock% @g&dpll1_ck@904ti,omap3-dpll-clock&  $ @ 4gdpll1_x2_ckfixed-factor-clockg'dpll1_x2m2_ck@944ti,divider-clock' Dg;cm_96m_fckfixed-factor-clock(g)omap_96m_fck@d40 ti,mux-clock) @gDdpll4_m3_ck@e40ti,divider-clock @g*dpll4_m3x2_mul_ckfixed-factor-clock*g+dpll4_m3x2_ck@d00ti,gate-clock+ %g,omap_54m_fck@d40 ti,mux-clock,- @g7cm_96m_d2_fckfixed-factor-clock)g.omap_48m_fck@d40 ti,mux-clock.- @g/omap_12m_fckfixed-factor-clock/gFdpll4_m4_ck@e40ti,divider-clock @g0dpll4_m4x2_mul_ckti,fixed-factor-clock0;IVg1dpll4_m4x2_ck@d00ti,gate-clock1 %Vgdpll4_m5_ck@f40ti,divider-clock?@g2dpll4_m5x2_mul_ckti,fixed-factor-clock2;IVg3dpll4_m5x2_ck@d00ti,gate-clock3 %Vgidpll4_m6_ck@1140ti,divider-clock?@g4dpll4_m6x2_mul_ckfixed-factor-clock4g5dpll4_m6x2_ck@d00ti,gate-clock5 %g6emu_per_alwon_ckfixed-factor-clock6gbclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock% pg8clkout2_src_mux_ck@d70ti,composite-mux-clock%)7 pg9clkout2_src_ckti,composite-clock89g:sys_clkout2@d70ti,divider-clock:@ pimpu_ckfixed-factor-clock;g<arm_fck@924ti,divider-clock< $emu_mpu_alwon_ckfixed-factor-clock<gcl3_ick@a40ti,divider-clock% @g=l4_ick@a40ti,divider-clock= @g>rm_ick@c40ti,divider-clock> @gpt10_gate_fck@a00ti,composite-gate-clock  g@gpt10_mux_fck@a40ti,composite-mux-clock? @gAgpt10_fckti,composite-clock@Agpt11_gate_fck@a00ti,composite-gate-clock  gBgpt11_mux_fck@a40ti,composite-mux-clock? @gCgpt11_fckti,composite-clockBCcore_96m_fckfixed-factor-clockDgmmchs2_fck@a00ti,wait-gate-clock gmmchs1_fck@a00ti,wait-gate-clock gi2c3_fck@a00ti,wait-gate-clock gi2c2_fck@a00ti,wait-gate-clock gi2c1_fck@a00ti,wait-gate-clock gmcbsp5_gate_fck@a00ti,composite-gate-clock  gmcbsp1_gate_fck@a00ti,composite-gate-clock  gcore_48m_fckfixed-factor-clock/gEmcspi4_fck@a00ti,wait-gate-clockE gmcspi3_fck@a00ti,wait-gate-clockE gmcspi2_fck@a00ti,wait-gate-clockE gmcspi1_fck@a00ti,wait-gate-clockE guart2_fck@a00ti,wait-gate-clockE guart1_fck@a00ti,wait-gate-clockE  gcore_12m_fckfixed-factor-clockFgGhdq_fck@a00ti,wait-gate-clockG gcore_l3_ickfixed-factor-clock=gHsdrc_ick@a10ti,wait-gate-clockH ggpmc_fckfixed-factor-clockHcore_l4_ickfixed-factor-clock>gImmchs2_ick@a10ti,omap3-interface-clockI gmmchs1_ick@a10ti,omap3-interface-clockI ghdq_ick@a10ti,omap3-interface-clockI gmcspi4_ick@a10ti,omap3-interface-clockI gmcspi3_ick@a10ti,omap3-interface-clockI gmcspi2_ick@a10ti,omap3-interface-clockI gmcspi1_ick@a10ti,omap3-interface-clockI gi2c3_ick@a10ti,omap3-interface-clockI gi2c2_ick@a10ti,omap3-interface-clockI gi2c1_ick@a10ti,omap3-interface-clockI guart2_ick@a10ti,omap3-interface-clockI guart1_ick@a10ti,omap3-interface-clockI  ggpt11_ick@a10ti,omap3-interface-clockI  ggpt10_ick@a10ti,omap3-interface-clockI  gmcbsp5_ick@a10ti,omap3-interface-clockI  gmcbsp1_ick@a10ti,omap3-interface-clockI  gomapctrl_ick@a10ti,omap3-interface-clockI gdss_tv_fck@e00ti,gate-clock7gdss_96m_fck@e00ti,gate-clockDgdss2_alwon_fck@e00ti,gate-clockgdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock gJgpt1_mux_fck@c40ti,composite-mux-clock? @gKgpt1_fckti,composite-clockJKaes2_ick@a10ti,omap3-interface-clockI gwkup_32k_fckfixed-factor-clock?gLgpio1_dbck@c00ti,gate-clockL gsha12_ick@a10ti,omap3-interface-clockI gwdt2_fck@c00ti,wait-gate-clockL gwdt2_ick@c10ti,omap3-interface-clockM gwdt1_ick@c10ti,omap3-interface-clockM ggpio1_ick@c10ti,omap3-interface-clockM gomap_32ksync_ick@c10ti,omap3-interface-clockM ggpt12_ick@c10ti,omap3-interface-clockM ggpt1_ick@c10ti,omap3-interface-clockM gper_96m_fckfixed-factor-clock(g per_48m_fckfixed-factor-clock/gNuart3_fck@1000ti,wait-gate-clockN ggpt2_gate_fck@1000ti,composite-gate-clockgOgpt2_mux_fck@1040ti,composite-mux-clock?@gPgpt2_fckti,composite-clockOPgpt3_gate_fck@1000ti,composite-gate-clockgQgpt3_mux_fck@1040ti,composite-mux-clock?@gRgpt3_fckti,composite-clockQRgpt4_gate_fck@1000ti,composite-gate-clockgSgpt4_mux_fck@1040ti,composite-mux-clock?@gTgpt4_fckti,composite-clockSTgpt5_gate_fck@1000ti,composite-gate-clockgUgpt5_mux_fck@1040ti,composite-mux-clock?@gVgpt5_fckti,composite-clockUVgpt6_gate_fck@1000ti,composite-gate-clockgWgpt6_mux_fck@1040ti,composite-mux-clock?@gXgpt6_fckti,composite-clockWXgpt7_gate_fck@1000ti,composite-gate-clockgYgpt7_mux_fck@1040ti,composite-mux-clock?@gZgpt7_fckti,composite-clockYZgpt8_gate_fck@1000ti,composite-gate-clock g[gpt8_mux_fck@1040ti,composite-mux-clock?@g\gpt8_fckti,composite-clock[\gpt9_gate_fck@1000ti,composite-gate-clock g]gpt9_mux_fck@1040ti,composite-mux-clock?@g^gpt9_fckti,composite-clock]^per_32k_alwon_fckfixed-factor-clock?g_gpio6_dbck@1000ti,gate-clock_ggpio5_dbck@1000ti,gate-clock_ggpio4_dbck@1000ti,gate-clock_ggpio3_dbck@1000ti,gate-clock_ggpio2_dbck@1000ti,gate-clock_ gwdt3_fck@1000ti,wait-gate-clock_ gper_l4_ickfixed-factor-clock>g`gpio6_ick@1010ti,omap3-interface-clock`ggpio5_ick@1010ti,omap3-interface-clock`ggpio4_ick@1010ti,omap3-interface-clock`ggpio3_ick@1010ti,omap3-interface-clock`ggpio2_ick@1010ti,omap3-interface-clock` gwdt3_ick@1010ti,omap3-interface-clock` guart3_ick@1010ti,omap3-interface-clock` guart4_ick@1010ti,omap3-interface-clock`ggpt9_ick@1010ti,omap3-interface-clock` ggpt8_ick@1010ti,omap3-interface-clock` ggpt7_ick@1010ti,omap3-interface-clock`ggpt6_ick@1010ti,omap3-interface-clock`ggpt5_ick@1010ti,omap3-interface-clock`ggpt4_ick@1010ti,omap3-interface-clock`ggpt3_ick@1010ti,omap3-interface-clock`ggpt2_ick@1010ti,omap3-interface-clock`gmcbsp2_ick@1010ti,omap3-interface-clock`gmcbsp3_ick@1010ti,omap3-interface-clock`gmcbsp4_ick@1010ti,omap3-interface-clock`gmcbsp2_gate_fck@1000ti,composite-gate-clockg mcbsp3_gate_fck@1000ti,composite-gate-clockg mcbsp4_gate_fck@1000ti,composite-gate-clockgemu_src_mux_ck@1140 ti,mux-clockabc@gdemu_src_ckti,clkdm-gate-clockdgepclk_fck@1140ti,divider-clocke@pclkx2_fck@1140ti,divider-clocke@atclk_fck@1140ti,divider-clocke@traceclk_src_fck@1140 ti,mux-clockabc@gftraceclk_fck@1140ti,divider-clockf @secure_32k_fck fixed-clockgggpt12_fckfixed-factor-clockgwdt1_fckfixed-factor-clockgsecurity_l4_ick2fixed-factor-clock>ghaes1_ick@a14ti,omap3-interface-clockh rng_ick@a14ti,omap3-interface-clockh sha11_ick@a14ti,omap3-interface-clockh des1_ick@a14ti,omap3-interface-clockh cam_mclk@f00ti,gate-clockiVcam_ick@f10!ti,omap3-no-wait-interface-clock>gcsi2_96m_fck@f00ti,gate-clockgsecurity_l3_ickfixed-factor-clock=gjpka_ick@a14ti,omap3-interface-clockj icr_ick@a10ti,omap3-interface-clockI des2_ick@a10ti,omap3-interface-clockI mspro_ick@a10ti,omap3-interface-clockI mailboxes_ick@a10ti,omap3-interface-clockI ssi_l4_ickfixed-factor-clock>gqsr1_fck@c00ti,wait-gate-clock gsr2_fck@c00ti,wait-gate-clock gsr_l4_ickfixed-factor-clock>dpll2_fck@40ti,divider-clock%@gkdpll2_ck@4ti,omap3-dpll-clockk$@4gldpll2_m2_ck@44ti,divider-clocklDgmiva2_ck@0ti,wait-gate-clockmgmodem_fck@a00ti,omap3-interface-clock gsad2d_ick@a10ti,omap3-interface-clock= gmad2d_ick@a18ti,omap3-interface-clock= gmspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock gnssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock @$gossi_ssr_fck_3430es2ti,composite-clocknogpssi_sst_fck_3430es2fixed-factor-clockpghsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockH gssi_ick_3430es2@a10ti,omap3-ssi-interface-clockq gusim_gate_fck@c00ti,composite-gate-clockD  g|sys_d2_ckfixed-factor-clockgsomap_96m_d2_fckfixed-factor-clockDgtomap_96m_d4_fckfixed-factor-clockDguomap_96m_d8_fckfixed-factor-clockDgvomap_96m_d10_fckfixed-factor-clockD gwdpll5_m2_d4_ckfixed-factor-clockrgxdpll5_m2_d8_ckfixed-factor-clockrgydpll5_m2_d16_ckfixed-factor-clockrgzdpll5_m2_d20_ckfixed-factor-clockrg{usim_mux_fck@c40ti,composite-mux-clock(stuvwxyz{ @g}usim_fckti,composite-clock|}usim_ick@c10ti,omap3-interface-clockM  gdpll5_ck@d04ti,omap3-dpll-clock  $ L 4g~dpll5_m2_ck@d50ti,divider-clock~ Pgrsgx_gate_fck@b00ti,composite-gate-clock% gcore_d3_ckfixed-factor-clock%gcore_d4_ckfixed-factor-clock%gcore_d6_ckfixed-factor-clock%gomap_192m_alwon_fckfixed-factor-clock!gcore_d2_ckfixed-factor-clock%gsgx_mux_fck@b40ti,composite-mux-clock ) @gsgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clock= gcpefuse_fck@a08ti,gate-clock gts_fck@a08ti,gate-clock? gusbtll_fck@a08ti,wait-gate-clockr gusbtll_ick@a18ti,omap3-interface-clockI gmmchs3_ick@a10ti,omap3-interface-clockI gmmchs3_fck@a00ti,wait-gate-clock gdss1_alwon_fck_3430es2@e00ti,dss-gate-clockVgdss_ick_3430es2@e10ti,omap3-dss-interface-clock>gusbhost_120m_fck@1400ti,gate-clockrgusbhost_48m_fck@1400ti,dss-gate-clock/gusbhost_ick@1410ti,omap3-dss-interface-clock>gclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainedpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainld2d_clkdmti,clockdomain dpll5_clkdmti,clockdomain~sgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH gdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `dmaggpio@48310000ti,omap3-gpioH1gpio1ggpio@49050000ti,omap3-gpioIgpio2gpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4gpio@49056000ti,omap3-gpioI`!gpio5gpio@49058000ti,omap3-gpioI"gpio6gserial@4806a000ti,omap3-uartH  H12txrxuart1lserial@4806c000ti,omap3-uartH I34txrxuart2lserial@49020000ti,omap3-uartI J56txrxuart3li2c@48070000 ti,omap3-i2cH8txrx+i2c1'@twl@48H ti,twl4030 default.audioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci 8F Rvacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@gregulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0gregulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5gregulator-vusb1v8ti,twl4030-vusb1v8gregulator-vusb3v1ti,twl4030-vusb3v1gregulator-vpll1ti,twl4030-vpll1 vvdds_dsiw@w@gregulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-ggpioti,twl4030-gpiocogtwl4030-usbti,twl4030-usb |pwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadD?  @A Bsrmadcti,twl4030-madcgi2c@48072000 ti,omap3-i2cH 9txrx+i2c2gi2c@48060000 ti,omap3-i2cH=txrx+i2c3 disabledmailbox@48094000ti,omap3-mailboxmailboxH @,dsp > Ispi@48098000ti,omap2-mcspiH A+mcspi1T@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi2T +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3T tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4TFGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1b=>txrxo|mmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrx disabledmmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_ispgmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2 disabledmcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrxfck disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxfckickokaygmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1Erxtimer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11timer@48304000ti,omap3430-timerH0@_timer12usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ohci@48064400ti,ohci-omap3HDL/ehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcnrxtxGS+ 0,gnand@0,0ti,omap2-nand  etsw,,",(6,@;RLR](o+x-loader@0 X-Loaderbootloaders@80000U-Bootbootloaders_env@260000 U-Boot Env&kernel@280000Kernel(@filesystem@680000 File Systemhethernet@6,0davicom,dm9000 t06 6;L,4ZKZe}o]usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs dss@48050000 ti,omap3-dssHok dss_corefck+ default.dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH ok dss_vencfckportendpointgport+endpoint@0gendpoint@1ssi-controller@48058000 ti,omap3-ssissiokHHsysgddGgdd_mpu+ p ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+6isp@480bc000 ti,omap3-ispH H |ol ports+bandgap@48002524H%$ti,omap34xx-bandgapgtarget-module@480cb000ti,sysc-omap3430-srti,syscsmartreflex_coreH $sysc,fck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3430-srti,syscsmartreflex_mpu_ivaH $sysc,fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivathermal-zonescpu_thermal9O]N jmemory@80000000memoryleds gpio-ledsheartbeatdevkit8000::led1 zon heartbeatmmcdevkit8000::led2 zonnoneusrdevkit8000::led3 zonusrpmu_statdevkit8000::pmu_stat zsoundti,omap-twl4030 devkit8000IExt SpkPREDRIVELExt SpkPREDRIVERMAINMICMain MicMain MicMic Bias 1gpio_keys gpio-keysuseruser zencoder0 ti,tfp410 ports+port@0endpointgport@1endpointgconnector0dvi-connectordviportendpointgconnector1svideo-connectortvportendpointg compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2display1display2device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyio-channelsio-channel-namesti,use-ledsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-width#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-size#sound-dai-cellsti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthdavicom,no-eepromgpmc,mux-add-datagpmc,wait-pingpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsmultipointnum-epsram-bitsvdds_dsi-supplyvdda_dac-supplyvdda-supplyremote-endpointti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellsti,sysc-maskpolling-delay-passivepolling-delaycoefficientsthermal-sensorsgpiosdefault-statelinux,default-triggerti,modelti,mcbspti,audio-routinglinux,codewakeup-sourcepowerdown-gpiosdigitalddc-i2c-bus