)8( T'ti,omap3-evm-37xxti,omap3630ti,omap3 +7TI OMAP37XX EVM (TMDSEVM3730)chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000 {/displaycpus+cpu@0arm,cortex-a8cpucpus 'O 57pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+#A^defaultlvpinmux_twl4030_pins~Avpinmux_dss_dpi_pins2~vpinmux_mmc1_pinsP~ "$&vpinmux_mmc2_pins0~(*,.02vpinmux_uart3_pins~nApvpinmux_ehci_port_select_pins~vpinmux_hsusb2_pins0~      vpinmux_wl12xx_gpio~PNvpinmux_smsc911x_pins~vscm_conf@270sysconsimple-busp0+ p0vpbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-vclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhv mcbsp5_fckti,composite-clock vmcbsp1_mux_fck@4ti,composite-mux-clockv mcbsp1_fckti,composite-clock vmcbsp2_mux_fck@4ti,composite-mux-clock vmcbsp2_fckti,composite-clockvmcbsp3_mux_fck@68ti,composite-mux-clock hvmcbsp3_fckti,composite-clockvmcbsp4_mux_fck@68ti,composite-mux-clock hvmcbsp4_fckti,composite-clockvclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+#Apinmux_twl4030_vpins ~vpinmux_dss_dpi_pins10~  vaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYvosc_sys_ck@d40 ti,mux-clock @vsys_ck@1270ti,divider-clockpv sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock3>dpll3_m2x2_ckfixed-factor-clock3>vdpll4_x2_ckfixed-factor-clock3>corex2_fckfixed-factor-clock3>v!wkup_l4_ickfixed-factor-clock 3>vPcorex2_d3_fckfixed-factor-clock!3>vcorex2_d5_fckfixed-factor-clock!3>vclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockvBvirt_12m_ck fixed-clockvvirt_13m_ck fixed-clock]@vvirt_19200000_ck fixed-clock$vvirt_26000000_ck fixed-clockvvirt_38_4m_ck fixed-clockIvdpll4_ck@d00ti,omap3-dpll-per-j-type-clock  D 0vdpll4_m2_ck@d48ti,divider-clock? Hv"dpll4_m2x2_mul_ckfixed-factor-clock"3>v#dpll4_m2x2_ck@d00ti,hsdiv-gate-clock# Hv$omap_96m_alwon_fckfixed-factor-clock$3>v+dpll3_ck@d00ti,omap3-dpll-core-clock  @ 0vdpll3_m3_ck@1140ti,divider-clock@v%dpll3_m3x2_mul_ckfixed-factor-clock%3>v&dpll3_m3x2_ck@d00ti,hsdiv-gate-clock&  Hv'emu_core_alwon_ckfixed-factor-clock'3>vdsys_altclk fixed-clockv0mcbsp_clks fixed-clockvdpll3_m2_ck@d40ti,divider-clock @vcore_ckfixed-factor-clock3>v(dpll1_fck@940ti,divider-clock( @v)dpll1_ck@904ti,omap3-dpll-clock )  $ @ 4vdpll1_x2_ckfixed-factor-clock3>v*dpll1_x2m2_ck@944ti,divider-clock* Dv>cm_96m_fckfixed-factor-clock+3>v,omap_96m_fck@d40 ti,mux-clock,  @vGdpll4_m3_ck@e40ti,divider-clock @v-dpll4_m3x2_mul_ckfixed-factor-clock-3>v.dpll4_m3x2_ck@d00ti,hsdiv-gate-clock. Hv/omap_54m_fck@d40 ti,mux-clock/0 @v:cm_96m_d2_fckfixed-factor-clock,3>v1omap_48m_fck@d40 ti,mux-clock10 @v2omap_12m_fckfixed-factor-clock23>vIdpll4_m4_ck@e40ti,divider-clock @v3dpll4_m4x2_mul_ckti,fixed-factor-clock3^lyv4dpll4_m4x2_ck@d00ti,gate-clock4 Hyvdpll4_m5_ck@f40ti,divider-clock?@v5dpll4_m5x2_mul_ckti,fixed-factor-clock5^lyv6dpll4_m5x2_ck@d00ti,hsdiv-gate-clock6 Hyvldpll4_m6_ck@1140ti,divider-clock?@v7dpll4_m6x2_mul_ckfixed-factor-clock73>v8dpll4_m6x2_ck@d00ti,hsdiv-gate-clock8 Hv9emu_per_alwon_ckfixed-factor-clock93>veclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock( pv;clkout2_src_mux_ck@d70ti,composite-mux-clock( ,: pv<clkout2_src_ckti,composite-clock;<v=sys_clkout2@d70ti,divider-clock=@ pmpu_ckfixed-factor-clock>3>v?arm_fck@924ti,divider-clock? $emu_mpu_alwon_ckfixed-factor-clock?3>vfl3_ick@a40ti,divider-clock( @v@l4_ick@a40ti,divider-clock@ @vArm_ick@c40ti,divider-clockA @gpt10_gate_fck@a00ti,composite-gate-clock   vCgpt10_mux_fck@a40ti,composite-mux-clockB  @vDgpt10_fckti,composite-clockCDgpt11_gate_fck@a00ti,composite-gate-clock   vEgpt11_mux_fck@a40ti,composite-mux-clockB  @vFgpt11_fckti,composite-clockEFcore_96m_fckfixed-factor-clockG3>vmmchs2_fck@a00ti,wait-gate-clock vmmchs1_fck@a00ti,wait-gate-clock vi2c3_fck@a00ti,wait-gate-clock vi2c2_fck@a00ti,wait-gate-clock vi2c1_fck@a00ti,wait-gate-clock vmcbsp5_gate_fck@a00ti,composite-gate-clock  v mcbsp1_gate_fck@a00ti,composite-gate-clock  v core_48m_fckfixed-factor-clock23>vHmcspi4_fck@a00ti,wait-gate-clockH vmcspi3_fck@a00ti,wait-gate-clockH vmcspi2_fck@a00ti,wait-gate-clockH vmcspi1_fck@a00ti,wait-gate-clockH vuart2_fck@a00ti,wait-gate-clockH vuart1_fck@a00ti,wait-gate-clockH  vcore_12m_fckfixed-factor-clockI3>vJhdq_fck@a00ti,wait-gate-clockJ vcore_l3_ickfixed-factor-clock@3>vKsdrc_ick@a10ti,wait-gate-clockK vgpmc_fckfixed-factor-clockK3>core_l4_ickfixed-factor-clockA3>vLmmchs2_ick@a10ti,omap3-interface-clockL vmmchs1_ick@a10ti,omap3-interface-clockL vhdq_ick@a10ti,omap3-interface-clockL vmcspi4_ick@a10ti,omap3-interface-clockL vmcspi3_ick@a10ti,omap3-interface-clockL vmcspi2_ick@a10ti,omap3-interface-clockL vmcspi1_ick@a10ti,omap3-interface-clockL vi2c3_ick@a10ti,omap3-interface-clockL vi2c2_ick@a10ti,omap3-interface-clockL vi2c1_ick@a10ti,omap3-interface-clockL vuart2_ick@a10ti,omap3-interface-clockL vuart1_ick@a10ti,omap3-interface-clockL  vgpt11_ick@a10ti,omap3-interface-clockL  vgpt10_ick@a10ti,omap3-interface-clockL  vmcbsp5_ick@a10ti,omap3-interface-clockL  vmcbsp1_ick@a10ti,omap3-interface-clockL  vomapctrl_ick@a10ti,omap3-interface-clockL vdss_tv_fck@e00ti,gate-clock:vdss_96m_fck@e00ti,gate-clockGvdss2_alwon_fck@e00ti,gate-clock vdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock  vMgpt1_mux_fck@c40ti,composite-mux-clockB  @vNgpt1_fckti,composite-clockMNaes2_ick@a10ti,omap3-interface-clockL vwkup_32k_fckfixed-factor-clockB3>vOgpio1_dbck@c00ti,gate-clockO vsha12_ick@a10ti,omap3-interface-clockL vwdt2_fck@c00ti,wait-gate-clockO vwdt2_ick@c10ti,omap3-interface-clockP vwdt1_ick@c10ti,omap3-interface-clockP vgpio1_ick@c10ti,omap3-interface-clockP vomap_32ksync_ick@c10ti,omap3-interface-clockP vgpt12_ick@c10ti,omap3-interface-clockP vgpt1_ick@c10ti,omap3-interface-clockP vper_96m_fckfixed-factor-clock+3>v per_48m_fckfixed-factor-clock23>vQuart3_fck@1000ti,wait-gate-clockQ vgpt2_gate_fck@1000ti,composite-gate-clock vRgpt2_mux_fck@1040ti,composite-mux-clockB @vSgpt2_fckti,composite-clockRSgpt3_gate_fck@1000ti,composite-gate-clock vTgpt3_mux_fck@1040ti,composite-mux-clockB @vUgpt3_fckti,composite-clockTUgpt4_gate_fck@1000ti,composite-gate-clock vVgpt4_mux_fck@1040ti,composite-mux-clockB @vWgpt4_fckti,composite-clockVWgpt5_gate_fck@1000ti,composite-gate-clock vXgpt5_mux_fck@1040ti,composite-mux-clockB @vYgpt5_fckti,composite-clockXYgpt6_gate_fck@1000ti,composite-gate-clock vZgpt6_mux_fck@1040ti,composite-mux-clockB @v[gpt6_fckti,composite-clockZ[gpt7_gate_fck@1000ti,composite-gate-clock v\gpt7_mux_fck@1040ti,composite-mux-clockB @v]gpt7_fckti,composite-clock\]gpt8_gate_fck@1000ti,composite-gate-clock  v^gpt8_mux_fck@1040ti,composite-mux-clockB @v_gpt8_fckti,composite-clock^_gpt9_gate_fck@1000ti,composite-gate-clock  v`gpt9_mux_fck@1040ti,composite-mux-clockB @vagpt9_fckti,composite-clock`aper_32k_alwon_fckfixed-factor-clockB3>vbgpio6_dbck@1000ti,gate-clockbvgpio5_dbck@1000ti,gate-clockbvgpio4_dbck@1000ti,gate-clockbvgpio3_dbck@1000ti,gate-clockbvgpio2_dbck@1000ti,gate-clockb vwdt3_fck@1000ti,wait-gate-clockb vper_l4_ickfixed-factor-clockA3>vcgpio6_ick@1010ti,omap3-interface-clockcvgpio5_ick@1010ti,omap3-interface-clockcvgpio4_ick@1010ti,omap3-interface-clockcvgpio3_ick@1010ti,omap3-interface-clockcvgpio2_ick@1010ti,omap3-interface-clockc vwdt3_ick@1010ti,omap3-interface-clockc vuart3_ick@1010ti,omap3-interface-clockc vuart4_ick@1010ti,omap3-interface-clockcvgpt9_ick@1010ti,omap3-interface-clockc vgpt8_ick@1010ti,omap3-interface-clockc vgpt7_ick@1010ti,omap3-interface-clockcvgpt6_ick@1010ti,omap3-interface-clockcvgpt5_ick@1010ti,omap3-interface-clockcvgpt4_ick@1010ti,omap3-interface-clockcvgpt3_ick@1010ti,omap3-interface-clockcvgpt2_ick@1010ti,omap3-interface-clockcvmcbsp2_ick@1010ti,omap3-interface-clockcvmcbsp3_ick@1010ti,omap3-interface-clockcvmcbsp4_ick@1010ti,omap3-interface-clockcvmcbsp2_gate_fck@1000ti,composite-gate-clockvmcbsp3_gate_fck@1000ti,composite-gate-clockvmcbsp4_gate_fck@1000ti,composite-gate-clockvemu_src_mux_ck@1140 ti,mux-clock def@vgemu_src_ckti,clkdm-gate-clockgvhpclk_fck@1140ti,divider-clockh@pclkx2_fck@1140ti,divider-clockh@atclk_fck@1140ti,divider-clockh@traceclk_src_fck@1140 ti,mux-clock def@vitraceclk_fck@1140ti,divider-clocki @secure_32k_fck fixed-clockvjgpt12_fckfixed-factor-clockj3>wdt1_fckfixed-factor-clockj3>security_l4_ick2fixed-factor-clockA3>vkaes1_ick@a14ti,omap3-interface-clockk rng_ick@a14ti,omap3-interface-clockk sha11_ick@a14ti,omap3-interface-clockk des1_ick@a14ti,omap3-interface-clockk cam_mclk@f00ti,gate-clocklycam_ick@f10!ti,omap3-no-wait-interface-clockAvcsi2_96m_fck@f00ti,gate-clockvsecurity_l3_ickfixed-factor-clock@3>vmpka_ick@a14ti,omap3-interface-clockm icr_ick@a10ti,omap3-interface-clockL des2_ick@a10ti,omap3-interface-clockL mspro_ick@a10ti,omap3-interface-clockL mailboxes_ick@a10ti,omap3-interface-clockL ssi_l4_ickfixed-factor-clockA3>vtsr1_fck@c00ti,wait-gate-clock  v sr2_fck@c00ti,wait-gate-clock  v sr_l4_ickfixed-factor-clockA3>dpll2_fck@40ti,divider-clock(@vndpll2_ck@4ti,omap3-dpll-clock n$@4vodpll2_m2_ck@44ti,divider-clockoDvpiva2_ck@0ti,wait-gate-clockpvmodem_fck@a00ti,omap3-interface-clock  vsad2d_ick@a10ti,omap3-interface-clock@ vmad2d_ick@a18ti,omap3-interface-clock@ vmspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock! vqssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock! @$vrssi_ssr_fck_3430es2ti,composite-clockqrvsssi_sst_fck_3430es2fixed-factor-clocks3>vhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockK vssi_ick_3430es2@a10ti,omap3-ssi-interface-clockt vusim_gate_fck@c00ti,composite-gate-clockG  vsys_d2_ckfixed-factor-clock 3>vvomap_96m_d2_fckfixed-factor-clockG3>vwomap_96m_d4_fckfixed-factor-clockG3>vxomap_96m_d8_fckfixed-factor-clockG3>vyomap_96m_d10_fckfixed-factor-clockG3> vzdpll5_m2_d4_ckfixed-factor-clocku3>v{dpll5_m2_d8_ckfixed-factor-clocku3>v|dpll5_m2_d16_ckfixed-factor-clocku3>v}dpll5_m2_d20_ckfixed-factor-clocku3>v~usim_mux_fck@c40ti,composite-mux-clock( vwxyz{|}~ @vusim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockP  vdpll5_ck@d04ti,omap3-dpll-clock   $ L 4vdpll5_m2_ck@d50ti,divider-clock Pvusgx_gate_fck@b00ti,composite-gate-clock( vcore_d3_ckfixed-factor-clock(3>vcore_d4_ckfixed-factor-clock(3>vcore_d6_ckfixed-factor-clock(3>vomap_192m_alwon_fckfixed-factor-clock$3>vcore_d2_ckfixed-factor-clock(3>vsgx_mux_fck@b40ti,composite-mux-clock , @vsgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clock@ vcpefuse_fck@a08ti,gate-clock  vts_fck@a08ti,gate-clockB vusbtll_fck@a08ti,wait-gate-clocku vusbtll_ick@a18ti,omap3-interface-clockL vmmchs3_ick@a10ti,omap3-interface-clockL vmmchs3_fck@a00ti,wait-gate-clock vdss1_alwon_fck_3430es2@e00ti,dss-gate-clockyvdss_ick_3430es2@e10ti,omap3-dss-interface-clockAvusbhost_120m_fck@1400ti,gate-clockuvusbhost_48m_fck@1400ti,dss-gate-clock2vusbhost_ick@1410ti,omap3-dss-interface-clockAvuart4_fck@1000ti,wait-gate-clockQvclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainhdpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainod2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH vdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `dmavgpio@48310000ti,omap3-gpioH1gpio1#v gpio@49050000ti,omap3-gpioIgpio2#en_usb2_port/8>Ienable usb2 portgpio@49052000ti,omap3-gpioI gpio3#gpio@49054000ti,omap3-gpioI@ gpio4#gpio@49056000ti,omap3-gpioI`!gpio5#vgpio@49058000ti,omap3-gpioI"gpio6#vserial@4806a000ti,omap3-uartH SHR12txrxuart1lserial@4806c000ti,omap3-uartHSIJ34txrxuart2lserial@49020000ti,omap3-uartISJn56txrxuart3l^defaultli2c@48070000 ti,omap3-i2cH8txrx+i2c1'@twl@48H  ti,twl4030^defaultlrtcti,twl4030-rtc bciti,twl4030-bci gu vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2usb_1v8w@w@regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' vregulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0vregulator-vmmc2ti,twl4030-vmmc2:0vregulator-vusb1v5ti,twl4030-vusb1v5vregulator-vusb1v8ti,twl4030-vusb1v8vregulator-vusb3v1ti,twl4030-vusb3v1vregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@vregulator-vsimti,twl4030-vsimw@-vgpioti,twl4030-gpio#ven_on_board_gpio_61/8>Ien_hsusb2_clktwl4030-usbti,twl4030-usb vpwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypad 8  7 Smadcti,twl4030-madc+vpower1ti,twl4030-power-omap3-evmti,twl4030-power-idle=i2c@48072000 ti,omap3-i2cH 9txrx+i2c2i2c@48060000 ti,omap3-i2cH=txrx+i2c3tvp5146@5c ti,tvp5146m2\mailbox@48094000ti,omap3-mailboxmailboxH @MYkdsp } spi@48098000ti,omap2-mcspiH A+mcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3tsc2046@0 ti,tsc2046B@@(   spi@4809a000ti,omap2-mcspiH B+mcspi2 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1(=>txrx5SSBN[^defaultlmmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrxBe[s+^defaultlwlcore@2 ti,wl1271 Immc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_ispv mmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrxfck disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxfckick disabledmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1Erxtimer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11timer@48304000ti,omap3430-timerH0@_timer12!usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ 1ehci-phyohci@48064400ti,ohci-omap3HDL<ehci@48064800 ti,ehci-omapHHMTgpmc@6e000000ti,omap3430-gpmcgpmcnrxtxYe+# 0,vethernet@gpmcsmsc,lan9221smsc,lan9115w (/-=L-ZizxKK,>N\i  ^defaultlnand@0,0ti,omap2-nand  hynix,h8kds0un0mer-4embch8,, ",Z(=6@iRzR,(+partition@0 X-Loaderpartition@80000U-Bootpartition@1c0000 Environment$partition@280000Kernel(Ppartition@780000 Filesystemxusb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs T usb2-phy 2dss@48050000 ti,omap3-dssHok dss_corefck+  ^defaultldispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  disabled dss_vencfcktv_dac_clkportendpoint ) 9vssi-controller@48058000 ti,omap3-ssissiokHHsysgddGgdd_mpu+ s ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFserial@49042000ti,omap3-uartI PQRtxrxuart4lregulator-abb-mpu ti,abb-v1 abb_mpu_iva+H0rH0hbase-addressint-address D  ] n` ~sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\+#A^defaultlpinmux_ehci_phy_pins~JLvpinmux_hsusb2_2_pins0~PRT V X Z visp@480bc000 ti,omap3-ispH H    ports+bandgap@48002524H%$ti,omap36xx-bandgap v target-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_coreH 8sysc   fck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaH 8sysc   fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivathermal-zonescpu_thermal   N   regulator-vddvarioregulator-fixed vddvariovregulator-vdd33aregulator-fixedvdd33avhsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z #  p vhsusb2_phyusb-nop-xceiv 3 ^defaultlvleds gpio-ledsledbomap3evm::ledb 8 ?default-onwl12xx_vmmcregulator-fixedvwl1271w@w@ # p  U^defaultlvbacklightgpio-backlight ` 8regulator-lcd-3v3regulator-fixedlcd_3v32Z2Z p #vdisplaysharp,ls037v7dw01lcd k x  3$   portendpoint )vmemory@80000000memory compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3display0device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0phandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsgpio-hoggpiosoutput-lowline-nameinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesregulator-always-onti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsti,use_poweroff#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencyvcc-supplyti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,swap-xywakeup-sourcependown-gpioti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-widthnon-removablecap-power-off-cardref-clock-frequencystatus#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-size#sound-dai-cellsti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsbank-widthgpmc,device-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addresslinux,mtd-namenand-bus-widthti,nand-ecc-optgpmc,sync-clk-pslabelmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda_video-supplyremote-endpointdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsti,sysc-maskti,sysc-sidlepolling-delay-passivepolling-delaycoefficientsthermal-sensorsstartup-delay-usenable-active-highreset-gpioslinux,default-triggervin-supplydefault-onpower-supplyenvdd-supplyenable-gpiosmode-gpios