8( Dgumstix,omap3-overo-palo43gumstix,omap3-overoti,omap36xxti,omap3 +/7OMAP36xx/AM37xx/DM37xx Gumstix Overo on Palo43chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000 {/displaycpus+cpu@0arm,cortex-a8cpucpus 'O 57pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+5Rdefault`jpinmux_uart2_pins r<>@Bjpinmux_i2c1_pinsrjpinmux_mmc1_pins0rjpinmux_mmc2_pins0r(*,.02jpinmux_w3cbw003c_pinsrljpinmux_hsusb2_pins@r      jpinmux_twl4030_pinsrAjpinmux_i2c3_pinsrjpinmux_uart3_pinsrnpjpinmux_dss_dpi_pinsrjpinmux_lte430_pinsrDjpinmux_backlight_pinsrFjpinmux_mcspi1_pins rjpinmux_ads7846_pinsr jscm_conf@270sysconsimple-busp0+ p0jpbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-jclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhjmcbsp5_fckti,composite-clockjmcbsp1_mux_fck@4ti,composite-mux-clockj mcbsp1_fckti,composite-clock jmcbsp2_mux_fck@4ti,composite-mux-clock j mcbsp2_fckti,composite-clock jmcbsp3_mux_fck@68ti,composite-mux-clock hjmcbsp3_fckti,composite-clockjmcbsp4_mux_fck@68ti,composite-mux-clock hjmcbsp4_fckti,composite-clockjclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+5pinmux_twl4030_vpins rjaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYjosc_sys_ck@d40 ti,mux-clock @jsys_ck@1270ti,divider-clockpjsys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock'2dpll3_m2x2_ckfixed-factor-clock'2jdpll4_x2_ckfixed-factor-clock'2corex2_fckfixed-factor-clock'2jwkup_l4_ickfixed-factor-clock'2jNcorex2_d3_fckfixed-factor-clock'2jcorex2_d5_fckfixed-factor-clock'2jclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockj@virt_12m_ck fixed-clockjvirt_13m_ck fixed-clock]@jvirt_19200000_ck fixed-clock$jvirt_26000000_ck fixed-clockjvirt_38_4m_ck fixed-clockIjdpll4_ck@d00ti,omap3-dpll-per-j-type-clock D 0jdpll4_m2_ck@d48ti,divider-clock? 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pwm-ledsoveroovero:blue:COM  w5  mmc0soundti,omap-twl4030 overo  hsusb2_power_regregulator-fixed hsusb2_vbusLK@LK@  p jhsusb2_phyusb-nop-xceiv #jregulator-w3cbw003c-npoweronregulator-fixedregulator-w3cbw003c-npoweron2Z2Z  jregulator-w3cbw003c-wifi-nresetRdefault`regulator-fixed regulator-w3cbw003c-wifi-nreset2Z2Z  'jlis33-3v3-regregulator-fixedlis33-3v3-reg2Z2Zjlis33-1v8-regregulator-fixedlis33-1v8-regw@w@jdisplaysamsung,lte430wq-f0cpanel-dpilcd43Rdefault` /portendpointjpanel-timinga < D L Y e) o {     ads7846-regregulator-fixed ads7846-reg2Z2Zjbacklightgpio-backlightRdefault` ) leds gpio-ledsRdefault`heartbeatovero:red:gpio21 ) heartbeatgpio22overo:blue:gpio22 )gpio_keys gpio-keysRdefault`+button0button0  )'button1button1  )' compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3display0device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0phandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesregulator-always-onti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsstatuspagesizeVdd-supplyVdd_IO-supplyst,click-single-xst,click-single-yst,click-single-zst,click-thresh-xst,click-thresh-yst,click-thresh-zst,irq1-clickst,irq2-clickst,wakeup-x-lost,wakeup-x-hist,wakeup-y-lost,wakeup-y-hist,wakeup-z-lost,wakeup-z-hist,min-limit-xst,min-limit-yst,min-limit-zst,max-limit-xst,max-limit-yst,max-limit-z#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxwakeup-sourceti,dual-voltpbias-supplyvmmc-supplybus-widthvqmmc-supplycap-sdio-irqnon-removable#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-size#sound-dai-cellsti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerremote-endpointdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsti,sysc-maskti,sysc-sidlepolling-delay-passivepolling-delaycoefficientsthermal-sensorspwmsmax-brightnesslinux,default-triggerti,modelti,mcbspstartup-delay-usenable-active-highreset-gpiosenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activedefault-onlinux,code