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HV dpll4_m2x2_mul_ckfixed-factor-clock V!dpll4_m2x2_ck@d00ti,gate-clock! (V"omap_96m_alwon_fckfixed-factor-clock"V)dpll3_ck@d00ti,omap3-dpll-core-clock @ 0Vdpll3_m3_ck@1140ti,divider-clock@V#dpll3_m3x2_mul_ckfixed-factor-clock#V$dpll3_m3x2_ck@d00ti,gate-clock$  (V%emu_core_alwon_ckfixed-factor-clock%Vbsys_altclk fixed-clockV.mcbsp_clks fixed-clockVdpll3_m2_ck@d40ti,divider-clock @Vcore_ckfixed-factor-clockV&dpll1_fck@940ti,divider-clock& @V'dpll1_ck@904ti,omap3-dpll-clock'  $ @ 4Vdpll1_x2_ckfixed-factor-clockV(dpll1_x2m2_ck@944ti,divider-clock( DV<cm_96m_fckfixed-factor-clock)V*omap_96m_fck@d40 ti,mux-clock* @VEdpll4_m3_ck@e40ti,divider-clock @V+dpll4_m3x2_mul_ckfixed-factor-clock+V,dpll4_m3x2_ck@d00ti,gate-clock, (V-omap_54m_fck@d40 ti,mux-clock-. @V8cm_96m_d2_fckfixed-factor-clock*V/omap_48m_fck@d40 ti,mux-clock/. @V0omap_12m_fckfixed-factor-clock0VGdpll4_m4_ck@e40ti,divider-clock @V1dpll4_m4x2_mul_ckti,fixed-factor-clock1>LYV2dpll4_m4x2_ck@d00ti,gate-clock2 (YVdpll4_m5_ck@f40ti,divider-clock?@V3dpll4_m5x2_mul_ckti,fixed-factor-clock3>LYV4dpll4_m5x2_ck@d00ti,gate-clock4 (YVjdpll4_m6_ck@1140ti,divider-clock?@V5dpll4_m6x2_mul_ckfixed-factor-clock5V6dpll4_m6x2_ck@d00ti,gate-clock6 (V7emu_per_alwon_ckfixed-factor-clock7Vcclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock& pV9clkout2_src_mux_ck@d70ti,composite-mux-clock&*8 pV:clkout2_src_ckti,composite-clock9:V;sys_clkout2@d70ti,divider-clock;@ plmpu_ckfixed-factor-clock<V=arm_fck@924ti,divider-clock= $emu_mpu_alwon_ckfixed-factor-clock=Vdl3_ick@a40ti,divider-clock& @V>l4_ick@a40ti,divider-clock> @V?rm_ick@c40ti,divider-clock? @gpt10_gate_fck@a00ti,composite-gate-clock  VAgpt10_mux_fck@a40ti,composite-mux-clock@ @VBgpt10_fckti,composite-clockABgpt11_gate_fck@a00ti,composite-gate-clock  VCgpt11_mux_fck@a40ti,composite-mux-clock@ @VDgpt11_fckti,composite-clockCDcore_96m_fckfixed-factor-clockEVmmchs2_fck@a00ti,wait-gate-clock Vmmchs1_fck@a00ti,wait-gate-clock Vi2c3_fck@a00ti,wait-gate-clock Vi2c2_fck@a00ti,wait-gate-clock Vi2c1_fck@a00ti,wait-gate-clock Vmcbsp5_gate_fck@a00ti,composite-gate-clock  Vmcbsp1_gate_fck@a00ti,composite-gate-clock  V core_48m_fckfixed-factor-clock0VFmcspi4_fck@a00ti,wait-gate-clockF Vmcspi3_fck@a00ti,wait-gate-clockF Vmcspi2_fck@a00ti,wait-gate-clockF Vmcspi1_fck@a00ti,wait-gate-clockF Vuart2_fck@a00ti,wait-gate-clockF Vuart1_fck@a00ti,wait-gate-clockF  Vcore_12m_fckfixed-factor-clockGVHhdq_fck@a00ti,wait-gate-clockH Vcore_l3_ickfixed-factor-clock>VIsdrc_ick@a10ti,wait-gate-clockI Vgpmc_fckfixed-factor-clockIcore_l4_ickfixed-factor-clock?VJmmchs2_ick@a10ti,omap3-interface-clockJ Vmmchs1_ick@a10ti,omap3-interface-clockJ Vhdq_ick@a10ti,omap3-interface-clockJ Vmcspi4_ick@a10ti,omap3-interface-clockJ Vmcspi3_ick@a10ti,omap3-interface-clockJ Vmcspi2_ick@a10ti,omap3-interface-clockJ Vmcspi1_ick@a10ti,omap3-interface-clockJ Vi2c3_ick@a10ti,omap3-interface-clockJ Vi2c2_ick@a10ti,omap3-interface-clockJ Vi2c1_ick@a10ti,omap3-interface-clockJ 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per_48m_fckfixed-factor-clock0VOuart3_fck@1000ti,wait-gate-clockO Vgpt2_gate_fck@1000ti,composite-gate-clockVPgpt2_mux_fck@1040ti,composite-mux-clock@@VQgpt2_fckti,composite-clockPQgpt3_gate_fck@1000ti,composite-gate-clockVRgpt3_mux_fck@1040ti,composite-mux-clock@@VSgpt3_fckti,composite-clockRSgpt4_gate_fck@1000ti,composite-gate-clockVTgpt4_mux_fck@1040ti,composite-mux-clock@@VUgpt4_fckti,composite-clockTUgpt5_gate_fck@1000ti,composite-gate-clockVVgpt5_mux_fck@1040ti,composite-mux-clock@@VWgpt5_fckti,composite-clockVWgpt6_gate_fck@1000ti,composite-gate-clockVXgpt6_mux_fck@1040ti,composite-mux-clock@@VYgpt6_fckti,composite-clockXYgpt7_gate_fck@1000ti,composite-gate-clockVZgpt7_mux_fck@1040ti,composite-mux-clock@@V[gpt7_fckti,composite-clockZ[gpt8_gate_fck@1000ti,composite-gate-clock V\gpt8_mux_fck@1040ti,composite-mux-clock@@V]gpt8_fckti,composite-clock\]gpt9_gate_fck@1000ti,composite-gate-clock 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@$Vpssi_ssr_fck_3430es2ti,composite-clockopVqssi_sst_fck_3430es2fixed-factor-clockqVhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockI Vssi_ick_3430es2@a10ti,omap3-ssi-interface-clockr V usim_gate_fck@c00ti,composite-gate-clockE  V}sys_d2_ckfixed-factor-clockVtomap_96m_d2_fckfixed-factor-clockEVuomap_96m_d4_fckfixed-factor-clockEVvomap_96m_d8_fckfixed-factor-clockEVwomap_96m_d10_fckfixed-factor-clockE Vxdpll5_m2_d4_ckfixed-factor-clocksVydpll5_m2_d8_ckfixed-factor-clocksVzdpll5_m2_d16_ckfixed-factor-clocksV{dpll5_m2_d20_ckfixed-factor-clocksV|usim_mux_fck@c40ti,composite-mux-clock(tuvwxyz{| @V~usim_fckti,composite-clock}~usim_ick@c10ti,omap3-interface-clockN  Vdpll5_ck@d04ti,omap3-dpll-clock  $ L 4Vdpll5_m2_ck@d50ti,divider-clock PVssgx_gate_fck@b00ti,composite-gate-clock& Vcore_d3_ckfixed-factor-clock&Vcore_d4_ckfixed-factor-clock&Vcore_d6_ckfixed-factor-clock&Vomap_192m_alwon_fckfixed-factor-clock"Vcore_d2_ckfixed-factor-clock&Vsgx_mux_fck@b40ti,composite-mux-clock * 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&timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer51timer@4903a000ti,omap3430-timerI*timer61timer@4903c000ti,omap3430-timerI+timer71timer@4903e000ti,omap3430-timerI,timer8>1timer@49040000ti,omap3430-timerI-timer9>timer@48086000ti,omap3430-timerH`.timer10>timer@48088000ti,omap3430-timerH/timer11>timer@48304000ti,omap3430-timerH0@_timer12"Kusbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ [ehci-phyohci@48064400ti,ohci-omap3HDLfehci@48064800 ti,ehci-omapHHM~gpmc@6e000000ti,omap3430-gpmcgpmcnrxtx+0Vnand@0,0ti,omap2-nand  sw,,"%,8(G6V@eRvR(+x-loader@0"xloaderbootloaders@80000"ubootbootloaders_env@260000 "uboot-env&kernel@280000"boot(filesystem@c80000"rootfsusb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs ~ usb2-phy2dss@48050000 ti,omap3-dssHok dss_corefck+#default1dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 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.mmc1offled3"pandora::bluetooth . heartbeatoffled4"pandora::wifi .mmc2offgpio-keys gpio-keys#default1up-button"upg .down-button"downl .left-button"lefti .right-button"rightj .pageup-button"game 1h . pagedown-button"game 3m . home-button"game 4f .end-button"game 2k .right-shift"l6 .kp-plus"l2N .right-ctrl"ra . kp-minus"r2J . left-ctrl"ctrl .menu"menu .hold"hold .left-alt"alt8 .lid"lid . hsusb2_phyusb-nop-xceiv (Vfixed-regulator-usb_host_5vregulator-fixed yusb_host_5vLK@LK@  fixed-regulator-wg7210_enregulator-fixedyvwlanw@w@ P  Vfixed-regulator-wg7210_32kregulator-fixed ywg7210_32kw@w@    compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2display0device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskphandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0ti,use_poweroffti,ramp_delay_valuebci3v1-supplyio-channelsio-channel-namesti,bb-uvoltti,bb-uampregulator-always-onusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencypendown-gpiovcc-supplyti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxwakeup-sourcespi-cpolspi-cphalabelreset-gpiosremote-endpointti,dual-voltpbias-supplyvmmc-supplybus-widthcd-gpiosnon-removableti,non-removablecap-power-off-cardti,wl1251-has-eeprom#iommu-cellsti,#tlb-entriesstatusreg-namesinterrupt-namesti,buffer-size#sound-dai-cellsti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,device-widthmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda-supplyti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellsti,sysc-maskpolling-delay-passivepolling-delaycoefficientsthermal-sensorslinux,default-triggerdefault-statelinux,codelinux,input-typeregulator-boot-onenable-active-highstartup-delay-us