8 (%lg,omap3-sniperti,omap36xxti,omap3 +7LG Optimus Blackchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8{cpucpus 'O 57pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+8Udefaultcpinmux_uart3_pinsknpcpinmux_dp3t_sel_pinskfhcpinmux_i2c1_pinskcpinmux_i2c2_pinskcpinmux_i2c3_pinskcpinmux_lp8720_en_pinkPcpinmux_mmc1_pins0kcpinmux_mmc2_pinsPk(*,.02468:cpinmux_usb_otg_hs_pins`krtvxz|~cpinmux_twl4030_pinskAcscm_conf@270sysconsimple-busp0+ p0cpbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-cclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhcmcbsp5_fckti,composite-clockcmcbsp1_mux_fck@4ti,composite-mux-clockc mcbsp1_fckti,composite-clock cmcbsp2_mux_fck@4ti,composite-mux-clock c mcbsp2_fckti,composite-clock cmcbsp3_mux_fck@68ti,composite-mux-clock hcmcbsp3_fckti,composite-clockcmcbsp4_mux_fck@68ti,composite-mux-clock hcmcbsp4_fckti,composite-clockcclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+8Udefaultpinmux_mmc1_cd_pinkcpinmux_twl4030_vpins kcaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYcosc_sys_ck@d40 ti,mux-clock @csys_ck@1270ti,divider-clockp csys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock +dpll3_m2x2_ckfixed-factor-clock +cdpll4_x2_ckfixed-factor-clock +corex2_fckfixed-factor-clock +cwkup_l4_ickfixed-factor-clock +cNcorex2_d3_fckfixed-factor-clock +ccorex2_d5_fckfixed-factor-clock +cclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockc@virt_12m_ck fixed-clockcvirt_13m_ck fixed-clock]@cvirt_19200000_ck fixed-clock$cvirt_26000000_ck fixed-clockcvirt_38_4m_ck fixed-clockIcdpll4_ck@d00ti,omap3-dpll-per-j-type-clock D 0cdpll4_m2_ck@d48ti,divider-clock? H c dpll4_m2x2_mul_ckfixed-factor-clock  +c!dpll4_m2x2_ck@d00ti,hsdiv-gate-clock! 5c"omap_96m_alwon_fckfixed-factor-clock" +c)dpll3_ck@d00ti,omap3-dpll-core-clock @ 0cdpll3_m3_ck@1140ti,divider-clock@ c#dpll3_m3x2_mul_ckfixed-factor-clock# +c$dpll3_m3x2_ck@d00ti,hsdiv-gate-clock$  5c%emu_core_alwon_ckfixed-factor-clock% +cbsys_altclk fixed-clockc.mcbsp_clks fixed-clockcdpll3_m2_ck@d40ti,divider-clock @ ccore_ckfixed-factor-clock +c&dpll1_fck@940ti,divider-clock& @ c'dpll1_ck@904ti,omap3-dpll-clock'  $ @ 4cdpll1_x2_ckfixed-factor-clock +c(dpll1_x2m2_ck@944ti,divider-clock( D c<cm_96m_fckfixed-factor-clock) +c*omap_96m_fck@d40 ti,mux-clock* @cEdpll4_m3_ck@e40ti,divider-clock @ c+dpll4_m3x2_mul_ckfixed-factor-clock+ +c,dpll4_m3x2_ck@d00ti,hsdiv-gate-clock, 5c-omap_54m_fck@d40 ti,mux-clock-. @c8cm_96m_d2_fckfixed-factor-clock* +c/omap_48m_fck@d40 ti,mux-clock/. @c0omap_12m_fckfixed-factor-clock0 +cGdpll4_m4_ck@e40ti,divider-clock @ c1dpll4_m4x2_mul_ckti,fixed-factor-clock1KYfc2dpll4_m4x2_ck@d00ti,gate-clock2 5fcdpll4_m5_ck@f40ti,divider-clock?@ c3dpll4_m5x2_mul_ckti,fixed-factor-clock3KYfc4dpll4_m5x2_ck@d00ti,hsdiv-gate-clock4 5fcjdpll4_m6_ck@1140ti,divider-clock?@ c5dpll4_m6x2_mul_ckfixed-factor-clock5 +c6dpll4_m6x2_ck@d00ti,hsdiv-gate-clock6 5c7emu_per_alwon_ckfixed-factor-clock7 +ccclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock& pc9clkout2_src_mux_ck@d70ti,composite-mux-clock&*8 pc:clkout2_src_ckti,composite-clock9:c;sys_clkout2@d70ti,divider-clock;@ pympu_ckfixed-factor-clock< +c=arm_fck@924ti,divider-clock= $emu_mpu_alwon_ckfixed-factor-clock= +cdl3_ick@a40ti,divider-clock& @ c>l4_ick@a40ti,divider-clock> @ c?rm_ick@c40ti,divider-clock? @ gpt10_gate_fck@a00ti,composite-gate-clock  cAgpt10_mux_fck@a40ti,composite-mux-clock@ @cBgpt10_fckti,composite-clockABgpt11_gate_fck@a00ti,composite-gate-clock  cCgpt11_mux_fck@a40ti,composite-mux-clock@ @cDgpt11_fckti,composite-clockCDcore_96m_fckfixed-factor-clockE +cmmchs2_fck@a00ti,wait-gate-clock cmmchs1_fck@a00ti,wait-gate-clock ci2c3_fck@a00ti,wait-gate-clock ci2c2_fck@a00ti,wait-gate-clock ci2c1_fck@a00ti,wait-gate-clock cmcbsp5_gate_fck@a00ti,composite-gate-clock  cmcbsp1_gate_fck@a00ti,composite-gate-clock  c core_48m_fckfixed-factor-clock0 +cFmcspi4_fck@a00ti,wait-gate-clockF cmcspi3_fck@a00ti,wait-gate-clockF cmcspi2_fck@a00ti,wait-gate-clockF cmcspi1_fck@a00ti,wait-gate-clockF cuart2_fck@a00ti,wait-gate-clockF cuart1_fck@a00ti,wait-gate-clockF  ccore_12m_fckfixed-factor-clockG +cHhdq_fck@a00ti,wait-gate-clockH ccore_l3_ickfixed-factor-clock> +cIsdrc_ick@a10ti,wait-gate-clockI cgpmc_fckfixed-factor-clockI +core_l4_ickfixed-factor-clock? +cJmmchs2_ick@a10ti,omap3-interface-clockJ cmmchs1_ick@a10ti,omap3-interface-clockJ chdq_ick@a10ti,omap3-interface-clockJ cmcspi4_ick@a10ti,omap3-interface-clockJ cmcspi3_ick@a10ti,omap3-interface-clockJ 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cgpio1_ick@c10ti,omap3-interface-clockN comap_32ksync_ick@c10ti,omap3-interface-clockN cgpt12_ick@c10ti,omap3-interface-clockN cgpt1_ick@c10ti,omap3-interface-clockN cper_96m_fckfixed-factor-clock) +c per_48m_fckfixed-factor-clock0 +cOuart3_fck@1000ti,wait-gate-clockO cgpt2_gate_fck@1000ti,composite-gate-clockcPgpt2_mux_fck@1040ti,composite-mux-clock@@cQgpt2_fckti,composite-clockPQgpt3_gate_fck@1000ti,composite-gate-clockcRgpt3_mux_fck@1040ti,composite-mux-clock@@cSgpt3_fckti,composite-clockRSgpt4_gate_fck@1000ti,composite-gate-clockcTgpt4_mux_fck@1040ti,composite-mux-clock@@cUgpt4_fckti,composite-clockTUgpt5_gate_fck@1000ti,composite-gate-clockcVgpt5_mux_fck@1040ti,composite-mux-clock@@cWgpt5_fckti,composite-clockVWgpt6_gate_fck@1000ti,composite-gate-clockcXgpt6_mux_fck@1040ti,composite-mux-clock@@cYgpt6_fckti,composite-clockXYgpt7_gate_fck@1000ti,composite-gate-clockcZgpt7_mux_fck@1040ti,composite-mux-clock@@c[gpt7_fckti,composite-clockZ[gpt8_gate_fck@1000ti,composite-gate-clock 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cgpt7_ick@1010ti,omap3-interface-clockacgpt6_ick@1010ti,omap3-interface-clockacgpt5_ick@1010ti,omap3-interface-clockacgpt4_ick@1010ti,omap3-interface-clockacgpt3_ick@1010ti,omap3-interface-clockacgpt2_ick@1010ti,omap3-interface-clockacmcbsp2_ick@1010ti,omap3-interface-clockacmcbsp3_ick@1010ti,omap3-interface-clockacmcbsp4_ick@1010ti,omap3-interface-clockacmcbsp2_gate_fck@1000ti,composite-gate-clockc mcbsp3_gate_fck@1000ti,composite-gate-clockcmcbsp4_gate_fck@1000ti,composite-gate-clockcemu_src_mux_ck@1140 ti,mux-clockbcd@ceemu_src_ckti,clkdm-gate-clockecfpclk_fck@1140ti,divider-clockf@ pclkx2_fck@1140ti,divider-clockf@ atclk_fck@1140ti,divider-clockf@ traceclk_src_fck@1140 ti,mux-clockbcd@cgtraceclk_fck@1140ti,divider-clockg @ secure_32k_fck fixed-clockchgpt12_fckfixed-factor-clockh +wdt1_fckfixed-factor-clockh +security_l4_ick2fixed-factor-clock? +ciaes1_ick@a14ti,omap3-interface-clocki rng_ick@a14ti,omap3-interface-clocki sha11_ick@a14ti,omap3-interface-clocki des1_ick@a14ti,omap3-interface-clocki cam_mclk@f00ti,gate-clockjfcam_ick@f10!ti,omap3-no-wait-interface-clock?ccsi2_96m_fck@f00ti,gate-clockcsecurity_l3_ickfixed-factor-clock> +ckpka_ick@a14ti,omap3-interface-clockk icr_ick@a10ti,omap3-interface-clockJ des2_ick@a10ti,omap3-interface-clockJ mspro_ick@a10ti,omap3-interface-clockJ mailboxes_ick@a10ti,omap3-interface-clockJ ssi_l4_ickfixed-factor-clock? +crsr1_fck@c00ti,wait-gate-clock csr2_fck@c00ti,wait-gate-clock csr_l4_ickfixed-factor-clock? +dpll2_fck@40ti,divider-clock&@ cldpll2_ck@4ti,omap3-dpll-clockl$@4cmdpll2_m2_ck@44ti,divider-clockmD cniva2_ck@0ti,wait-gate-clockncmodem_fck@a00ti,omap3-interface-clock csad2d_ick@a10ti,omap3-interface-clock> cmad2d_ick@a18ti,omap3-interface-clock> cmspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock cossi_ssr_div_fck_3430es2@a40ti,composite-divider-clock @$cpssi_ssr_fck_3430es2ti,composite-clockopcqssi_sst_fck_3430es2fixed-factor-clockq +chsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockI cssi_ick_3430es2@a10ti,omap3-ssi-interface-clockr cusim_gate_fck@c00ti,composite-gate-clockE  c}sys_d2_ckfixed-factor-clock +ctomap_96m_d2_fckfixed-factor-clockE +cuomap_96m_d4_fckfixed-factor-clockE +cvomap_96m_d8_fckfixed-factor-clockE +cwomap_96m_d10_fckfixed-factor-clockE + cxdpll5_m2_d4_ckfixed-factor-clocks +cydpll5_m2_d8_ckfixed-factor-clocks +czdpll5_m2_d16_ckfixed-factor-clocks +c{dpll5_m2_d20_ckfixed-factor-clocks +c|usim_mux_fck@c40ti,composite-mux-clock(tuvwxyz{| @ c~usim_fckti,composite-clock}~usim_ick@c10ti,omap3-interface-clockN  cdpll5_ck@d04ti,omap3-dpll-clock  $ L 4cdpll5_m2_ck@d50ti,divider-clock P cssgx_gate_fck@b00ti,composite-gate-clock& ccore_d3_ckfixed-factor-clock& +ccore_d4_ckfixed-factor-clock& +ccore_d6_ckfixed-factor-clock& +comap_192m_alwon_fckfixed-factor-clock" +ccore_d2_ckfixed-factor-clock& +csgx_mux_fck@b40ti,composite-mux-clock * @csgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clock> ccpefuse_fck@a08ti,gate-clock cts_fck@a08ti,gate-clock@ cusbtll_fck@a08ti,wait-gate-clocks cusbtll_ick@a18ti,omap3-interface-clockJ cmmchs3_ick@a10ti,omap3-interface-clockJ cmmchs3_fck@a00ti,wait-gate-clock cdss1_alwon_fck_3430es2@e00ti,dss-gate-clockfcdss_ick_3430es2@e10ti,omap3-dss-interface-clock?cusbhost_120m_fck@1400ti,gate-clockscusbhost_48m_fck@1400ti,dss-gate-clock0cusbhost_ick@1410ti,omap3-dss-interface-clock?cuart4_fck@1000ti,wait-gate-clockOcclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainfdpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainmd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH cdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `dmacgpio@48310000ti,omap3-gpioH1gpio1cgpio@49050000ti,omap3-gpioIgpio2cgpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4gpio@49056000ti,omap3-gpioI`!gpio5gpio@49058000ti,omap3-gpioI"gpio6serial@4806a000ti,omap3-uartH 0H12txrxuart1lserial@4806c000ti,omap3-uartH0I34txrxuart2lserial@49020000ti,omap3-uartI0Jn56txrxuart3lUdefaultDi2c@48070000 ti,omap3-i2cH8txrx+i2c1UdefaultD'@twl@48H  ti,twl4030UdefaultDpowerti,twl4030-powerNrtcti,twl4030-rtc bciti,twl4030-bci ^l xvacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2**regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' 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&timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5@timer@4903a000ti,omap3430-timerI*timer6@timer@4903c000ti,omap3430-timerI+timer7@timer@4903e000ti,omap3430-timerI,timer8M@timer@49040000ti,omap3430-timerI-timer9Mtimer@48086000ti,omap3430-timerH`.timer10Mtimer@48088000ti,omap3430-timerH/timer11Mtimer@48304000ti,omap3430-timerH0@_timer121Zusbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ohci@48064400ti,ohci-omap3HDLjehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcnrxtx+usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs UdefaultD usb2-phy2dss@48050000 ti,omap3-dssH disabled dss_corefck+dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  disabled dss_vencfcktv_dac_clkssi-controller@48058000 ti,omap3-ssissiokHHsysgddGgdd_mpu+ q ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFserial@49042000ti,omap3-uartI PQRtxrxuart4lregulator-abb-mpu ti,abb-v1 abb_mpu_iva+H0rH0hbase-addressint-address`"sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\+8isp@480bc000 ti,omap3-ispH H .5ports+bandgap@48002524H%$ti,omap36xx-bandgapActarget-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_coreH 8syscW dfck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaH 8syscW dfck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivathermal-zonescpu_thermalrN memory@80000000{memory  compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namesphandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initinterrupts-extendedpinctrl-0ti,use_poweroffbci3v1-supplyio-channelsio-channel-namesregulator-always-onusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsenable-gpios#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplycd-gpiosbus-widthti,non-removablestatus#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-size#sound-dai-cellsti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsinterface-typeusb-phyphysphy-namespowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsti,sysc-maskti,sysc-sidlepolling-delay-passivepolling-delaycoefficientsthermal-sensors