)k8( dHgumstix,omap4-duovero-parlorgumstix,omap4-duoveroti,omap4430ti,omap4 +#7OMAP4430 Gumstix Duovero on ParlorchosenB=/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0aliases?I/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?N/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?S/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EX/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0?]/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0?b/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0?g/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0?l/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0?q/ocp/interconnect@48000000/segment@0/target-module@d5000/mmc@0Bv/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0B~/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 /connectorcpus+cpu@0arm,cortex-a9cpucpu  'O 5acpu@1arm,cortex-a9cpupmuarm,cortex-a9-pmu debugssinterrupt-controller@48241000arm,cortex-a9-gic(H$H$ l2-cache-controller@48242000arm,pl310-cacheH$ 9Glocal-timer@48240600arm,cortex-a9-twd-timerH$  S  interrupt-controller@48281000ti,omap4-wugen-mpu(H( socti,omap-inframpu ti,omap4-mpu mpu^dsp ti,omap3-c64 dspiva ti,ivahd ivaocpti,omap4-l3-nocsimple-bus+c l3_main_1l3_main_2l3_main_3DD ES  interconnect@4a300000ti,omap4-l4-wkupsimple-busJ0J0J0 japlaia0+$cJ0J1J2segment@0 simple-bus+c`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc  counter_32k@@ jrevsysct 0fck+ c@counter@0ti,omap-counter32k target-module@6000ti,sysc-omap4ti,sysc`jrev+ c` prm@0 ti,omap4-prm  S + c clocks+sys_clkin_ck@110 ti,mux-clock abe_dpll_bypass_clk_mux_ck@108 ti,mux-clock3abe_dpll_refclk_mux_ck@10c ti,mux-clock 2dbgclk_mux_ckfixed-factor-clockl4_wkup_clk_mux_ck@108 ti,mux-clocksyc_clk_div_ck@100ti,divider-clockusim_ck@1858ti,divider-clockXusim_fclk@1858ti,gate-clockXtrace_clk_div_ckti,clkdm-gate-clock bandgap_fclk@1888ti,gate-clockclockdomainsemu_sys_clkdmti,clockdomainl4_wkup_cm@1800 ti,omap4-cm+ cclk@20 ti,clkctrl \emu_sys_cm@1a00 ti,omap4-cm+ cclk@20 ti,clkctrl target-module@a000ti,sysc-omap4ti,syscjrev+ cscrm@0ti,omap4-scrm clocks+auxclk0_src_gate_ck@310 ti,composite-no-wait-gate-clockauxclk0_src_mux_ck@310ti,composite-mux-clock auxclk0_src_ckti,composite-clockauxclk0_ck@310ti,divider-clock*auxclk1_src_gate_ck@314 ti,composite-no-wait-gate-clockauxclk1_src_mux_ck@314ti,composite-mux-clock auxclk1_src_ckti,composite-clockauxclk1_ck@314ti,divider-clock+auxclk2_src_gate_ck@318 ti,composite-no-wait-gate-clockauxclk2_src_mux_ck@318ti,composite-mux-clock auxclk2_src_ckti,composite-clock auxclk2_ck@318ti,divider-clock ,auxclk3_src_gate_ck@31c ti,composite-no-wait-gate-clock!auxclk3_src_mux_ck@31cti,composite-mux-clock "auxclk3_src_ckti,composite-clock!"#auxclk3_ck@31cti,divider-clock#-auxclk4_src_gate_ck@320 ti,composite-no-wait-gate-clock $auxclk4_src_mux_ck@320ti,composite-mux-clock  %auxclk4_src_ckti,composite-clock$%&auxclk4_ck@320ti,divider-clock& .auxclk5_src_gate_ck@324 ti,composite-no-wait-gate-clock$'auxclk5_src_mux_ck@324ti,composite-mux-clock $(auxclk5_src_ckti,composite-clock'()auxclk5_ck@324ti,divider-clock)$/auxclkreq0_ck@210 ti,mux-clock*+,-./auxclkreq1_ck@214 ti,mux-clock*+,-./auxclkreq2_ck@218 ti,mux-clock*+,-./auxclkreq3_ck@21c ti,mux-clock*+,-./auxclkreq4_ck@220 ti,mux-clock*+,-./ auxclkreq5_ck@224 ti,mux-clock*+,-./$clockdomainstarget-module@c000ti,sysc-omap4ti,sysc ctrl_module_wkup jrevsysct+ cscm@c000ti,omap4-scm-wkupsegment@10000 simple-bus+xc@@PPtarget-module@0ti,sysc-omap2ti,sysc gpio1jrevsyscsysst fckdbclk+ cgpio@0ti,omap4-gpio S (target-module@4000ti,sysc-omap2ti,sysc  wd_timer2@@@jrevsyscsyss"t fck+ c@wdt@0ti,omap4-wdtti,omap3-wdt SPtarget-module@8000ti,sysc-omap2-timerti,sysc timer1jrevsyscsyss' t  fck+ ctimer@0ti,omap3430-timer  fck S%'target-module@c000ti,sysc-omap2ti,sysc kbdjrevsyscsyss' t Xfck+ ckeypad@0ti,omap4-keypad Sxjmputarget-module@e000ti,sysc-omap4ti,sysc ctrl_module_pad_wkup jrevsysct+ cpinmux@40 ti,omap4-padconfpinctrl-single@8+6(Ecpinmux_twl6030_wkup_pinsnsegment@20000 simple-bus+c``  00@@PPpptarget-module@0ti,sysc disabled+ ctarget-module@2000ti,sysc disabled+ c target-module@4000ti,sysc disabled+ c@target-module@6000ti,sysc disabled+0c`p 0interconnect@4a000000ti,omap4-l4-cfgsimple-busJJJ japlaia0+TcJJJJ J (J(0J0segment@0 simple-bus+c 00@@PP``pp@  00 ``pp @@PPtarget-module@2000ti,sysc-omap4ti,sysc ctrl_module_core   jrevsysct+ c scm@0ti,omap4-scm-coresimple-bus+ cscm_conf@0syscon+control-phy@300ti,control-phy-usb2jpower`control-phy@33cti,control-phy-otghs<jotghs_control_target-module@4000ti,sysc-omap4ti,sysc@jrev+ c@cm1@0ti,omap4-cm1simple-bus + c clocks+extalt_clkin_ck fixed-clockDpad_clks_src_ck fixed-clock0pad_clks_ck@108ti,gate-clock0pad_slimbus_core_clks_ck fixed-clocksecure_32k_clk_src_ck fixed-clockslimbus_src_clk fixed-clock1slimbus_clk@108ti,gate-clock1 sys_32k_ck fixed-clockvirt_12000000_ck fixed-clockvirt_13000000_ck fixed-clock]@ virt_16800000_ck fixed-clockY virt_19200000_ck fixed-clock$ virt_26000000_ck fixed-clock virt_27000000_ck fixed-clock virt_38400000_ck fixed-clockItie_low_clock_ck fixed-clockutmi_phy_clkout_ck fixed-clockxclk60mhsp1_ck fixed-clockZxclk60mhsp2_ck fixed-clock[xclk60motg_ck fixed-clockdpll_abe_ck@1e0ti,omap4-dpll-m4xen-clock234dpll_abe_x2_ck@1f0ti,omap4-dpll-x2-clock45dpll_abe_m2x2_ck@1f0ti,divider-clock56abe_24m_fclkfixed-factor-clock6abe_clk@108ti,divider-clock6dpll_abe_m3x2_ck@1f4ti,divider-clock57core_hsd_byp_clk_mux_ck@12c ti,mux-clock7,8dpll_core_ck@120ti,omap4-dpll-core-clock8 $,(9dpll_core_x2_ckti,omap4-dpll-x2-clock9:dpll_core_m6x2_ck@140ti,divider-clock:@dpll_core_m2_ck@130ti,divider-clock90;ddrphy_ckfixed-factor-clock;dpll_core_m5x2_ck@13cti,divider-clock:<<div_core_ck@100ti,divider-clock<Gdiv_iva_hs_clk@1dcti,divider-clock<@div_mpu_hs_clk@19cti,divider-clock<Fdpll_core_m4x2_ck@138ti,divider-clock:8=dll_clk_div_ckfixed-factor-clock=dpll_abe_m2_ck@1f0ti,divider-clock4Jdpll_core_m3x2_gate_ck@134 ti,composite-no-wait-gate-clock:4>dpll_core_m3x2_div_ck@134ti,composite-divider-clock:4?dpll_core_m3x2_ckti,composite-clock>?dpll_core_m7x2_ck@144ti,divider-clock:Diva_hsd_byp_clk_mux_ck@1ac ti,mux-clock@Adpll_iva_ck@1a0ti,omap4-dpll-clockAB7Bdpll_iva_x2_ckti,omap4-dpll-x2-clockBCdpll_iva_m4x2_ck@1b8ti,divider-clockCD~Ddpll_iva_m5x2_ck@1bcti,divider-clockCE] Edpll_mpu_ck@160ti,omap4-dpll-clockF`dlhdpll_mpu_m2_ck@170ti,divider-clockpper_hs_clk_div_ckfixed-factor-clock7Kusb_hs_clk_div_ckfixed-factor-clock7Ql3_div_ck@100ti,divider-clockGHl4_div_ck@100ti,divider-clockHlp_clk_div_ckfixed-factor-clock6mpu_periphclkfixed-factor-clockocp_abe_iclk@528ti,divider-clock I(per_abe_24m_fclkfixed-factor-clockJdummy_ck fixed-clockclockdomainsmpuss_cm@300 ti,omap4-cm+ cclk@20 ti,clkctrl tesla_cm@400 ti,omap4-cm+ cclk@20 ti,clkctrl ]abe_cm@500 ti,omap4-cm+ cclk@20 ti,clkctrl lItarget-module@8000ti,sysc-omap4ti,syscjrev+ c cm2@0ti,omap4-cm2simple-bus + c clocks+per_hsd_byp_clk_mux_ck@14c ti,mux-clockKLLdpll_per_ck@140ti,omap4-dpll-clockL@DLHMdpll_per_m2_ck@150ti,divider-clockMPUdpll_per_x2_ck@150ti,omap4-dpll-x2-clockMPNdpll_per_m2x2_ck@150ti,divider-clockNPTdpll_per_m3x2_gate_ck@154 ti,composite-no-wait-gate-clockNTOdpll_per_m3x2_div_ck@154ti,composite-divider-clockNTPdpll_per_m3x2_ckti,composite-clockOPdpll_per_m4x2_ck@158ti,divider-clockNXdpll_per_m5x2_ck@15cti,divider-clockN\dpll_per_m6x2_ck@160ti,divider-clockN`Sdpll_per_m7x2_ck@164ti,divider-clockNddpll_usb_ck@180ti,omap4-dpll-j-type-clockQRdpll_usb_clkdcoldo_ck@1b4ti,fixed-factor-clockRdpll_usb_m2_ck@190ti,divider-clockRVducati_clk_mux_ck@100 ti,mux-clockGSfunc_12m_fclkfixed-factor-clockTfunc_24m_clkfixed-factor-clockUfunc_24mc_fclkfixed-factor-clockTfunc_48m_fclk@108ti,divider-clockTfunc_48mc_fclkfixed-factor-clockTfunc_64m_fclk@108ti,divider-clockfunc_96m_fclk@108ti,divider-clockTinit_60m_fclk@104ti,divider-clockVYper_abe_nc_fclk@108ti,divider-clockJusb_phy_cm_clk32k@640ti,gate-clock@aclockdomainsl3_init_clkdmti,clockdomainRl4_ao_cm@600 ti,omap4-cm+ cclk@20 ti,clkctrl bl3_1_cm@700 ti,omap4-cm+ cclk@20 ti,clkctrl l3_2_cm@800 ti,omap4-cm+ cclk@20 ti,clkctrl ducati_cm@900 ti,omap4-cm + c clk@20 ti,clkctrl l3_dma_cm@a00 ti,omap4-cm + c clk@20 ti,clkctrl Wl3_emif_cm@b00 ti,omap4-cm + c clk@20 ti,clkctrl d2d_cm@c00 ti,omap4-cm + c clk@20 ti,clkctrl l4_cfg_cm@d00 ti,omap4-cm + c clk@20 ti,clkctrl cl3_instr_cm@e00 ti,omap4-cm+ cclk@20 ti,clkctrl $ivahd_cm@f00 ti,omap4-cm+ cclk@20 ti,clkctrl iss_cm@1000 ti,omap4-cm+ cclk@20 ti,clkctrl hl3_dss_cm@1100 ti,omap4-cm+ cclk@20 ti,clkctrl l3_gfx_cm@1200 ti,omap4-cm+ cclk@20 ti,clkctrl l3_init_cm@1300 ti,omap4-cm+ cclk@20 ti,clkctrl Xl4_per_cm@1400 ti,omap4-cm+ cclk@20 ti,clkctrl Ditarget-module@56000ti,sysc-omap2ti,sysc  dma_system``,`(jrevsyscsyss# * t Wfck+ c`dma-controller@0ti,omap4430-sdma0S  8C Pttarget-module@58000ti,sysc-omap2ti,sysc hsijrevsyscsyss#*t Xfck+ cPhsi@0 ti,omap4-hsi@Pjsysgdd Xhsi_fck SG]gdd_mpu+ c@hsi-port@2000ti,omap4-hsi-port (jtxrx SChsi-port@3000ti,omap4-hsi-port08jtxrx SDtarget-module@5e000ti,sysc disabled+ c target-module@62000ti,sysc-omap2ti,sysc  usb_tll_hs   jrevsyscsyss t XHfck+ c usbhstll@0 ti,usbhs-tll SNtarget-module@64000ti,sysc-omap4ti,sysc  usb_host_hs@@@jrevsyscsyss*t X8fck+ c@usbhshost@0ti,usbhs-host+ c YZ[3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 mehci-phyohci@800ti,ohci-omap3 SLxehci@c00 ti,ehci-omap  SM\target-module@66000ti,sysc-omap2ti,sysc mmu_dsp```jrevsyscsyss t ]fck+ c` disabledsegment@80000 simple-bus+c      @@PP``pp` `p p        target-module@29000ti,sysc disabled+ ctarget-module@2b000ti,sysc-omap2ti,sysc  usb_otg_hsjrevsyscsyss *t X@fck+ cusb_otg_hs@0ti,omap4-musbS\]]mcdma^^ usb2-phy _s2target-module@2d000ti,sysc-omap2ti,sysc ocp2scp_usb_phyjrevsyscsyss t Xfck+ cocp2scp@0ti,omap-ocp2scp+ cusb2phy@80 ti,omap-usb2X`awkupclk^target-module@36000ti,sysc disabled+ c`target-module@4d000ti,sysc disabled+ ctarget-module@59000ti,sysc-omap4-srti,sysc smartreflex_mpu8jsysct bfck+ csmartreflex@0ti,omap4-smartreflex-mpu Starget-module@5b000ti,sysc-omap4-srti,sysc smartreflex_iva8jsysct bfck+ csmartreflex@0ti,omap4-smartreflex-iva Sftarget-module@5d000ti,sysc-omap4-srti,sysc smartreflex_core8jsysct bfck+ csmartreflex@0ti,omap4-smartreflex-core Starget-module@60000ti,sysc disabled+ ctarget-module@74000ti,sysc-omap4ti,sysc mailbox@@ jrevsysc t cfck+ c@mailbox@0ti,omap4-mailbox S mbox_ipu  *mbox_dsp  *target-module@76000ti,sysc-omap2ti,sysc  spinlock```jrevsyscsyss t cfck+ c`spinlock@0ti,omap4-hwspinlock5segment@100000 simple-bus+`c  00target-module@0ti,sysc-omap4ti,sysc ctrl_module_pad_core jrevsysct+ cpinmux@40 ti,omap4-padconfpinctrl-single@+6(EcCdefault Qdefjpinmux_twl6040_pins&`pinmux_mcpdm_pins(~pinmux_mcbsp1_pins pinmux_hsusbb1_pins`           pinmux_hsusb1phy_pinsLpinmux_w2cbw0015_pins&:pinmux_i2c1_pinslpinmux_i2c4_pinszpinmux_mmc1_pins0vpinmux_mmc5_pins0  xpinmux_twl6030_pins^Ampinmux_led_pinsdpinmux_button_pinsepinmux_i2c2_pinsspinmux_i2c3_pinskpinmux_smsc_pins(*0fpinmux_dss_hdmi_pins XZ\^omap4_padconf_global@5a0sysconsimple-busp+ cpgpbias_regulator@60ti,pbias-omap4ti,pbias-omap`[gpbias_mmc_omap4bpbias_mmc_omap4qw@-utarget-module@2000ti,sysc disabled+ c target-module@8000ti,sysc disabled+ ctarget-module@a000ti,sysc-omap4ti,sysc fdif jrevsysc * t hfck+ csegment@180000 simple-bus+segment@200000 simple-bus+hc!!  @ @P P` `p p ! 0!0  !!`!`p!p@!@P!P!!""`"`p"p""""!!target-module@4000ti,sysc disabled+ c@target-module@6000ti,sysc disabled+ c`target-module@a000ti,sysc disabled+ ctarget-module@c000ti,sysc disabled+ ctarget-module@10000ti,sysc disabled+ ctarget-module@12000ti,sysc disabled+ c target-module@14000ti,sysc disabled+ c@target-module@16000ti,sysc disabled+ c`target-module@18000ti,sysc disabled+ ctarget-module@1c000ti,sysc disabled+ ctarget-module@1e000ti,sysc disabled+ ctarget-module@20000ti,sysc disabled+ ctarget-module@26000ti,sysc disabled+ c`target-module@28000ti,sysc disabled+ ctarget-module@2a000ti,sysc disabled+ csegment@280000 simple-bus+segment@300000 simple-bus+c042@@2@ `2`p2p2232 2@target-module@0ti,sysc disabled+xc@@@ ``pp @interconnect@48000000ti,omap4-l4-persimple-bus0HHHHHHjaplaia0ia1ia2ia3+cH H segment@0 simple-bus+c  00@@PP``ppPP``pp  00 ` ` p p``pp``pp             @ @ ` ` @     0 0 @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,sysc uart3PTXjrevsyscsysst i0fck+ cserial@0ti,omap4-uart SJlJjtarget-module@32000ti,sysc-omap2-timerti,sysc timer2   jrevsyscsyss' t ifck+ c timer@0ti,omap3430-timer ifck S&target-module@34000ti,sysc-omap4-timerti,sysc timer3@@ jrevsysct i fck+ c@timer@0ti,omap4430-timer i fck S'target-module@36000ti,sysc-omap4-timerti,sysc timer4`` jrevsysct i(fck+ c`timer@0ti,omap4430-timer i(fck S(target-module@3e000ti,sysc-omap4-timerti,sysc timer9 jrevsysct i0fck+ ctimer@0ti,omap4430-timer i0fck S-target-module@40000ti,sysc disabled+ ctarget-module@55000ti,sysc-omap2ti,sysc gpio2PPQjrevsyscsyssti@i@ fckdbclk+ cPgpio@0ti,omap4-gpio S (}target-module@57000ti,sysc-omap2ti,sysc gpio3ppqjrevsyscsysstiHiH fckdbclk+ cpgpio@0ti,omap4-gpio S (target-module@59000ti,sysc-omap2ti,sysc gpio4jrevsyscsysstiPiP fckdbclk+ cgpio@0ti,omap4-gpio S  (target-module@5b000ti,sysc-omap2ti,sysc gpio5jrevsyscsysstiXiX fckdbclk+ cgpio@0ti,omap4-gpio S! (target-module@5d000ti,sysc-omap2ti,sysc gpio6jrevsyscsyssti`i` fckdbclk+ cgpio@0ti,omap4-gpio S" (ptarget-module@60000ti,sysc-omap2ti,sysc i2c3jrevsyscsysst ifck+ ci2c@0 ti,omap4-i2c S=+CdefaultQkeeprom@51 atmel,24c01Qtarget-module@6a000ti,sysc-omap2ti,sysc uart1PTXjrevsyscsysst i fck+ cserial@0ti,omap4-uart SHltarget-module@6c000ti,sysc-omap2ti,sysc uart2PTXjrevsyscsysst i(fck+ cserial@0ti,omap4-uart SIltarget-module@6e000ti,sysc-omap2ti,sysc uart4PTXjrevsyscsysst i8fck+ cserial@0ti,omap4-uart SFltarget-module@70000ti,sysc-omap2ti,sysc i2c1jrevsyscsysst ifck+ ci2c@0 ti,omap4-i2c S8+CdefaultQltwl@48H S ti,twl6030(CdefaultQmnrtcti,twl4030-rtcS regulator-vaux1ti,twl6030-vaux1qB@-regulator-vaux2ti,twl6030-vaux2qO*regulator-vaux3ti,twl6030-vaux3qB@-regulator-vmmcti,twl6030-vmmcqO-wregulator-vppti,twl6030-vppqw@&%regulator-vusimti,twl6030-vusimqO,@ regulator-vdacti,twl6030-vdacregulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxioregulator-vusbti,twl6030-vusboregulator-v1v8ti,twl6030-v1v8qregulator-v2v1ti,twl6030-v2v1rusb-comparatorti,twl6030-usbS opwmti,twl6030-pwmpwmledti,twl6030-pwmledgpadcti,twl6030-gpadcStwl@4b ti,twl6040K Sw p)q4r@target-module@72000ti,sysc-omap2ti,sysc i2c2   jrevsyscsysst ifck+ c i2c@0 ti,omap4-i2c S9+CdefaultQstarget-module@76000ti,sysc-omap4ti,sysc  slimbus2`` jrevsysct ifck+ c`target-module@78000ti,sysc-omap2ti,sysc elmjrevsyscsyss t i8fck+ celm@0ti,am3352-elm  S disabledtarget-module@86000ti,sysc-omap2-timerti,sysc timer10```jrevsyscsyss' t ifck+ c`timer@0ti,omap3430-timer ifck S.target-module@88000ti,sysc-omap4-timerti,sysc timer11 jrevsysct ifck+ ctimer@0ti,omap4430-timer ifck S/target-module@90000ti,sysc disabled+ c target-module@96000ti,sysc-omap2ti,sysc mcbsp4 `jsysc t ifck+ c `mcbsp@0ti,omap4-mcbspjmpu S]commonSbtt gtxrx disabledtarget-module@98000ti,sysc-omap4ti,sysc mcspi1   jrevsysct ifck+ c spi@0ti,omap4-mcspi SA+q@bt#t$t%t&t't(t)t* gtx0rx0tx1rx1tx2rx2tx3rx3target-module@9a000ti,sysc-omap4ti,sysc mcspi2   jrevsysct ifck+ c spi@0ti,omap4-mcspi SB+q bt+t,t-t.gtx0rx0tx1rx1target-module@9c000ti,sysc-omap4ti,sysc mmc1   jrevsysc*t Xfck+ c mmc@0ti,omap4-hsmmc SSbt=t>gtxrxuCdefaultQvwtarget-module@9e000ti,sysc disabled+ c target-module@a2000ti,sysc disabled+ c target-module@a4000ti,sysc disabled+c @ Ptarget-module@a8000ti,sysc disabled+ c @target-module@ad000ti,sysc-omap4ti,sysc mmc3   jrevsysc*t ifck+ c mmc@0ti,omap4-hsmmc S^btMtNgtxrx disabledtarget-module@b0000ti,sysc disabled+ c target-module@b2000ti,sysc-omap2ti,sysc hdq1w   jrevsyscsyss ihfck+ c 1w@0 ti,omap3-1w S:target-module@b4000ti,sysc-omap4ti,sysc mmc2 @ @ jrevsysc*t Xfck+ c @mmc@0ti,omap4-hsmmc SVbt/t0gtxrx disabledtarget-module@b8000ti,sysc-omap4ti,sysc mcspi3   jrevsysct ifck+ c spi@0ti,omap4-mcspi S[+qbttgtx0rx0target-module@ba000ti,sysc-omap4ti,sysc mcspi4   jrevsysct ifck+ c spi@0ti,omap4-mcspi S0+qbtFtGgtx0rx0target-module@d1000ti,sysc-omap4ti,sysc mmc4   jrevsysc*t ifck+ c mmc@0ti,omap4-hsmmc S`bt9t:gtxrx disabledtarget-module@d5000ti,sysc-omap4ti,sysc mmc5 P P jrevsysc*t i@fck+ c Pmmc@0ti,omap4-hsmmc S;bt;t<gtxrxCdefaultQxysegment@200000 simple-bus+c55target-module@150000ti,sysc-omap2ti,sysc i2c4jrevsyscsysst ifck+ ci2c@0 ti,omap4-i2c S>+CdefaultQzocmcram@40304000 mmio-sram@0@gpmc@50000000ti,omap4430-gpmcP+ Sbtgrxtx# gpmc5Hfck( c,ethernet@gpmcsmsc,lan9221smsc,lan9115HSe 22  2+2:2K2\2k###2{|-:  }S PmiiYkzN mmu@4a066000ti,omap4-iommuJ` S mmu_dsptarget-module@52000000ti,sysc-omap4ti,sysc issRR jrevsysc*t hfck+ cRmmu@55082000ti,omap4-iommuU  Sd mmu_iputarget-module@40130000ti,sysc-omap2ti,sysc  wd_timer3@@@jrevsyscsyss"t Ihfck+c@IIwdt@0ti,omap4-wdtti,omap3-wdt SPmcpdm@40132000ti,omap4-mcpdm@ I jmpudma Sp mcpdmbtAtBgup_linkdn_linkokayCdefaultQ~pdmclkdmic@4012e000ti,omap4-dmic@Ijmpudma Sr dmicbtCgup_link disabledmcbsp@40122000ti,omap4-mcbsp@ I jmpudma S]commonS mcbsp1bt!t"gtxrxokayCdefaultQmcbsp@40124000ti,omap4-mcbsp@@I@jmpudma S]commonS mcbsp2bttgtxrx disabledmcbsp@40126000ti,omap4-mcbsp@`I`jmpudma S]commonS mcbsp3bttgtxrx disabledtarget-module@40128000ti,sysc-mcaspti,sysc mcasp@@ jrevsysct I fck+c@IItarget-module@4012c000ti,sysc-omap4ti,sysc  slimbus1@@ jrevsysct I@fck+c@IItarget-module@401f1000ti,sysc-omap4ti,sysc aess@@ jrevsysc* t Ifck+c@IIdmm@4e000000 ti,omap4-dmmN Sq dmmemif@4c000000 ti,emif-4dL Sn emif15emif@4d000000 ti,emif-4dM So emif25timer@40138000ti,omap4430-timer@I S) timer5 timer@4013a000ti,omap4430-timer@I S* timer6 timer@4013c000ti,omap4430-timer@I S+ timer7 timer@4013e000ti,omap4430-timer@I S, timer8 aes@4b501000 ti,omap4-aes aes1KP SUbtotngtxrxaes@4b701000 ti,omap4-aes aes2Kp S@btrtqgtxrxdes@480a5000 ti,omap4-des desH P SRbtuttgtxrxsham@4b100000ti,omap4-sham shamK S3btwgrxregulator-abb-mpu ti,abb-v2babb_mpu+  ,2 =okayJ0{J0`jbase-addressint-addressx MO1regulator-abb-iva ti,abb-v2babb_iva+  ,2 = disabledJ0{J0`jbase-addressint-addresstarget-module@56000000ti,sysc-omap4ti,sysc gpuVV jrevsysc*t fck+ cV ' Ydss@58000000 ti,omap4-dssXok  dss_core fck+cdispc@58001000ti,omap4-dispcX S  dss_dispc fckencoder@58002000ti,omap4-rfbiX  disabled  dss_rfbiHfckickencoder@58003000ti,omap4-vencX0 disabled  dss_venc fckencoder@58004000 ti,omap4-dsiX@XB@XC jprotophypll S5 disabled  dss_dsi1  fcksys_clkencoder@58005000 ti,omap4-dsiXPXR@XS jprotophypll ST disabled  dss_dsi2  fcksys_clkencoder@58006000ti,omap4-hdmi X`XbXcXdjwppllphycore Seok  dss_hdmi  fcksys_clkbtL gaudio_tx pCdefaultQportendpoint |bandgap@4a002260J"`J#,ti,omap4430-bandgap  thermal-zonescpu_thermal    N tripscpu_alert  passivecpu_crit H  criticalcooling-mapsmap0  memory@80000000memory@soundti,abe-twl6040 DuoVero I * 3a >Headset StereophoneHSOLHeadset StereophoneHSORHSMICHeadset MicHeadset MicHeadset Mic Biashsusb1_phyusb-nop-xceiv O}CdefaultQ- main_clk$\w2cbw0015_vmmcCdefaultQregulator-fixed bw2cbw0015q-- $}  [p@ lyleds gpio-ledsled0 ~duovero:blue:led0  heartbeatgpio_keys gpio-keys+button0 ~button0    connectorhdmi-connector ~hdmid }portendpoint |regulator-vddvarioregulator-fixed bvddvario{regulator-vdd33aregulator-fixedbvdd33a| compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2i2c3mmc0mmc1mmc2mmc3mmc4serial0serial1serial2serial3display0device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleti,hwmodsinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptssramrangesreg-namesti,sysc-sidle#clock-cellsti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividersti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,timer-alwon#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clocksassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesport1-moderemote-wakeup-connectedphysusb-phyphy-namesmultipointnum-epsram-bitsctrl-moduleinterface-typepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellspinctrl-namespinctrl-0sysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmpagesizeregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highti,buffer-sizedmasdma-namesti,spi-num-csti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplyti,bus-widthti,non-removableti,no-reset-on-initcap-power-off-cardkeep-power-in-suspendgpmc,num-csgpmc,num-waitpinsti,no-idle-on-initbank-widthgpmc,device-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressphy-modegpmc,mux-add-datagpmc,sync-readgpmc,sync-writegpmc,sync-clk-ps#iommu-cellsti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertti,timer-dspti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoassigned-clock-parentsvdda-supplyremote-endpointgpios#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-deviceti,modelti,mclk-freqti,mcpdmti,twl6040ti,audio-routingreset-gpiosstartup-delay-usregulator-boot-onlabellinux,default-triggerlinux,codedebounce-intervalwakeup-sourcehpd-gpios