2m8(( (dBti,omap4-panda-esti,omap4-pandati,omap4460ti,omap4430ti,omap4 +7TI OMAP4 PandaBoard-ESchosenB=/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0aliases?I/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?N/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?S/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EX/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0?]/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0?b/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0?g/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0?l/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0?q/ocp/interconnect@48000000/segment@0/target-module@d5000/mmc@0Bv/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0B~/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 /connector0 /connector1_/ocp/interconnect@4a000000/segment@0/target-module@64000/usbhshost@0/ehci@c00/hub@1/usbether@1cpus+cpu@0arm,cortex-a9cpucpuW0 `O cpu@1arm,cortex-a9cpupmuarm,cortex-a9-pmudebugss%67interrupt-controller@48241000arm,cortex-a9-gic0EH$H$ l2-cache-controller@48242000arm,pl310-cacheH$ Vdlocal-timer@48240600arm,cortex-a9-twd-timerH$  %  interrupt-controller@48281000ti,omap4-wugen-mpu0EH( socti,omap-inframpu ti,omap4-mpumpupdsp ti,omap3-c64dspiva ti,ivahdivaocpti,omap4-l3-nocsimple-bus+ul3_main_1l3_main_2l3_main_3DD E%  interconnect@4a300000ti,omap4-l4-wkupsimple-busJ0J0J0 |aplaia0+$uJ0J1J2segment@0 simple-bus+u`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc counter_32k@@ |revsysc 0fck+ u@counter@0ti,omap-counter32k target-module@6000ti,sysc-omap4ti,sysc`|rev+ u` prm@0 ti,omap4-prm  % + u clocks+sys_clkin_ck@110 ti,mux-clock abe_dpll_bypass_clk_mux_ck@108 ti,mux-clock5abe_dpll_refclk_mux_ck@10c ti,mux-clock 4dbgclk_mux_ckfixed-factor-clockl4_wkup_clk_mux_ck@108 ti,mux-clocksyc_clk_div_ck@100ti,divider-clockusim_ck@1858ti,divider-clockXusim_fclk@1858ti,gate-clockXtrace_clk_div_ckti,clkdm-gate-clock div_ts_ck@1888ti,divider-clock  bandgap_ts_fclk@1888ti,gate-clockclockdomainsemu_sys_clkdmti,clockdomainl4_wkup_cm@1800 ti,omap4-cm+ uclk@20 ti,clkctrl \emu_sys_cm@1a00 ti,omap4-cm+ uclk@20 ti,clkctrl target-module@a000ti,sysc-omap4ti,sysc|rev+ uscrm@0ti,omap4-scrm clocks+auxclk0_src_gate_ck@310 ti,composite-no-wait-gate-clockauxclk0_src_mux_ck@310ti,composite-mux-clock auxclk0_src_ckti,composite-clockauxclk0_ck@310ti,divider-clock,auxclk1_src_gate_ck@314 ti,composite-no-wait-gate-clockauxclk1_src_mux_ck@314ti,composite-mux-clock auxclk1_src_ckti,composite-clockauxclk1_ck@314ti,divider-clock-auxclk2_src_gate_ck@318 ti,composite-no-wait-gate-clock auxclk2_src_mux_ck@318ti,composite-mux-clock !auxclk2_src_ckti,composite-clock !"auxclk2_ck@318ti,divider-clock".auxclk3_src_gate_ck@31c ti,composite-no-wait-gate-clock#auxclk3_src_mux_ck@31cti,composite-mux-clock $auxclk3_src_ckti,composite-clock#$%auxclk3_ck@31cti,divider-clock%/auxclk4_src_gate_ck@320 ti,composite-no-wait-gate-clock &auxclk4_src_mux_ck@320ti,composite-mux-clock  'auxclk4_src_ckti,composite-clock&'(auxclk4_ck@320ti,divider-clock( 0auxclk5_src_gate_ck@324 ti,composite-no-wait-gate-clock$)auxclk5_src_mux_ck@324ti,composite-mux-clock $*auxclk5_src_ckti,composite-clock)*+auxclk5_ck@324ti,divider-clock+$1auxclkreq0_ck@210 ti,mux-clock,-./01auxclkreq1_ck@214 ti,mux-clock,-./01auxclkreq2_ck@218 ti,mux-clock,-./01auxclkreq3_ck@21c ti,mux-clock,-./01auxclkreq4_ck@220 ti,mux-clock,-./01 auxclkreq5_ck@224 ti,mux-clock,-./01$clockdomainstarget-module@c000ti,sysc-omap4ti,syscctrl_module_wkup |revsysc+ uscm@c000ti,omap4-scm-wkupsegment@10000 simple-bus+xu@@PPtarget-module@0ti,sysc-omap2ti,syscgpio1|revsyscsyss fckdbclk+ u gpio@0ti,omap4-gpio %1A0Etarget-module@4000ti,sysc-omap2ti,sysc wd_timer2@@@|revsyscsyss" fck+ u@wdt@0ti,omap4-wdtti,omap3-wdt %Ptarget-module@8000ti,sysc-omap2-timerti,sysctimer1|revsyscsyss'   fck+ utimer@0ti,omap3430-timer  fck %%Mtarget-module@c000ti,sysc-omap2ti,sysckbd|revsyscsyss'  Xfck+ ukeypad@0ti,omap4-keypad %x|mputarget-module@e000ti,sysc-omap4ti,syscctrl_module_pad_wkup |revsysc+ upinmux@40 ti,omap4-padconfpinctrl-single@8+\E0kpinmux_leds_wkpinspinmux_twl6030_wkup_pinsrsegment@20000 simple-bus+u``  00@@PPpptarget-module@0ti,sysc disabled+ utarget-module@2000ti,sysc disabled+ u target-module@4000ti,sysc disabled+ u@target-module@6000ti,sysc disabled+0u`p 0interconnect@4a000000ti,omap4-l4-cfgsimple-busJJJ |aplaia0+TuJJJJ J (J(0J0segment@0 simple-bus+u 00@@PP``pp@  00 ``pp @@PPtarget-module@2000ti,sysc-omap4ti,syscctrl_module_core   |revsysc+ u scm@0ti,omap4-scm-coresimple-bus+ uscm_conf@0syscon+control-phy@300ti,control-phy-usb2|powerbcontrol-phy@33cti,control-phy-otghs<|otghs_controlatarget-module@4000ti,sysc-omap4ti,sysc@|rev+ u@cm1@0ti,omap4-cm1simple-bus + u clocks+extalt_clkin_ck fixed-clockDpad_clks_src_ck fixed-clock2pad_clks_ck@108ti,gate-clock2pad_slimbus_core_clks_ck fixed-clocksecure_32k_clk_src_ck fixed-clockslimbus_src_clk fixed-clock3slimbus_clk@108ti,gate-clock3 sys_32k_ck fixed-clockvirt_12000000_ck fixed-clockvirt_13000000_ck fixed-clock]@ virt_16800000_ck fixed-clockY virt_19200000_ck fixed-clock$ virt_26000000_ck fixed-clock virt_27000000_ck fixed-clock virt_38400000_ck fixed-clockItie_low_clock_ck fixed-clockutmi_phy_clkout_ck fixed-clockxclk60mhsp1_ck fixed-clock\xclk60mhsp2_ck fixed-clock]xclk60motg_ck fixed-clockdpll_abe_ck@1e0ti,omap4-dpll-m4xen-clock456dpll_abe_x2_ck@1f0ti,omap4-dpll-x2-clock67dpll_abe_m2x2_ck@1f0ti,divider-clock78abe_24m_fclkfixed-factor-clock8abe_clk@108ti,divider-clock8dpll_abe_m3x2_ck@1f4ti,divider-clock79core_hsd_byp_clk_mux_ck@12c ti,mux-clock9,:dpll_core_ck@120ti,omap4-dpll-core-clock: $,(;dpll_core_x2_ckti,omap4-dpll-x2-clock;<dpll_core_m6x2_ck@140ti,divider-clock<@dpll_core_m2_ck@130ti,divider-clock;0=ddrphy_ckfixed-factor-clock=dpll_core_m5x2_ck@13cti,divider-clock<<>div_core_ck@100ti,divider-clock>Idiv_iva_hs_clk@1dcti,divider-clock>Bdiv_mpu_hs_clk@19cti,divider-clock>Hdpll_core_m4x2_ck@138ti,divider-clock<8?dll_clk_div_ckfixed-factor-clock?dpll_abe_m2_ck@1f0ti,divider-clock6Ldpll_core_m3x2_gate_ck@134 ti,composite-no-wait-gate-clock<4@dpll_core_m3x2_div_ck@134ti,composite-divider-clock<4Adpll_core_m3x2_ckti,composite-clock@Adpll_core_m7x2_ck@144ti,divider-clock<Diva_hsd_byp_clk_mux_ck@1ac ti,mux-clockBCdpll_iva_ck@1a0ti,omap4-dpll-clockCD 7Ddpll_iva_x2_ckti,omap4-dpll-x2-clockDEdpll_iva_m4x2_ck@1b8ti,divider-clockEF ~Fdpll_iva_m5x2_ck@1bcti,divider-clockEG ] Gdpll_mpu_ck@160ti,omap4-dpll-clockH`dlhdpll_mpu_m2_ck@170ti,divider-clockpper_hs_clk_div_ckfixed-factor-clock9Musb_hs_clk_div_ckfixed-factor-clock9Sl3_div_ck@100ti,divider-clockIJl4_div_ck@100ti,divider-clockJlp_clk_div_ckfixed-factor-clock8mpu_periphclkfixed-factor-clockocp_abe_iclk@528ti,divider-clock K(per_abe_24m_fclkfixed-factor-clockLdummy_ck fixed-clockclockdomainsmpuss_cm@300 ti,omap4-cm+ uclk@20 ti,clkctrl tesla_cm@400 ti,omap4-cm+ uclk@20 ti,clkctrl _abe_cm@500 ti,omap4-cm+ uclk@20 ti,clkctrl lKtarget-module@8000ti,sysc-omap4ti,sysc|rev+ u cm2@0ti,omap4-cm2simple-bus + u clocks+per_hsd_byp_clk_mux_ck@14c ti,mux-clockMLNdpll_per_ck@140ti,omap4-dpll-clockN@DLHOdpll_per_m2_ck@150ti,divider-clockOPWdpll_per_x2_ck@150ti,omap4-dpll-x2-clockOPPdpll_per_m2x2_ck@150ti,divider-clockPPVdpll_per_m3x2_gate_ck@154 ti,composite-no-wait-gate-clockPTQdpll_per_m3x2_div_ck@154ti,composite-divider-clockPTRdpll_per_m3x2_ckti,composite-clockQRdpll_per_m4x2_ck@158ti,divider-clockPXdpll_per_m5x2_ck@15cti,divider-clockP\dpll_per_m6x2_ck@160ti,divider-clockP`Udpll_per_m7x2_ck@164ti,divider-clockPddpll_usb_ck@180ti,omap4-dpll-j-type-clockSTdpll_usb_clkdcoldo_ck@1b4ti,fixed-factor-clockT5Bdpll_usb_m2_ck@190ti,divider-clockTXducati_clk_mux_ck@100 ti,mux-clockIUfunc_12m_fclkfixed-factor-clockVfunc_24m_clkfixed-factor-clockWfunc_24mc_fclkfixed-factor-clockVfunc_48m_fclk@108ti,divider-clockVfunc_48mc_fclkfixed-factor-clockVfunc_64m_fclk@108ti,divider-clockfunc_96m_fclk@108ti,divider-clockVinit_60m_fclk@104ti,divider-clockX[per_abe_nc_fclk@108ti,divider-clockLusb_phy_cm_clk32k@640ti,gate-clock@cclockdomainsl3_init_clkdmti,clockdomainTl4_ao_cm@600 ti,omap4-cm+ uclk@20 ti,clkctrl dl3_1_cm@700 ti,omap4-cm+ uclk@20 ti,clkctrl l3_2_cm@800 ti,omap4-cm+ uclk@20 ti,clkctrl ducati_cm@900 ti,omap4-cm + u clk@20 ti,clkctrl l3_dma_cm@a00 ti,omap4-cm + u clk@20 ti,clkctrl Yl3_emif_cm@b00 ti,omap4-cm + u clk@20 ti,clkctrl d2d_cm@c00 ti,omap4-cm + u clk@20 ti,clkctrl l4_cfg_cm@d00 ti,omap4-cm + u clk@20 ti,clkctrl el3_instr_cm@e00 ti,omap4-cm+ uclk@20 ti,clkctrl $ivahd_cm@f00 ti,omap4-cm+ uclk@20 ti,clkctrl iss_cm@1000 ti,omap4-cm+ uclk@20 ti,clkctrl ll3_dss_cm@1100 ti,omap4-cm+ uclk@20 ti,clkctrl l3_gfx_cm@1200 ti,omap4-cm+ uclk@20 ti,clkctrl l3_init_cm@1300 ti,omap4-cm+ uclk@20 ti,clkctrl Zl4_per_cm@1400 ti,omap4-cm+ uclk@20 ti,clkctrl Dmtarget-module@56000ti,sysc-omap2ti,sysc dma_system``,`(|revsyscsyss# P  Yfck+ u`dma-controller@0ti,omap4430-sdma0%  ^i vytarget-module@58000ti,sysc-omap2ti,syschsi|revsyscsyss#P Zfck+ uPhsi@0 ti,omap4-hsi@P|sysgdd Zhsi_fck %Ggdd_mpu+ u@hsi-port@2000ti,omap4-hsi-port (|txrx %Chsi-port@3000ti,omap4-hsi-port08|txrx %Dtarget-module@5e000ti,sysc disabled+ u target-module@62000ti,sysc-omap2ti,sysc usb_tll_hs   |revsyscsyss  ZHfck+ u usbhstll@0 ti,usbhs-tll %Ntarget-module@64000ti,sysc-omap4ti,sysc usb_host_hs@@@|revsyscsyssP Z8fck+ u@usbhshost@0ti,usbhs-host+ u [\]3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 ehci-phyohci@800ti,ohci-omap3 %Lehci@c00 ti,ehci-omap  %M^+hub@1 usb424,9514+usbether@1 usb424,ec00target-module@66000ti,sysc-omap2ti,syscmmu_dsp```|revsyscsyss  _fck+ u` disabledsegment@80000 simple-bus+u      @@PP``pp` `p p        target-module@29000ti,sysc disabled+ utarget-module@2b000ti,sysc-omap2ti,sysc usb_otg_hs|revsyscsyss P Z@fck+ uusb_otg_hs@0ti,omap4-musb%\]mcdma`` usb2-phy a2target-module@2d000ti,sysc-omap2ti,syscocp2scp_usb_phy|revsyscsyss  Zfck+ uocp2scp@0ti,omap-ocp2scp+ uusb2phy@80 ti,omap-usb2Xbcwkupclk `target-module@36000ti,sysc disabled+ u`target-module@4d000ti,sysc disabled+ utarget-module@59000ti,sysc-omap4-srti,syscsmartreflex_mpu8|sysc dfck+ usmartreflex@0ti,omap4-smartreflex-mpu %target-module@5b000ti,sysc-omap4-srti,syscsmartreflex_iva8|sysc dfck+ usmartreflex@0ti,omap4-smartreflex-iva %ftarget-module@5d000ti,sysc-omap4-srti,syscsmartreflex_core8|sysc dfck+ usmartreflex@0ti,omap4-smartreflex-core %target-module@60000ti,sysc disabled+ utarget-module@74000ti,sysc-omap4ti,syscmailbox@@ |revsysc  efck+ u@mailbox@0ti,omap4-mailbox %!3mbox_ipu E Pmbox_dsp E Ptarget-module@76000ti,sysc-omap2ti,sysc spinlock```|revsyscsyss  efck+ u`spinlock@0ti,omap4-hwspinlock[segment@100000 simple-bus+`u  00target-module@0ti,sysc-omap4ti,syscctrl_module_pad_core |revsysc+ upinmux@40 ti,omap4-padconfpinctrl-single@+\E0kidefaultwfghijnpinmux_twl6040_pins`tpinmux_mcpdm_pins(pinmux_mcbsp1_pins pinmux_dss_dpi_pins"$&(*,.0246tvxz|~fpinmux_tfp410_pinsDgpinmux_dss_hdmi_pinsZ\^hpinmux_tpd12s015_pins"HX ipinmux_hsusbb1_pins`           jpinmux_i2c1_pinsppinmux_i2c2_pinsxpinmux_i2c3_pinsopinmux_i2c4_pinspinmux_wl12xx_gpio &,02pinmux_wl12xx_pins@8:  |pinmux_button_pinspinmux_twl6030_pins^Aqgpio_led_pmxomap4_padconf_global@5a0sysconsimple-busp+ upkpbias_regulator@60ti,pbias-omap4ti,pbias-omap`kpbias_mmc_omap4pbias_mmc_omap4w@-ztarget-module@2000ti,sysc disabled+ u target-module@8000ti,sysc disabled+ utarget-module@a000ti,sysc-omap4ti,syscfdif |revsysc P  lfck+ usegment@180000 simple-bus+segment@200000 simple-bus+hu!!  @ @P P` `p p ! 0!0  !!`!`p!p@!@P!P!!""`"`p"p""""!!target-module@4000ti,sysc disabled+ u@target-module@6000ti,sysc disabled+ u`target-module@a000ti,sysc disabled+ utarget-module@c000ti,sysc disabled+ utarget-module@10000ti,sysc disabled+ utarget-module@12000ti,sysc disabled+ u target-module@14000ti,sysc disabled+ u@target-module@16000ti,sysc disabled+ u`target-module@18000ti,sysc disabled+ utarget-module@1c000ti,sysc disabled+ utarget-module@1e000ti,sysc disabled+ utarget-module@20000ti,sysc disabled+ utarget-module@26000ti,sysc disabled+ u`target-module@28000ti,sysc disabled+ utarget-module@2a000ti,sysc disabled+ usegment@280000 simple-bus+segment@300000 simple-bus+u042@@2@ `2`p2p2232 2@11@1 1 target-module@0ti,sysc disabled+u@  @@@ ``pp @interconnect@48000000ti,omap4-l4-persimple-bus0HHHHHH|aplaia0ia1ia2ia3+uH H segment@0 simple-bus+u  00@@PP``ppPP``pp  00 ` ` p p``pp``pp             @ @ ` ` @     0 0 @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscuart3PTX|revsyscsyss m0fck+ userial@0ti,omap4-uart %JlJntarget-module@32000ti,sysc-omap2-timerti,sysctimer2   |revsyscsyss'  mfck+ u timer@0ti,omap3430-timer mfck %&target-module@34000ti,sysc-omap4-timerti,sysctimer3@@ |revsysc m fck+ u@timer@0ti,omap4430-timer m fck %'target-module@36000ti,sysc-omap4-timerti,sysctimer4`` |revsysc m(fck+ u`timer@0ti,omap4430-timer m(fck %(target-module@3e000ti,sysc-omap4-timerti,sysctimer9 |revsysc m0fck+ utimer@0ti,omap4430-timer m0fck %-target-module@40000ti,sysc disabled+ utarget-module@55000ti,sysc-omap2ti,syscgpio2PPQ|revsyscsyssm@m@ fckdbclk+ uPgpio@0ti,omap4-gpio %1A0E~target-module@57000ti,sysc-omap2ti,syscgpio3ppq|revsyscsyssmHmH fckdbclk+ upgpio@0ti,omap4-gpio %1A0Etarget-module@59000ti,sysc-omap2ti,syscgpio4|revsyscsyssmPmP fckdbclk+ ugpio@0ti,omap4-gpio % 1A0Eutarget-module@5b000ti,sysc-omap2ti,syscgpio5|revsyscsyssmXmX fckdbclk+ ugpio@0ti,omap4-gpio %!1A0Etarget-module@5d000ti,sysc-omap2ti,syscgpio6|revsyscsyssm`m` fckdbclk+ ugpio@0ti,omap4-gpio %"1A0Etarget-module@60000ti,sysc-omap2ti,sysci2c3|revsyscsyss mfck+ ui2c@0 ti,omap4-i2c %=+idefaultwoeeprom@50 ti,eepromPtarget-module@6a000ti,sysc-omap2ti,syscuart1PTX|revsyscsyss m fck+ userial@0ti,omap4-uart %Hltarget-module@6c000ti,sysc-omap2ti,syscuart2PTX|revsyscsyss m(fck+ userial@0ti,omap4-uart %IlIntarget-module@6e000ti,sysc-omap2ti,syscuart4PTX|revsyscsyss m8fck+ userial@0ti,omap4-uart %FlFntarget-module@70000ti,sysc-omap2ti,sysci2c1|revsyscsyss mfck+ ui2c@0 ti,omap4-i2c %8+idefaultwptwl@48H % ti,twl60300Eidefaultwqrrtcti,twl4030-rtc% regulator-vaux1ti,twl6030-vaux1B@-regulator-vaux2ti,twl6030-vaux2O*regulator-vaux3ti,twl6030-vaux3B@-regulator-vmmcti,twl6030-vmmcO-{regulator-vppti,twl6030-vppw@&%regulator-vusimti,twl6030-vusimO,@ regulator-vdacti,twl6030-vdacregulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxioregulator-vusbti,twl6030-vusbsregulator-v1v8ti,twl6030-v1v8vregulator-v2v1ti,twl6030-v2v1wusb-comparatorti,twl6030-usb%  spwmti,twl6030-pwmpwmledti,twl6030-pwmledgpadcti,twl6030-gpadc%#twl@4b ti,twl6040Kidefaultwt %w 5uFvQw]target-module@72000ti,sysc-omap2ti,sysci2c2   |revsyscsyss mfck+ u i2c@0 ti,omap4-i2c %9+idefaultwxtarget-module@76000ti,sysc-omap4ti,sysc slimbus2`` |revsysc mfck+ u`target-module@78000ti,sysc-omap2ti,syscelm|revsyscsyss  m8fck+ uelm@0ti,am3352-elm  % disabledtarget-module@86000ti,sysc-omap2-timerti,sysctimer10```|revsyscsyss'  mfck+ u`timer@0ti,omap3430-timer mfck %.target-module@88000ti,sysc-omap4-timerti,sysctimer11 |revsysc mfck+ utimer@0ti,omap4430-timer mfck %/target-module@90000ti,sysc disabled+ u target-module@96000ti,sysc-omap2ti,syscmcbsp4 `|sysc  mfck+ u `mcbsp@0ti,omap4-mcbsp|mpu %commonpyy txrx disabledtarget-module@98000ti,sysc-omap4ti,syscmcspi1   |revsysc mfck+ u spi@0ti,omap4-mcspi %A+@y#y$y%y&y'y(y)y* tx0rx0tx1rx1tx2rx2tx3rx3target-module@9a000ti,sysc-omap4ti,syscmcspi2   |revsysc mfck+ u spi@0ti,omap4-mcspi %B+ y+y,y-y.tx0rx0tx1rx1target-module@9c000ti,sysc-omap4ti,syscmmc1   |revsyscP Zfck+ u mmc@0ti,omap4-hsmmc %Sy=y>txrxz{target-module@9e000ti,sysc disabled+ u target-module@a2000ti,sysc disabled+ u target-module@a4000ti,sysc disabled+u @ Ptarget-module@a8000ti,sysc disabled+ u @target-module@ad000ti,sysc-omap4ti,syscmmc3   |revsyscP mfck+ u mmc@0ti,omap4-hsmmc %^yMyNtxrx disabledtarget-module@b0000ti,sysc disabled+ u target-module@b2000ti,sysc-omap2ti,syschdq1w   |revsyscsyss  mhfck+ u 1w@0 ti,omap3-1w %:target-module@b4000ti,sysc-omap4ti,syscmmc2 @ @ |revsyscP Zfck+ u @mmc@0ti,omap4-hsmmc %Vy/y0txrx disabledtarget-module@b8000ti,sysc-omap4ti,syscmcspi3   |revsysc mfck+ u spi@0ti,omap4-mcspi %[+yytx0rx0target-module@ba000ti,sysc-omap4ti,syscmcspi4   |revsysc mfck+ u spi@0ti,omap4-mcspi %0+yFyGtx0rx0target-module@d1000ti,sysc-omap4ti,syscmmc4   |revsyscP mfck+ u mmc@0ti,omap4-hsmmc %`y9y:txrx disabledtarget-module@d5000ti,sysc-omap4ti,syscmmc5 P P |revsyscP m@fck+ u Pmmc@0ti,omap4-hsmmc %;y;y<txrxidefaultw|};n+wlcore@2 ti,wl1271 ~%Isegment@200000 simple-bus+u55target-module@150000ti,sysc-omap2ti,sysci2c4|revsyscsyss mfck+ ui2c@0 ti,omap4-i2c %>+idefaultwocmcram@40304000 mmio-sram@0@gpmc@50000000ti,omap4430-gpmcP+ %yrxtx$gpmc6Jfck0E1Ammu@4a066000ti,omap4-iommuJ` %mmu_dspItarget-module@52000000ti,sysc-omap4ti,syscissRR |revsyscP lfck+ uRmmu@55082000ti,omap4-iommuU  %dmmu_ipuIVtarget-module@40130000ti,sysc-omap2ti,sysc wd_timer3@@@|revsyscsyss" Khfck+u@IIwdt@0ti,omap4-wdtti,omap3-wdt %Pmcpdm@40132000ti,omap4-mcpdm@ I |mpudma %pmcpdmyAyBup_linkdn_linkokayidefaultwpdmclkdmic@4012e000ti,omap4-dmic@I|mpudma %rdmicyCup_link disabledmcbsp@40122000ti,omap4-mcbsp@ I |mpudma %commonpmcbsp1y!y"txrxokayidefaultwmcbsp@40124000ti,omap4-mcbsp@@I@|mpudma %commonpmcbsp2yytxrx disabledmcbsp@40126000ti,omap4-mcbsp@`I`|mpudma %commonpmcbsp3yytxrx disabledtarget-module@40128000ti,sysc-mcaspti,syscmcasp@@ |revsysc K fck+u@IItarget-module@4012c000ti,sysc-omap4ti,sysc slimbus1@@ |revsysc K@fck+u@IItarget-module@401f1000ti,sysc-omap4ti,syscaess@@ |revsyscP  Kfck+u@IIdmm@4e000000 ti,omap4-dmmN %qdmmemif@4c000000 ti,emif-4dL %nemif16luemif@4d000000 ti,emif-4dM %oemif26lutimer@40138000ti,omap4430-timer@I %)timer5timer@4013a000ti,omap4430-timer@I %*timer6timer@4013c000ti,omap4430-timer@I %+timer7timer@4013e000ti,omap4430-timer@I %,timer8aes@4b501000 ti,omap4-aesaes1KP %Uyoyntxrxaes@4b701000 ti,omap4-aesaes2Kp %@yryqtxrxdes@480a5000 ti,omap4-desdesH P %Ryuyttxrxsham@4b100000ti,omap4-shamshamK %3ywrxregulator-abb-mpu ti,abb-v2abb_mpu+2okayJ0{J0`J"h'|base-addressint-addressefuse-addressxO1regulator-abb-iva ti,abb-v2abb_iva+؀2okayJ0{J0`J"h'|base-addressint-addressefuse-addressx~e  target-module@56000000ti,sysc-omap4ti,syscgpuVV |revsyscP fck+ uVdss@58000000 ti,omap4-dssXok dss_core fck+udispc@58001000ti,omap4-dispcX % dss_dispc fckencoder@58002000ti,omap4-rfbiX  disabled dss_rfbiJfckickencoder@58003000ti,omap4-vencX0 disabled dss_venc fckencoder@58004000 ti,omap4-dsiX@XB@XC |protophypll %5 disabled dss_dsi1  fcksys_clkencoder@58005000 ti,omap4-dsiXPXR@XS |protophypll %Tok dss_dsi2  fcksys_clkencoder@58006000ti,omap4-hdmi X`XbXcXd|wppllphycore %eok dss_hdmi  fcksys_clkyL audio_tx)portendpoint5portendpoint5Ebandgap@4a002260J"`J#,J#xti,omap4460-bandgap %~ PVthermal-zonescpu_thermall\۫tripscpu_alertpassivecpu_critH criticalcooling-mapsmap0 lpddr2#Elpida,ECB240ABACNjedec,lpddr2-s4  -:FS`olpddr2-timings@0jedec,lpddr2-timings|ׄRFP:'LLL:|P_~@B@pplpddr2-timings@1jedec,lpddr2-timings| RFP:''LL:|P_~@B@ppmemory@80000000memory΀@leds gpio-ledsidefaultwheartbeat pandaboard::status1 Pu heartbeatmmc pandaboard::status2 P mmc0gpio_keys gpio-keysidefaultwbuttonS2 button S2 Pu  *soundti,abe-twl6040 8PandaBoardES AI N W bHeadset StereophoneHSOLHeadset StereophoneHSORExt SpkHFLExt SpkHFRLine OutAUXLLine OutAUXRAFMLLine InAFMRLine Inhsusb1_power_regregulator-fixed hsusb1_vbus2Z2Z A sp] hsusb1_phyusb-nop-xceiv ~  / main_clk$^wl12xx_vmmcidefaultwregulator-fixedvwl1271w@w@ A~  sp]}encoder0 ti,tfp410 ports+port@0endpoint5port@1endpoint5connector0dvi-connector dvi  portendpoint5encoder1 ti,tpd12s015$P~~ ~ports+port@0endpoint5port@1endpoint5connector1hdmi-connector hdmiaportendpoint5 compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2i2c3mmc0mmc1mmc2mmc3mmc4serial0serial1serial2serial3display0display1ethernetdevice_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleti,hwmodsinterruptsinterrupt-controller#interrupt-cellscache-unifiedcache-levelsramrangesreg-namesti,sysc-sidle#clock-cellsti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividersti,sysc-maskti,syss-maskti,no-reset-on-initti,gpio-always-ongpio-controller#gpio-cellsti,timer-alwon#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clocksassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesport1-moderemote-wakeup-connectedphysusb-phyphy-namesmultipointnum-epsram-bitsctrl-moduleinterface-typepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellspinctrl-namespinctrl-0sysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highti,buffer-sizedmasdma-namesti,spi-num-csti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthnon-removablecap-power-off-cardref-clock-frequencygpmc,num-csgpmc,num-waitpinsti,no-idle-on-init#iommu-cellsti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertcs1-useddevice-handleti,timer-dspti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infovdd-supplyvdda-supplyremote-endpointdata-linesgpios#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicedensityio-widthtRPab-min-tcktRCD-min-tcktWR-min-tcktRASmin-min-tcktRRD-min-tcktWTR-min-tcktXP-min-tcktRTP-min-tcktCKE-min-tcktCKESR-min-tcktFAW-min-tckmin-freqmax-freqtRPabtRCDtWRtRAS-mintRRDtWTRtXPtRTPtCKESRtDQSCK-maxtFAWtZQCStZQCLtZQinittRAS-max-nstDQSCK-max-deratedlabellinux,default-triggerlinux,codewakeup-sourceti,modelti,mclk-freqti,mcpdmti,twl6040ti,audio-routingstartup-delay-usregulator-boot-onreset-gpiosvcc-supplypowerdown-gpiosdigitalddc-i2c-bus