8(,rockchip,rk3288-evb-act8846rockchip,rk3288&aliases7/ethernet@ff290000A/i2c@ff650000F/i2c@ff140000K/i2c@ff660000P/i2c@ff150000U/i2c@ff160000Z/i2c@ff170000_/dwmmc@ff0f0000e/dwmmc@ff0c0000k/dwmmc@ff0d0000q/dwmmc@ff0e0000w/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12!@/6 Bcpu@501cpuarm,cortex-a12!@/Bcpu@502cpuarm,cortex-a12!@/Bcpu@503cpuarm,cortex-a12!@/Bcpu-opp-tableoperating-points-v2JBopp-126000000U\ opp-216000000U \ opp-312000000U\ opp-408000000UQ\ opp-600000000U#F\ opp-696000000U)|\~opp-816000000U0,\B@opp-1008000000U<\opp-1200000000UG\opp-1416000000UTfr\Oopp-1512000000UZJ\ opp-1608000000U_"\pamba simple-busjdma-controller@ff250000arm,pl330arm,primecell%@q|/ apb_pclkBdma-controller@ff600000arm,pl330arm,primecell`@q|/ apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@q|/ apb_pclkBUreserved-memoryjdma-unusable@fe000000oscillator fixed-clockn6xin24mB timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H /a  pclktimerdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр /Drvbiuciuciu-driveciu-sample)  @4resetokay@J\mdefault dwmmc@ff0d0000rockchip,rk3288-dw-mshcр /Eswbiuciuciu-driveciu-sample) ! @4reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр /Ftxbiuciuciu-driveciu-sample) "@4reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр /Guybiuciuciu-driveciu-sample) #@4resetokay@Jdefaultsaradc@ff100000rockchip,saradc $/I[saradcapb_pclkW 4saradc-apbokayBwspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi/ARspiclkapb_pclk  txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi/BSspiclkapb_pclk txrx -default  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi/CTspiclkapb_pclktxrx .default!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >i2c/Mdefault% disabledi2c@ff150000rockchip,rk3288-i2c ?i2c/Odefault& disabledi2c@ff160000rockchip,rk3288-i2c @i2c/Pdefault' disabledi2c@ff170000rockchip,rk3288-i2c Ai2c/Qdefault(okayBlserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7/MUbaudclkapb_pclkdefault)okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8/NVbaudclkapb_pclkdefault*okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9/OWbaudclkapb_pclkdefault+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :/PXbaudclkapb_pclkdefault,okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;/QYbaudclkapb_pclkdefault-okaythermal-zonesreserve_thermal #1.cpu_thermal d#1.tripscpu_alert0ApMpassiveB/cpu_alert1A$MpassiveB0cpu_critA_M criticalcooling-mapsmap0X/ ]map1X0 ]gpu_thermal d#1.tripsgpu_alert0ApMpassiveB1gpu_critA_M criticalcooling-mapsmap0X1 ]tsadc@ff280000rockchip,rk3288-tsadc( %/HZtsadcapb_pclk 4tsadc-apbinitdefaultsleep2l3v2sokayB.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq48/fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB 4stmmacethok5rgmiiinput 6- C'B@Xh7default80usb@ff500000 generic-ehciP /usbhost9usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T /otghost: usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X /otgotg@@ ; usb2-phy disabledusb@ff5c0000 generic-ehci\ /usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c/Ldefault<okaysyr827@40silergy,syr827@vdd_cpu Pp4HZ=B syr828@41silergy,syr828Avdd_gpu Pp4Z=Bphym8563@51haoyu,hym8563Q&>default?xin32kact8846@5aactive-semi,act8846Zokaye=p={==@=AregulatorsREG1VCC_DDROO4REG2VCC_IO2Z2Z4B@REG3VDD_LOG ``4REG4VCC_204BAREG5 VCCIO_SDw@2Z4BREG6 VDD10_LCDB@B@4REG7 VCCA_CODEC2Z2Z4REG8VCCA_TP2Z2Z4REG9 VCCIO_PMU2Z2Z4REG10VDD_10B@B@4REG11VCC_18w@w@4BREG12 VCC18_LCDw@w@4i2c@ff660000rockchip,rk3288-i2cf =i2c/NdefaultB disabledpwm@ff680000rockchip,rk3288-pwmhdefaultC/^pwmokayBzpwm@ff680010rockchip,rk3288-pwmhdefaultD/^pwm disabledpwm@ff680020rockchip,rk3288-pwmh defaultE/^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultF/^pwm disabledbus_intmem@ff700000 mmio-srampjpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsBpower-controller!rockchip,rk3288-power-controllerXhh BXpower-domain@9 /chgfdehilkj$GHIJKLMNOpower-domain@11 /opPQpower-domain@12 /Rpower-domain@13 /STreboot-modesyscon-reboot-modeRBRBRB  RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv4HXjk$%#gׄeрxhрxhBsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwB4edp-phyrockchip,rk3288-dp-phy/h24m:okayBhio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokayusb-phy@320: /]phyclkB;usb-phy@334:4/^phyclkB9usb-phy@348:H/_phyclkB:watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifE hclkmclk/TUtx 6defaultV4 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2sE 5UUtxrxi2s_hclki2s_clk/RdefaultWVq disabledcrypto@ff8a0000rockchip,rk3288-crypto@ 0 /}aclkhclksclkapb_pclk 4crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu/ aclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu/ aclkiface disabledrga@ff920000rockchip,rk3288-rga /jaclkhclksclkX ilm 4coreaxiahbvop@ff930000rockchip,rk3288-vop /aclk_vopdclk_vophclk_vopX def 4axiahbdclkYokayportB endpoint@0ZBmendpoint@1[Biendpoint@2\Bcendpoint@3]Bfiommu@ff930300rockchip,iommu  vopb_mmu/ aclkifaceX okayBYvop@ff940000rockchip,rk3288-vop /aclk_vopdclk_vophclk_vopX  4axiahbdclk^okayportB endpoint@0_Bnendpoint@1`Bjendpoint@2aBdendpoint@3bBgiommu@ff940300rockchip,iommu  vopl_mmu/ aclkifaceX okayB^mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ /~d refpclkX 4 disabledportsportendpoint@0cB\endpoint@1dBalvds@ff96c000rockchip,rk3288-lvds@/g pclk_lvdslcdceX 4 disabledportsport@0endpoint@0fB]endpoint@1gBbdp@ff970000rockchip,rk3288-dp@ b/icdppclkhdpo4dp4okayportsport@0endpoint@0iB[endpoint@1jB`port@1endpoint@0kB~hdmi@ff980000rockchip,rk3288-dw-hdmiE4 g/hmniahbisfrcecX okaylportsportendpoint@0mBZendpoint@1nB_iommu@ff9a0800rockchip,iommu vpu_mmu/ aclkiface disablediommu@ff9c0440rockchip,iommu @@@ o hevc_mmu/ aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu/oX okaypgpu-opp-tableoperating-points-v2Boopp-100000000U\~opp-200000000U \~opp-300000000U\B@opp-400000000Uׄ\opp-500000000Ue\Oopp-600000000U#F\qos@ffaa0000syscon BSqos@ffaa0080syscon BTqos@ffad0000syscon BHqos@ffad0100syscon BIqos@ffad0180syscon BJqos@ffad0400syscon BKqos@ffad0480syscon BLqos@ffad0500syscon BGqos@ffad0800syscon BMqos@ffad0880syscon BNqos@ffad0900syscon BOqos@ffae0000syscon BRqos@ffaf0000syscon BPqos@ffaf0080syscon BQinterrupt-controller@ffc01000 arm,gic-400@ @ `   Befuse@ffb40000rockchip,rk3288-efuse /q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl4jgpio0@ff750000rockchip,gpio-banku Q/@ 0B>gpio1@ff780000rockchip,gpio-bankx R/A 0gpio2@ff790000rockchip,gpio-banky S/B 0gpio3@ff7a0000rockchip,gpio-bankz T/C 0gpio4@ff7b0000rockchip,gpio-bank{ U/D 0B6gpio5@ff7c0000rockchip,gpio-bank| V/E 0gpio6@ff7d0000rockchip,gpio-bank} W/F 0gpio7@ff7e0000rockchip,gpio-bank~ X/G 0Bxgpio8@ff7f0000rockchip,gpio-bank Y/H 0hdmihdmi-cec-c0<qhdmi-cec-c7<qhdmi-ddc <qqpcfg-pull-upJBrpcfg-pull-downWBspcfg-pull-nonefBqpcfg-pull-none-12mafs Bvsuspendglobal-pwroff<qddrio-pwroff<qddr0-retention<rddr1-retention<redpedp-hpd< si2c0i2c0-xfer <qqB<i2c1i2c1-xfer <qqB%i2c2i2c2-xfer < q qBBi2c3i2c3-xfer <qqB&i2c4i2c4-xfer <qqB'i2c5i2c5-xfer <qqB(i2s0i2s0-bus`<qqqqqqBWlcdclcdc-ctl@<qqqqBesdmmcsdmmc-clk<tB sdmmc-cmd<uBsdmmc-cd<rBsdmmc-bus1<rsdmmc-bus4@<uuuuBsdmmc-pwr< qBsdio0sdio0-bus1<rsdio0-bus4@<rrrrsdio0-cmd<rsdio0-clk<qsdio0-cd<rsdio0-wp<rsdio0-pwr<rsdio0-bkpwr<rsdio0-int<rsdio1sdio1-bus1<rsdio1-bus4@<rrrrsdio1-cd<rsdio1-wp<rsdio1-bkpwr<rsdio1-int<rsdio1-cmd<rsdio1-clk<qsdio1-pwr< remmcemmc-clk<qBemmc-cmd<rBemmc-pwr< rBemmc-bus1<remmc-bus4@<rrrremmc-bus8<rrrrrrrrBspi0spi0-clk< rBspi0-cs0< rBspi0-tx<rBspi0-rx<rBspi0-cs1<rspi1spi1-clk< rBspi1-cs0< rB spi1-rx<rBspi1-tx<rBspi2spi2-cs1<rspi2-clk<rB!spi2-cs0<rB$spi2-rx<rB#spi2-tx< rB"uart0uart0-xfer <rqB)uart0-cts<ruart0-rts<quart1uart1-xfer <r qB*uart1-cts< ruart1-rts< quart2uart2-xfer <rqB+uart3uart3-xfer <rqB,uart3-cts< ruart3-rts< quart4uart4-xfer <rqB-uart4-cts< ruart4-rts< qtsadcotp-gpio< qB2otp-out< qB3pwm0pwm0-pin<qBCpwm1pwm1-pin<qBDpwm2pwm2-pin<qBEpwm3pwm3-pin<qBFgmacrgmii-pins<qqqqvvvvqqq vvqqB8rmii-pins<qqqqqqqqqqspdifspdif-tx< qBVpcfg-pull-none-drv-8masBtpcfg-pull-up-drv-8maJsBubacklightbl-en<qBybuttonspwrbtn<rBlcdlcd-cs<qB|lcd-en<qBpmicpmic-int<rB?usbhost-vbus-drv<qBeth_phyeth-phy-pwr<qBwifiwifi-pwr< qBmemory@0memoryadc-keys adc-keyswbuttonsw@button-up Volume Upsbutton-down Volume DownrmenuMenu escEscB@homeHomef backlightpwm-backlight  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ xdefaultyzB@B{external-gmac-clock fixed-clocksY@ ext_gmacB7panellg,lp079qx1-sp0vsimple-panel!{ x|+}portsportendpoint~Bkgpio-keys gpio-keys8defaultpower >tGPIO Key PowerCTbdvcc-host-regulatorregulator-fixedt (>default vcc_host4Hvcc-phy-regulatorregulator-fixedt (>defaultvcc_phy2Z2Z4HB5vsys-regulatorregulator-fixedvcc_sysLK@LK@4HB=sdmmc-regulatorregulator-fixed (x defaultvcc_sd2Z2ZZ@Bvcc-lcdregulator-fixedt (xdefaultvcc_lcdZ@B}vcc-wlregulator-fixedt (x defaultvcc_wlZ #address-cells#size-cellscompatibleinterrupt-parentethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointforce-hpdddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltbrightness-levelsdefault-brightness-levelenable-gpiospwmsbacklightpower-supplyautorepeatlinux,input-typewakeup-sourcedebounce-intervalenable-active-highstartup-delay-us