28|(D'rockchip,rk3288-fennecrockchip,rk3288&7Rockchip RK3288 Fennec Boardaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5< Hcpu@501cpuarm,cortex-a12'@5Hcpu@502cpuarm,cortex-a12'@5Hcpu@503cpuarm,cortex-a12'@5Hcpu-opp-tableoperating-points-v2PHopp-126000000[b opp-216000000[ b opp-312000000[b opp-408000000[Qb opp-600000000[#Fb opp-696000000[)|b~opp-816000000[0,bB@opp-1008000000[<bopp-1200000000[Gbopp-1416000000[TfrbOopp-1512000000[ZJb opp-1608000000[_"bpamba simple-buspdma-controller@ff250000arm,pl330arm,primecell%@w5 apb_pclkHdma-controller@ff600000arm,pl330arm,primecell`@w5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@w5 apb_pclkHRreserved-memorypdma-unusable@fe000000oscillator fixed-clockn6xin24mH timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5a  pclktimerdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshc!р 5Drvbiuciuciu-driveciu-sample/  @:reset disableddwmmc@ff0d0000rockchip,rk3288-dw-mshc!р 5Eswbiuciuciu-driveciu-sample/ ! @:reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshc!р 5Ftxbiuciuciu-driveciu-sample/ "@:reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc!р 5Guybiuciuciu-driveciu-sample/ #@:resetokayFPbm{default saradc@ff100000rockchip,saradc $5I[saradcapb_pclkW :saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,{default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -{default disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .{default disabledi2c@ff140000rockchip,rk3288-i2c >i2c5M{default disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5O{default disabledi2c@ff160000rockchip,rk3288-i2c @i2c5P{default  disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Q{default! disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 75MUbaudclkapb_pclk{default" disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 85NVbaudclkapb_pclk{default# disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 95OWbaudclkapb_pclk{default$okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :5PXbaudclkapb_pclk{default% disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;5QYbaudclkapb_pclk{default& disabledthermal-zonesreserve_thermal'cpu_thermald'tripscpu_alert0p passiveH(cpu_alert1$ passiveH)cpu_crit_  criticalcooling-mapsmap0( map1) gpu_thermald'tripsgpu_alert0p passiveH*gpu_crit_  criticalcooling-mapsmap0* tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk :tsadc-apb{initdefaultsleep+*,4+>Ts disabledH'ethernet@ff290000rockchip,rk3288-gmac)kmacirqeth_wake_irq{-85fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB :stmmacethokay.input{default/0123rgmii 'B@ 4 0usb@ff500000 generic-ehciP 5usbhost5"usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otg,host6 "usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otg,otg4FU@@ 7 "usb2-phyokayusb@ff5c0000 generic-ehci\ 5usbhostokayi2c@ff650000rockchip,rk3288-i2ce <i2c5L{default8okaypmic@1brockchip,rk808&9xin32krk808-clkout2{default:;d<<<<<<==== ==regulatorsDCDC_REG1';M qep}vdd_armH regulator-state-memDCDC_REG2';M Pe}vdd_gpuHkregulator-state-memB@DCDC_REG3';}vcc_ddrregulator-state-memDCDC_REG4';M2Ze2Z}vcc_ioH=regulator-state-mem2ZLDO_REG1';M2Ze2Z }vccio_pmuregulator-state-mem2ZLDO_REG2';M2Ze2Z}vcca_33regulator-state-memLDO_REG3';MB@eB@}vdd_10regulator-state-memB@LDO_REG4';Mw@ew@}vcc_wlregulator-state-memw@LDO_REG5';Mw@e2Z }vccio_sdregulator-state-mem2ZLDO_REG6';MB@eB@ }vdd10_lcdregulator-state-memB@LDO_REG7';Mw@ew@}vcc_18regulator-state-memw@LDO_REG8';Mw@ew@ }vcc18_lcdregulator-state-memw@SWITCH_REG1';}vcc_sdregulator-state-memSWITCH_REG2';}vcc_lanH3regulator-state-memi2c@ff660000rockchip,rk3288-i2cf =i2c5N{default> disabledpwm@ff680000rockchip,rk3288-pwmh{default?5^pwm disabledpwm@ff680010rockchip,rk3288-pwmh{default@5^pwm disabledpwm@ff680020rockchip,rk3288-pwmh {defaultA5^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0{defaultB5^pwm disabledbus_intmem@ff700000 mmio-srampppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsHpower-controller!rockchip,rk3288-power-controllerh HUpower-domain@9 5chgfdehilkj$CDEFGHIJKpower-domain@11 5opLMpower-domain@12 5Npower-domain@13 5OPreboot-modesyscon-reboot-modeRBRB RB 0RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv{-<Hjk$I#gׄeрxhрxhHsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwH-edp-phyrockchip,rk3288-dp-phy5h24m^ disabledHeio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokay{defaultQ i9usb-phy@320^ 5]phyclkH7usb-phy@334^45^phyclkH5usb-phy@348^H5_phyclkH6watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p O disabledsound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifx hclkmclk5TRtx 6{defaultS{- disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2sx 5RRtxrxi2s_hclki2s_clk5R{defaultT disabledcrypto@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk :crypto-rstokayiommu@ff900800rockchip,iommu@ kiep_mmu5 aclkiface disablediommu@ff914000rockchip,iommu @P kisp_mmu5 aclkiface disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclkU ilm :coreaxiahbvop@ff930000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vopU def :axiahbdclkVokayportH endpoint@0WHhendpoint@1XHfendpoint@2YH`endpoint@3ZHciommu@ff930300rockchip,iommu  kvopb_mmu5 aclkifaceU okayHVvop@ff940000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vopU  :axiahbdclk[okayportH endpoint@0\Hiendpoint@1]Hgendpoint@2^Haendpoint@3_Hdiommu@ff940300rockchip,iommu  kvopl_mmu5 aclkifaceU okayH[mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclkU {- disabledportsportendpoint@0`HYendpoint@1aH^lvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvds{lcdcbU {- disabledportsport@0endpoint@0cHZendpoint@1dH_dp@ff970000rockchip,rk3288-dp@ b5icdppclke"dpo:dp{- disabledportsport@0endpoint@0fHXendpoint@1gH]hdmi@ff980000rockchip,rk3288-dw-hdmix{- g5hmniahbisfrcecU okayportsportendpoint@0hHWendpoint@1iH\iommu@ff9a0800rockchip,iommu kvpu_mmu5 aclkiface disablediommu@ff9c0440rockchip,iommu @@@ o khevc_mmu5 aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ kjobmmugpu5jU okay kgpu-opp-tableoperating-points-v2Hjopp-100000000[b~opp-200000000[ b~opp-300000000[bB@opp-400000000[ׄbopp-500000000[ebOopp-600000000[#Fbqos@ffaa0000syscon HOqos@ffaa0080syscon HPqos@ffad0000syscon HDqos@ffad0100syscon HEqos@ffad0180syscon HFqos@ffad0400syscon HGqos@ffad0480syscon HHqos@ffad0500syscon HCqos@ffad0800syscon HIqos@ffad0880syscon HJqos@ffad0900syscon HKqos@ffae0000syscon HNqos@ffaf0000syscon HLqos@ffaf0080syscon HMinterrupt-controller@ffc01000 arm,gic-400,@ @ `   Hefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl{-pgpio0@ff750000rockchip,gpio-banku Q5@=M,H9gpio1@ff780000rockchip,gpio-bankx R5A=M,gpio2@ff790000rockchip,gpio-banky S5B=M,gpio3@ff7a0000rockchip,gpio-bankz T5C=M,gpio4@ff7b0000rockchip,gpio-bank{ U5D=M,H4gpio5@ff7c0000rockchip,gpio-bank| V5E=M,gpio6@ff7d0000rockchip,gpio-bank} W5F=M,gpio7@ff7e0000rockchip,gpio-bank~ X5G=M,gpio8@ff7f0000rockchip,gpio-bank Y5H=M,hdmihdmi-cec-c0Ylhdmi-cec-c7Ylhdmi-ddc Yllpcfg-pull-upgHmpcfg-pull-downtHnpcfg-pull-noneHlpcfg-pull-none-12ma Hosuspendglobal-pwroffYlH;ddrio-pwroffYlddr0-retentionYmddr1-retentionYmedpedp-hpdY ni2c0i2c0-xfer YllH8i2c1i2c1-xfer YllHi2c2i2c2-xfer Y l lH>i2c3i2c3-xfer YllHi2c4i2c4-xfer YllH i2c5i2c5-xfer YllH!i2s0i2s0-bus`YllllllHTlcdclcdc-ctl@YllllHbsdmmcsdmmc-clkYlsdmmc-cmdYmsdmmc-cdYmsdmmc-bus1Ymsdmmc-bus4@Ymmmmsdio0sdio0-bus1Ymsdio0-bus4@Ymmmmsdio0-cmdYmsdio0-clkYlsdio0-cdYmsdio0-wpYmsdio0-pwrYmsdio0-bkpwrYmsdio0-intYmsdio1sdio1-bus1Ymsdio1-bus4@Ymmmmsdio1-cdYmsdio1-wpYmsdio1-bkpwrYmsdio1-intYmsdio1-cmdYmsdio1-clkYlsdio1-pwrY memmcemmc-clkYlH emmc-cmdYmHemmc-pwrY mHemmc-bus1Ymemmc-bus4@Ymmmmemmc-bus8YmmmmmmmmHspi0spi0-clkY mHspi0-cs0Y mHspi0-txYmHspi0-rxYmHspi0-cs1Ymspi1spi1-clkY mHspi1-cs0Y mHspi1-rxYmHspi1-txYmHspi2spi2-cs1Ymspi2-clkYmHspi2-cs0YmHspi2-rxYmHspi2-txY mHuart0uart0-xfer YmlH"uart0-ctsYmuart0-rtsYluart1uart1-xfer Ym lH#uart1-ctsY muart1-rtsY luart2uart2-xfer YmlH$uart3uart3-xfer YmlH%uart3-ctsY muart3-rtsY luart4uart4-xfer YmlH&uart4-ctsY muart4-rtsY ltsadcotp-gpioY lH+otp-outY lH,pwm0pwm0-pinYlH?pwm1pwm1-pinYlH@pwm2pwm2-pinYlHApwm3pwm3-pinYlHBgmacrgmii-pinsYlllloooolll oollH/rmii-pinsYllllllllllphy-intY mH2phy-pmebYmH1phy-rstYpH0spdifspdif-txY lHSpcfg-output-highHppcfg-output-lowpcfg-pull-none-drv-8mapcfg-pull-up-drv-8magpmicpmic-intYmH:usbphyhost-drvYlHQmemory@0memoryexternal-gmac-clock fixed-clocksY@ ext_gmacH.vsys-regulatorregulator-fixed}vcc_sysMLK@eLK@';H< #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeeddisable-wpnon-removablepinctrl-namespinctrl-0#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-tempinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsvbus_drv-gpios#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-low