8(netxeon,r89rockchip,rk3288&aliases7/ethernet@ff290000A/i2c@ff650000F/i2c@ff140000K/i2c@ff660000P/i2c@ff150000U/i2c@ff160000Z/i2c@ff170000_/dwmmc@ff0f0000e/dwmmc@ff0c0000k/dwmmc@ff0d0000q/dwmmc@ff0e0000w/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12!@/6 Bcpu@501cpuarm,cortex-a12!@/Bcpu@502cpuarm,cortex-a12!@/Bcpu@503cpuarm,cortex-a12!@/Bcpu-opp-tableoperating-points-v2JBopp-126000000U\ opp-216000000U \ opp-312000000U\ opp-408000000UQ\ opp-600000000U#F\ opp-696000000U)|\~opp-816000000U0,\B@opp-1008000000U<\opp-1200000000UG\opp-1416000000UTfr\Oopp-1512000000UZJ\ opp-1608000000U_"\pamba simple-busjdma-controller@ff250000arm,pl330arm,primecell%@q|/ apb_pclkBdma-controller@ff600000arm,pl330arm,primecell`@q|/ apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@q|/ apb_pclkBQreserved-memoryjdma-unusable@fe000000oscillator fixed-clockn6xin24mB timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H /a  pclktimerdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр /Drvbiuciuciu-driveciu-sample)  @4resetokay@J\mdefault dwmmc@ff0d0000rockchip,rk3288-dw-mshcр /Eswbiuciuciu-driveciu-sample) ! @4reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр /Ftxbiuciuciu-driveciu-sample) "@4reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр /Guybiuciuciu-driveciu-sample) #@4reset disabledsaradc@ff100000rockchip,saradc $/I[saradcapb_pclkW 4saradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi/ARspiclkapb_pclk  txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi/BSspiclkapb_pclk txrx -default disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi/CTspiclkapb_pclktxrx .default  disabledi2c@ff140000rockchip,rk3288-i2c >i2c/Mdefault! disabledi2c@ff150000rockchip,rk3288-i2c ?i2c/Odefault" disabledi2c@ff160000rockchip,rk3288-i2c @i2c/Pdefault# disabledi2c@ff170000rockchip,rk3288-i2c Ai2c/Qdefault$okayserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7/MUbaudclkapb_pclkdefault%okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8/NVbaudclkapb_pclkdefault&okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9/OWbaudclkapb_pclkdefault'okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :/PXbaudclkapb_pclkdefault(okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;/QYbaudclkapb_pclkdefault)okaythermal-zonesreserve_thermal#*cpu_thermald#*tripscpu_alert03p?passiveB+cpu_alert13$?passiveB,cpu_crit3_? criticalcooling-mapsmap0J+ Omap1J, Ogpu_thermald#*tripsgpu_alert03p?passiveB-gpu_crit3_? criticalcooling-mapsmap0J- Otsadc@ff280000rockchip,rk3288-tsadc( %/HZtsadcapb_pclk 4tsadc-apbinitdefaultsleep.^/h.rsokayB*ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq08/fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB 4stmmacethok1rgmiiinput 2 5'B@JZ3default4q0zusb@ff500000 generic-ehciP /usbhost5usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T /otghost6 usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X /otgotg@@ 7 usb2-phyokayusb@ff5c0000 generic-ehci\ /usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c/Ldefault8okaypmic@40silergy,syr827@VDD_CPU, P*pB@Wk}9B pmic@41silergy,syr828AVDD_GPU, P*pB@Wk}9rtc@51haoyu,hym8563Qxin32k&:default;pmic@5aactive-semi,act8846Zdefault<=regulatorsREG1VCC_DDRO*OWREG2VCC_IO2Z*2ZWBuREG3VDD_LOGB@*B@WREG4VCC_20*WREG5 VCCIO_SD2Z*2ZWBREG6 VDD10_LCDB@*B@WREG7VCC_WL2Z*2ZWREG8VCCA_332Z*2ZWREG9VCC_LAN2Z*2ZWB1REG10VDD_10B@*B@WREG11VCC_18w@*w@WBREG12 VCC18_LCDw@*w@Wi2c@ff660000rockchip,rk3288-i2cf =i2c/Ndefault> disabledpwm@ff680000rockchip,rk3288-pwmhdefault?/^pwmokaypwm@ff680010rockchip,rk3288-pwmhdefault@/^pwm disabledpwm@ff680020rockchip,rk3288-pwmh defaultA/^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultB/^pwm disabledbus_intmem@ff700000 mmio-srampjpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsBpower-controller!rockchip,rk3288-power-controllerJhZ BTpower-domain@9 /chgfdehilkj$CDEFGHIJKpower-domain@11 /opLMpower-domain@12 /Npower-domain@13 /OPreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv0HJjk$#gׄeрxhрxhBsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwB0edp-phyrockchip,rk3288-dp-phy/h24m% disabledBdio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokayusb-phy@320% /]phyclkB7usb-phy@334%4/^phyclkB5usb-phy@348%H/_phyclkB6watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif0 hclkmclk/TQtx 6defaultR0 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s0 5QQtxrxi2s_hclki2s_clk/RdefaultSA\ disabledcrypto@ff8a0000rockchip,rk3288-crypto@ 0 /}aclkhclksclkapb_pclk 4crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu/ aclkifacev disablediommu@ff914000rockchip,iommu @P isp_mmu/ aclkifacev disabledrga@ff920000rockchip,rk3288-rga /jaclkhclksclkT ilm 4coreaxiahbvop@ff930000rockchip,rk3288-vop /aclk_vopdclk_vophclk_vopT def 4axiahbdclkUokayportB endpoint@0VBgendpoint@1WBeendpoint@2XB_endpoint@3YBbiommu@ff930300rockchip,iommu  vopb_mmu/ aclkifaceT vokayBUvop@ff940000rockchip,rk3288-vop /aclk_vopdclk_vophclk_vopT  4axiahbdclkZokayportB endpoint@0[Bhendpoint@1\Bfendpoint@2]B`endpoint@3^Bciommu@ff940300rockchip,iommu  vopl_mmu/ aclkifaceT vokayBZmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ /~d refpclkT 0 disabledportsportendpoint@0_BXendpoint@1`B]lvds@ff96c000rockchip,rk3288-lvds@/g pclk_lvdslcdcaT 0 disabledportsport@0endpoint@0bBYendpoint@1cB^dp@ff970000rockchip,rk3288-dp@ b/icdppclkddpo4dp0 disabledportsport@0endpoint@0eBWendpoint@1fB\hdmi@ff980000rockchip,rk3288-dw-hdmi00 g/hmniahbisfrcecT okayportsportendpoint@0gBVendpoint@1hB[iommu@ff9a0800rockchip,iommu vpu_mmu/ aclkifacev disablediommu@ff9c0440rockchip,iommu @@@ o hevc_mmu/ aclkifacev disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu/iT  disabledgpu-opp-tableoperating-points-v2Biopp-100000000U\~opp-200000000U \~opp-300000000U\B@opp-400000000Uׄ\opp-500000000Ue\Oopp-600000000U#F\qos@ffaa0000syscon BOqos@ffaa0080syscon BPqos@ffad0000syscon BDqos@ffad0100syscon BEqos@ffad0180syscon BFqos@ffad0400syscon BGqos@ffad0480syscon BHqos@ffad0500syscon BCqos@ffad0800syscon BIqos@ffad0880syscon BJqos@ffad0900syscon BKqos@ffae0000syscon BNqos@ffaf0000syscon BLqos@ffaf0080syscon BMinterrupt-controller@ffc01000 arm,gic-400@ @ `   Befuse@ffb40000rockchip,rk3288-efuse /q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl0jgpio0@ff750000rockchip,gpio-banku Q/@B:gpio1@ff780000rockchip,gpio-bankx R/Agpio2@ff790000rockchip,gpio-banky S/Bgpio3@ff7a0000rockchip,gpio-bankz T/Cgpio4@ff7b0000rockchip,gpio-bank{ U/DB2gpio5@ff7c0000rockchip,gpio-bank| V/Egpio6@ff7d0000rockchip,gpio-bank} W/Fgpio7@ff7e0000rockchip,gpio-bank~ X/GBqgpio8@ff7f0000rockchip,gpio-bank Y/Hhdmihdmi-cec-c0jhdmi-cec-c7jhdmi-ddc jjpcfg-pull-upBkpcfg-pull-down Blpcfg-pull-none/Bjpcfg-pull-none-12ma/< Bmsuspendglobal-pwroffjddrio-pwroffjddr0-retentionkddr1-retentionkedpedp-hpd li2c0i2c0-xfer jjB8i2c1i2c1-xfer jjB!i2c2i2c2-xfer  j jB>i2c3i2c3-xfer jjB"i2c4i2c4-xfer jjB#i2c5i2c5-xfer jjB$i2s0i2s0-bus`jjjjjjBSlcdclcdc-ctl@jjjjBasdmmcsdmmc-clkjB sdmmc-cmdkBsdmmc-cdkBsdmmc-bus1ksdmmc-bus4@kkkkBsdio0sdio0-bus1ksdio0-bus4@kkkksdio0-cmdksdio0-clkjsdio0-cdksdio0-wpksdio0-pwrksdio0-bkpwrksdio0-intksdio1sdio1-bus1ksdio1-bus4@kkkksdio1-cdksdio1-wpksdio1-bkpwrksdio1-intksdio1-cmdksdio1-clkjsdio1-pwr kemmcemmc-clkjemmc-cmdkemmc-pwr kemmc-bus1kemmc-bus4@kkkkemmc-bus8kkkkkkkkspi0spi0-clk kBspi0-cs0 kBspi0-txkBspi0-rxkBspi0-cs1kspi1spi1-clk kBspi1-cs0 kBspi1-rxkBspi1-txkBspi2spi2-cs1kspi2-clkkBspi2-cs0kB spi2-rxkBspi2-tx kBuart0uart0-xfer kjB%uart0-ctskuart0-rtsjuart1uart1-xfer k jB&uart1-cts kuart1-rts juart2uart2-xfer kjB'uart3uart3-xfer kjB(uart3-cts kuart3-rts juart4uart4-xfer kjB)uart4-cts kuart4-rts jtsadcotp-gpio jB.otp-out jB/pwm0pwm0-pinjB?pwm1pwm1-pinjB@pwm2pwm2-pinjBApwm3pwm3-pinjBBgmacrgmii-pinsjjjjmmmmjjj mmjjB4rmii-pinsjjjjjjjjjjspdifspdif-tx jBRpcfg-output-highKBopcfg-output-lowWBnact8846pmic-vselnB<pwr-holdoB=buttonspwrbtnkBpirir-intkBrpmicpmic-intkB;usbhost-vbus-drvjBsotg-vbus-drv jBtmemory@0memoryexternal-gmac-clock fixed-clocksY@ ext_gmacB3gpio-keys gpio-keysbdefaultppower m:st~GPIO Key Powerdir-receivergpio-ir-receiver mqdefaultrvcc-host-regulatorregulator-fixed :defaults vcc_hostWkvcc-otg-regulatorregulator-fixed : defaulttvcc_otgWksdmmc-regulatorregulator-fixed sdmmc-supply2Z*2Z q }uBsys-regulatorregulator-fixed sys-supplyLK@*LK@WkB9 #address-cells#size-cellscompatibleinterrupt-parentethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supply#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplysystem-power-controller#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowautorepeatgpioslinux,codelabellinux,input-typewakeup-sourcedebounce-intervalenable-active-highstartup-delay-us