8D( %amarula,vyasa-rk3288rockchip,rk3288&7Amarula Vyasa-RK3288aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5< Hcpu@501cpuarm,cortex-a12'@5Hcpu@502cpuarm,cortex-a12'@5Hcpu@503cpuarm,cortex-a12'@5Hcpu-opp-tableoperating-points-v2PHopp-126000000[b opp-216000000[ b opp-312000000[b opp-408000000[Qb opp-600000000[#Fb opp-696000000[)|b~opp-816000000[0,bB@opp-1008000000[<bopp-1200000000[Gbopp-1416000000[TfrbOopp-1512000000[ZJb opp-1608000000[_"bpamba simple-buspdma-controller@ff250000arm,pl330arm,primecell%@w5 apb_pclkHdma-controller@ff600000arm,pl330arm,primecell`@w5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@w5 apb_pclkHYreserved-memorypdma-unusable@fe000000oscillator fixed-clockn6xin24mH timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5a  pclktimerdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshc!р 5Drvbiuciuciu-driveciu-sample/  @:resetokayFPbsdefault dwmmc@ff0d0000rockchip,rk3288-dw-mshc!р 5Eswbiuciuciu-driveciu-sample/ ! @:reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshc!р 5Ftxbiuciuciu-driveciu-sample/ "@:reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc!р 5Guybiuciuciu-driveciu-sample/ #@:resetokayFPdefaultsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW :saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -default  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .default!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault% disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault& disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault' disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault( disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 75MUbaudclkapb_pclkdefault) disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 85NVbaudclkapb_pclkdefault* disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 95OWbaudclkapb_pclkdefault+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :5PXbaudclkapb_pclkdefault, disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;5QYbaudclkapb_pclkdefault- disabledthermal-zonesreserve_thermal+.cpu_thermald+.tripscpu_alert0;pGpassiveH/cpu_alert1;$GpassiveH0cpu_crit;_G criticalcooling-mapsmap0R/ Wmap1R0 Wgpu_thermald+.tripsgpu_alert0;pGpassiveH1gpu_crit;_G criticalcooling-mapsmap0R1 Wtsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk :tsadc-apbinitdefaultsleep2f3p2zsokayH.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq485fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB :stmmacethokay5inputdefault6789*:5rgmii> T'B@ i;y0usb@ff500000 generic-ehciP 5usbhost<usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghost= usb2-phyokaydefault>usb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg@@ ? usb2-phyokayusb@ff5c0000 generic-ehci\ 5usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5Ldefault@okaypmic@1brockchip,rk808&Axin32krk808-clkout2defaultBCD DD%D1D=DIUDaDnD{regulatorsDCDC_REG1vdd_arm qpH regulator-state-memDCDC_REG2vdd_gpu PHsregulator-state-memB@DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vcc_io2Z2ZHregulator-state-mem2ZLDO_REG1vcc_tp2Z2Zregulator-state-mem2ZLDO_REG2 vcc_codec2Z2Zregulator-state-memLDO_REG3vdd_10B@B@regulator-state-memB@LDO_REG4vcc_gpsw@w@regulator-state-memw@LDO_REG5 vccio_sdw@2ZHregulator-state-mem2ZLDO_REG6 vcc10_lcdB@B@regulator-state-memw@LDO_REG7vcc_18w@w@HXregulator-state-memw@LDO_REG8 vcc18_lcdw@w@regulator-state-memw@SWITCH_REG1vcc_sd2Z2ZHregulator-state-memSWITCH_REG2vcc_lan2Z2ZH:regulator-state-memi2c@ff660000rockchip,rk3288-i2cf =i2c5NdefaultEokayHopwm@ff680000rockchip,rk3288-pwmh:defaultF5^pwm disabledpwm@ff680010rockchip,rk3288-pwmh:defaultG5^pwm disabledpwm@ff680020rockchip,rk3288-pwmh :defaultH5^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0:defaultI5^pwm disabledbus_intmem@ff700000 mmio-srampppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsHpower-controller!rockchip,rk3288-power-controllerEh H\power-domain@9 5chgfdehilkj$YJKLMNOPQRpower-domain@11 5opYSTpower-domain@12 5YUpower-domain@13 5YVWreboot-modesyscon-reboot-mode`gRBsRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv4Hjk$#gׄeрxhрxhHsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwH4edp-phyrockchip,rk3288-dp-phy5h24m disabledHlio-domains"rockchip,rk3288-io-voltage-domainokayXX:&2@Xusbphyrockchip,rk3288-usb-phyokayusb-phy@320 5]phyclkH?usb-phy@33445^phyclkH<usb-phy@348H5_phyclkH=watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifL hclkmclk5TYtx 6defaultZ4 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2sL 5YYtxrxi2s_hclki2s_clk5Rdefault[]x disabledcrypto@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk :crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkiface disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclk\ ilm :coreaxiahbvop@ff930000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop\ def :axiahbdclk]okayportH endpoint@0^Hpendpoint@1_Hmendpoint@2`Hgendpoint@3aHjiommu@ff930300rockchip,iommu  vopb_mmu5 aclkiface\ okayH]vop@ff940000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop\  :axiahbdclkbokayportH endpoint@0cHqendpoint@1dHnendpoint@2eHhendpoint@3fHkiommu@ff940300rockchip,iommu  vopl_mmu5 aclkiface\ okayHbmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclk\ 4 disabledportsportendpoint@0gH`endpoint@1hHelvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdci\ 4 disabledportsport@0endpoint@0jHaendpoint@1kHfdp@ff970000rockchip,rk3288-dp@ b5icdppclkldpo:dp4 disabledportsport@0endpoint@0mH_endpoint@1nHdhdmi@ff980000rockchip,rk3288-dw-hdmiL4 g5hmniahbisfrcec\ okayoportsportendpoint@0pH^endpoint@1qHciommu@ff9a0800rockchip,iommu vpu_mmu5 aclkiface disablediommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5r\ okaysgpu-opp-tableoperating-points-v2Hropp-100000000[b~opp-200000000[ b~opp-300000000[bB@opp-400000000[ׄbopp-500000000[ebOopp-600000000[#Fbqos@ffaa0000syscon HVqos@ffaa0080syscon HWqos@ffad0000syscon HKqos@ffad0100syscon HLqos@ffad0180syscon HMqos@ffad0400syscon HNqos@ffad0480syscon HOqos@ffad0500syscon HJqos@ffad0800syscon HPqos@ffad0880syscon HQqos@ffad0900syscon HRqos@ffae0000syscon HUqos@ffaf0000syscon HSqos@ffaf0080syscon HTinterrupt-controller@ffc01000 arm,gic-400 @ @ `   Hefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl4pgpio0@ff750000rockchip,gpio-banku Q5@- HAgpio1@ff780000rockchip,gpio-bankx R5A- gpio2@ff790000rockchip,gpio-banky S5B- gpio3@ff7a0000rockchip,gpio-bankz T5C- gpio4@ff7b0000rockchip,gpio-bank{ U5D- H;gpio5@ff7c0000rockchip,gpio-bank| V5E- gpio6@ff7d0000rockchip,gpio-bank} W5F- gpio7@ff7e0000rockchip,gpio-bank~ X5G- gpio8@ff7f0000rockchip,gpio-bank Y5H- H|hdmihdmi-cec-c09thdmi-cec-c79thdmi-ddc 9ttpcfg-pull-upGHupcfg-pull-downTHvpcfg-pull-nonecHtpcfg-pull-none-12macp Hwsuspendglobal-pwroff9tHCddrio-pwroff9tddr0-retention9uddr1-retention9uedpedp-hpd9 vi2c0i2c0-xfer 9ttH@i2c1i2c1-xfer 9ttH%i2c2i2c2-xfer 9 t tHEi2c3i2c3-xfer 9ttH&i2c4i2c4-xfer 9ttH'i2c5i2c5-xfer 9ttH(i2s0i2s0-bus`9ttttttH[lcdclcdc-ctl@9ttttHisdmmcsdmmc-clk9tH sdmmc-cmd9uHsdmmc-cd9uHsdmmc-bus19usdmmc-bus4@9uuuuHsdio0sdio0-bus19usdio0-bus4@9uuuusdio0-cmd9usdio0-clk9tsdio0-cd9usdio0-wp9usdio0-pwr9usdio0-bkpwr9usdio0-int9usdio1sdio1-bus19usdio1-bus4@9uuuusdio1-cd9usdio1-wp9usdio1-bkpwr9usdio1-int9usdio1-cmd9usdio1-clk9tsdio1-pwr9 uemmcemmc-clk9tHemmc-cmd9uHemmc-pwr9 uHemmc-bus19uemmc-bus4@9uuuuemmc-bus89uuuuuuuuHspi0spi0-clk9 uHspi0-cs09 uHspi0-tx9uHspi0-rx9uHspi0-cs19uspi1spi1-clk9 uHspi1-cs09 uH spi1-rx9uHspi1-tx9uHspi2spi2-cs19uspi2-clk9uH!spi2-cs09uH$spi2-rx9uH#spi2-tx9 uH"uart0uart0-xfer 9utH)uart0-cts9uuart0-rts9tuart1uart1-xfer 9u tH*uart1-cts9 uuart1-rts9 tuart2uart2-xfer 9utH+uart3uart3-xfer 9utH,uart3-cts9 uuart3-rts9 tuart4uart4-xfer 9utH-uart4-cts9 uuart4-rts9 ttsadcotp-gpio9 tH2otp-out9 tH3pwm0pwm0-pin9tHFpwm1pwm1-pin9tHGpwm2pwm2-pin9tHHpwm3pwm3-pin9tHIgmacrgmii-pins9ttttwwwwttt wwttH6rmii-pins9ttttttttttphy-int9 uH9phy-pmeb9uH8phy-rst9xH7spdifspdif-tx9 tHZpcfg-output-highHxpmicpmic-int9uHBusb_hostphy-pwr-en9 xH>usb2-pwr-en9 tH}usb_otgotg-vbus-drv9 tHzchosen/serial@ff690000memorymemorydc12-vbatregulator-fixed dc12_vbatHyvboot-3v3regulator-fixed vboot_3v32Z2Zyvsys-regulatorregulator-fixedvcc_sys8u 8u yHDvboot-5vregulator-fixed vboot_svLK@LK@yv3g-3v3regulator-fixedv3g_3v32Z2Zyvsus-5vregulator-fixedvsus_5vLK@LK@H{vusb1-5vregulator-fixed vusb1_5v tA defaultzLK@LK@{vusb2-5vregulator-fixed vusb2_5v t| default}LK@LK@{external-gmac-clock fixed-clocksY@ ext_gmacH5 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathvin-supplyenable-active-high