Ð þí„8è(œ° wm,wm8650&Wondermedia WM8650-MID Tabletchosenaliases,/soc/serial@d82000004/soc/serial@d82b0000memory?pinctrl@d8110000wm,wm8650-pinctrlHØdy­pmc@d8130000via,vt8500-pmcHØclocksref25M¹ fixed-clockÆ}x@Šref24M¹ fixed-clockÆn6Šplla¹wm,wm8650-pll-clockÖHŠpllb¹wm,wm8650-pll-clockÖHŠpllc¹wm,wm8650-pll-clockÖHplld¹wm,wm8650-pll-clockÖH Šplle¹wm,wm8650-pll-clockÖHarm¹via,vt8500-device-clockÖÝahb¹via,vt8500-device-clockÖÝapb¹via,vt8500-device-clockÖÝ ddr¹via,vt8500-device-clockÖÝuart0¹via,vt8500-device-clockÖéPôŠ uart1¹via,vt8500-device-clockÖéPôŠ sdhc¹via,vt8500-device-clockÖÝ(ÿ?éTôŠtimer@d8130100via,vt8500-timerHØ(’$ehci@d8007900via,vt8500-ehciHØy’+uhci@d8007b00platform-uhciHØ{’+sdhc@d800a000wm,wm8505-sdhcHØ ’Ö fb@d8050800 wm,wm8505-fbHØ$display-timings3800x480Æ? GàO(\Xhr ~ ‹Šge_rops@d8050400wm,prizm-ge-ropsHØserial@d8200000via,vt8500-uartHØ @’ Ö •okayserial@d82b0000via,vt8500-uartHØ+@’!Ö  •disabledrtc@d8100000via,vt8500-rtcHØ’0ethernet@d8004000via,vt8500-rhineHØ@’  #address-cells#size-cellscompatiblemodelserial0serial1device_typeregrangesinterrupt-parentinterrupt-controller#interrupt-cellsphandleinterruptsgpio-controller#gpio-cells#clock-cellsclock-frequencyclocksdivisor-regenable-regenable-bitdivisor-maskbus-widthsdon-invertedbits-per-pixelnative-modehactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenstatus