HL(zFoundation-v8A$arm,foundation-aarch64arm,vexpress"1chosenaliases/=/bus@8000000/iofpga-bus@300000000/serial@90000/E/bus@8000000/iofpga-bus@300000000/serial@a0000/M/bus@8000000/iofpga-bus@300000000/serial@b0000/U/bus@8000000/iofpga-bus@300000000/serial@c0000cpus"1cpu@0]cpu arm,armv8im ~spin-tablecpu@1]cpu arm,armv8im ~spin-tablecpu@2]cpu arm,armv8im ~spin-tablecpu@3]cpu arm,armv8im ~spin-tablel2-cache0cachememory@80000000]memory itimerarm,armv8-timer0   pmuarm,armv8-pmuv30<=>?watchdog@2a440000arm,sbsa-gwdt i*D*E clk24mhz fixed-clockn6 v2m:clk24mhzrefclk1mhz fixed-clockB@v2m:refclk1mhzrefclk32khz fixed-clockv2m:refclk32khzbus@8000000arm,vexpress,v2m-p1simple-busrs1"1x  ?`*            !!""##$$%%&&''(())**ethernet@202000000smsc,lan91c111 iiofpga-bus@300000000 simple-bus"1 sysreg@10000arm,vexpress-sysregiserial@90000arm,pl011arm,primecelli 8?uartclkapb_pclkserial@a0000arm,pl011arm,primecelli 8?uartclkapb_pclkserial@b0000arm,pl011arm,primecelli 8?uartclkapb_pclkserial@c0000arm,pl011arm,primecelli 8?uartclkapb_pclkvirtio-block@130000 virtio,mmioi*interrupt-controller@2f000000 arm,gic-v3"1/KPi// , , ,   msi-controller@2f020000arm,gic-v3-its`oi modelcompatibleinterrupt-parent#address-cells#size-cellsserial0serial1serial2serial3device_typeregnext-level-cacheenable-methodcpu-release-addrphandleinterruptsclock-frequencytimeout-sec#clock-cellsclock-output-namesarm,v2m-memory-mapranges#interrupt-cellsinterrupt-map-maskinterrupt-mapclocksclock-namesinterrupt-controllermsi-controller#msi-cells