8(hisilicon,hip05-d02 +&7Hisilicon Hip05 D02 Development Boardpsci arm,psci-0.2=smccpus+cpu-mapcluster0core0Dcore1Dcore2Dcore3Dcluster1core0Dcore1Dcore2Dcore3D cluster2core0D core1D core2D core3D cluster3core0Dcore1Dcore2Dcore3Dcpu@20000Hcpuarm,cortex-a57TXpscifwcpu@20001Hcpuarm,cortex-a57TXpscifwcpu@20002Hcpuarm,cortex-a57TXpscifwcpu@20003Hcpuarm,cortex-a57TXpscifwcpu@20100Hcpuarm,cortex-a57TXpscifwcpu@20101Hcpuarm,cortex-a57TXpscifwcpu@20102Hcpuarm,cortex-a57TXpscifwcpu@20103Hcpuarm,cortex-a57TXpscifw cpu@20200Hcpuarm,cortex-a57TXpscifw cpu@20201Hcpuarm,cortex-a57TXpscifw cpu@20202Hcpuarm,cortex-a57TXpscifw cpu@20203Hcpuarm,cortex-a57TXpscifw cpu@20300Hcpuarm,cortex-a57TXpscifwcpu@20301Hcpuarm,cortex-a57TXpscifwcpu@20302Hcpuarm,cortex-a57TXpscifwcpu@20303Hcpuarm,cortex-a57TXpscifwl2-cache0cachewl2-cache1cachewl2-cache2cachewl2-cache3cachewinterrupt-controller@8d000000 arm,gic-v3+PT0  winterrupt-controller@8c000000arm,gic-v3-itsTinterrupt-controller@a3000000arm,gic-v3-itsTinterrupt-controller@b7000000arm,gic-v3-itsTinterrupt-controller@c6000000arm,gic-v3-itsTtimerarm,armv8-timer0   pmuarm,cortex-a57-pmu soc simple-bus+refclk200mhz fixed-clock wuart@80300000snps,dw-apb-uartT0 = !apb_pclk-7Dokayuart@80310000snps,dw-apb-uartT1 > !apb_pclk-7 Ddisabledlocalbus@80380000#hisilicon,hisi-localbussimple-busT8Dokay+(nor-flash@0,0+numonyx,js28f00acfi-flash TKpartition@0VBIOST0partition@300000VLinuxT0partition@1000000VRootfsTcpld@1,0hisilicon,hip05-cpld Tgpio@802e0000+snps,dw-apb-gpioT.Dokaygpio-controller@0snps,dw-apb-gpio-port\lx T 8wgpio@802f0000+snps,dw-apb-gpioT/ Ddisabledgpio-controller@0snps,dw-apb-gpio-port\lx T 9memory@0HmemoryTaliases/soc/uart@80300000chosenserial0:115200n8gpio_keys gpio-keys+pwrbutton VPower Button t compatibleinterrupt-parent#address-cells#size-cellsmodelmethodcpudevice_typeregenable-methodnext-level-cachephandle#interrupt-cellsrangesinterrupt-controller#redistributor-regionsredistributor-strideinterruptsmsi-controller#msi-cells#clock-cellsclock-frequencyclocksclock-namesreg-shiftreg-io-widthstatusbank-widthlabelgpio-controller#gpio-cellssnps,nr-gpiosserial0stdout-pathlinux,codedebounce-interval