/8,(+ ,Huawei Nexus 6P2huawei,anglerqcom,msm8994=I  VZchosendserial0:115200n8clocksxo-board 2fixed-clockp}$ xo_boardsleep-clk 2fixed-clockp} sleep_clkcpus cpu@0cpu2arm,cortex-a53pscil2-cache2cachecpu@1cpu2arm,cortex-a53pscicpu@2cpu2arm,cortex-a53pscicpu@3cpu2arm,cortex-a53pscicpu@100cpu2arm,cortex-a57pscil2-cache2cachecpu@101cpu2arm,cortex-a57psci cpu@102cpu2arm,cortex-a57psci cpu@103cpu2arm,cortex-a57psci cpu-mapcluster0core0core1core2core3cluster1core0core1 core2 core3 firmwarescm2qcom,scm-msm8994qcom,scmmemorymemorypmu2arm,cortex-a53-pmu psci 2arm,psci-0.2hvcreserved-memory smem_region@6a00000  smd 2qcom,smdrpm    &rpm-requests2qcom,rpm-msm8994 6rpm_requestsrpmcc2qcom,rpmcc-msm8994psmem 2qcom,smemH Vgsoc  2simple-businterrupt-controller@f90000002qcom,msm-qgic2o mailbox@f900d000%2qcom,msm8994-apcs-kpss-globalsyscon  timer@f9020000 2arm,armv7-timer-memframe@f9021000  frame@f9023000 0 disabledframe@f9024000 @ disabledframe@f9025000 P disabledframe@f9026000 ` disabledframe@f9027000 p disabledframe@f9028000  disabledsdhci@f98249002qcom,sdhci-msm-v4I@hc_memcore_mem{hc_irqpwr_irqhvcoreifacexodefaultsleep disableddma@f99040002qcom,bam-v1.7.0@ :bam_clk'/HUserial@f991e000%2qcom,msm-uartdm-v1.4qcom,msm-uartdm l coreifaceH:defaultsleepokayi2c@f99230002qcom,i2c-qup-v2.2.10 _:; ifacecore}defaultsleep  disabledspi@f99230002qcom,spi-qup-v2.2.10 _<: coreifaceb$t  ytxrxdefaultsleep   disabledi2c@f99240002qcom,i2c-qup-v2.2.1@ `:= ifacecore}jtytxrxdefaultsleep!"  disabledi2c@f99260002qcom,i2c-qup-v2.2.1` b:A ifacecore}jdefaultsleep#$  disableddma@f99440002qcom,bam-v1.7.0@ Mbam_clk'/HU'i2c@f99280002qcom,i2c-qup-v2.2.1 d:E ifacecore}jtytxrxdefaultsleep%&  disabledserial@f995e000%2qcom,msm-uartdm-v1.4qcom,msm-uartdm  coreiface[Mt''ytxrxdefaultsleep() disabledi2c@f99670002qcom,i2c-qup-v2.2.1p iMV ifacecore}jt''ytxrxdefaultsleep*+  disabledclock-controller@fc4000002qcom,gcc-msm8994p@ memory@fc4280002qcom,rpm-msg-ramB@restart@fc4ab000 2qcom,psholdJspmi@fc4c00002qcom,spmi-pmic-arbLLLcoreintrcnfg periph_irq ' osyscon@fd4840002sysconH@ -pinctrl@fd5100002qcom,msm8994-pinctrlQ@ ,oU,blsp1-uart2-default blsp_uart2 gpio4gpio5 blsp1-uart2-sleepgpio gpio4gpio5blsp2-uart2-default blsp_uart8gpio45gpio46 (blsp2-uart2-sleepgpiogpio45gpio46)i2c1-default blsp_i2c1 gpio2gpio3 i2c1-sleepgpio gpio2gpio3 i2c2-default blsp_i2c2 gpio6gpio7 !i2c2-sleepgpio gpio6gpio7 "i2c4-default blsp_i2c4gpio19gpio20 #i2c4-sleepgpiogpio19gpio20'$i2c5-default blsp_i2c5gpio23gpio24 *i2c5-sleepgpiogpio23gpio24 +i2c6-default blsp_i2c6gpio28gpio27 %i2c6-sleepgpiogpio28gpio27 &blsp1-spi0-defaultdefault blsp_spi1gpio0gpio1gpio3 csgpiogpio8 blsp1-spi0-sleepgpio0gpio1gpio3  clk-on sdc1_clk clk-off sdc1_clk cmd-on sdc1_cmd4cmd-off sdc1_cmd4data-on sdc1_data4data-off sdc1_data4rclk-on sdc1_rclkrclk-off sdc1_rclkhwlock2qcom,tcsr-mutex A-Htimer2arm,armv8-timer0vreg-vph-pwr2regulator-fixedVvph-pwre6}6aliases/soc/serial@f991e000 interrupt-parent#address-cells#size-cellsmodelcompatibleqcom,msm-idqcom,pmic-idqcom,board-idstdout-path#clock-cellsclock-frequencyclock-output-namesphandledevice_typeregenable-methodnext-level-cachecache-levelcpuinterruptsrangesno-mapqcom,ipcqcom,smd-edgeqcom,local-pidqcom,remote-pidqcom,smd-channelsmemory-regionqcom,rpm-msg-ramhwlocksinterrupt-controller#interrupt-cells#mbox-cellsframe-numberstatusreg-namesinterrupt-namesclocksclock-namespinctrl-namespinctrl-0pinctrl-1bus-widthnon-removable#dma-cellsqcom,eeqcom,controlled-remotelynum-channelsqcom,num-eesspi-max-frequencydmasdma-names#reset-cells#power-domain-cellsqcom,channelgpio-controllergpio-ranges#gpio-cellsgpio-reserved-rangesfunctionpinsdrive-strengthbias-disablebias-pull-downinput-enablebias-pull-upsyscon#hwlock-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onserial0