MU8?( ?\ ',Qualcomm Technologies, Inc. SDM845 MTP2qcom,sdm845-mtpqcom,sdm845aliases!=/soc@0/geniqup@8c0000/i2c@880000!B/soc@0/geniqup@8c0000/i2c@884000!G/soc@0/geniqup@8c0000/i2c@888000!L/soc@0/geniqup@8c0000/i2c@88c000!Q/soc@0/geniqup@8c0000/i2c@890000!V/soc@0/geniqup@8c0000/i2c@894000![/soc@0/geniqup@8c0000/i2c@898000!`/soc@0/geniqup@8c0000/i2c@89c000!e/soc@0/geniqup@ac0000/i2c@a80000!j/soc@0/geniqup@ac0000/i2c@a84000!o/soc@0/geniqup@ac0000/i2c@a88000!u/soc@0/geniqup@ac0000/i2c@a8c000!{/soc@0/geniqup@ac0000/i2c@a90000!/soc@0/geniqup@ac0000/i2c@a94000!/soc@0/geniqup@ac0000/i2c@a98000!/soc@0/geniqup@ac0000/i2c@a9c000!/soc@0/geniqup@8c0000/spi@880000!/soc@0/geniqup@8c0000/spi@884000!/soc@0/geniqup@8c0000/spi@888000!/soc@0/geniqup@8c0000/spi@88c000!/soc@0/geniqup@8c0000/spi@890000!/soc@0/geniqup@8c0000/spi@894000!/soc@0/geniqup@8c0000/spi@898000!/soc@0/geniqup@8c0000/spi@89c000!/soc@0/geniqup@ac0000/spi@a80000!/soc@0/geniqup@ac0000/spi@a84000!/soc@0/geniqup@ac0000/spi@a88000!/soc@0/geniqup@ac0000/spi@a8c000!/soc@0/geniqup@ac0000/spi@a90000!/soc@0/geniqup@ac0000/spi@a94000!/soc@0/geniqup@ac0000/spi@a98000!/soc@0/geniqup@ac0000/spi@a9c000$/soc@0/geniqup@ac0000/serial@a84000chosenserial0:115200n8memory@80000000memory reserved-memory  memory@85700000 p`memory@85e00000 memory@85fc0000 memory@85fe0000 2qcom,cmd-db memory@86000000 (memory@86200000 memory@88f000002qcom,rmtfs-mem #2memory@8ab00000 @memory@8bf00000 Pmemory@8c400000 @memory@8c410000 APmemory@8c415000 AP memory@8c500000 P memory@8df00000 memory@8e000000 wmemory@95800000 Pmemory@95d00000 %memory@96500000 P vmemory@96700000 p@memory@97b00000 cpus cpu@0cpu 2qcom,kryo385 opp-403200000`Xg 5I>opp-480000000`8g 5bpopp-576000000`"Ug 5bpopp-652800000`&g 5u0opp-748800000`,gopp-825600000`15gopp-902400000`5Ɉg`opp-979200000`:]hgopp-1056000000`>Hgopp-1132800000`C(g!b@opp-1228800000`I>g!bopp-1324800000`Ng!b opp-1420800000`Tg.opp-1516800000`Zhg.'Popp-1612800000``!`g>'Popp-1689600000`d@g>>opp-1766400000`iI g>V0cpu4_opp_table2operating-points-v2Uopp-300000000`g 5I>opp-403200000`Xg 5I>opp-480000000`8gI>opp-576000000`"UgI>opp-652800000`&gI>opp-748800000`,gI>opp-825600000`15g!bopp-902400000`5Ɉg!bopp-979200000`:]hg!bopp-1056000000`>Hg.opp-1132800000`C(g.opp-1209600000`Hg>opp-1286400000`Lg>opp-1363200000`Q@g>opp-1459200000`Vg>opp-1536000000`[gRopp-1612800000``!`gRopp-1689600000`d@gR'Popp-1766400000`iI g^'Popp-1843200000`mg^'Popp-1920000000`rpgn'Popp-1996800000`wgn>opp-2092800000`|gn>opp-2169600000`Qxgn>opp-2246400000`Xgn>opp-2323200000`y8gn>opp-2400000000` gnV0opp-2476800000`gnV0opp-2553600000`4gnV0opp-2649600000`gnV0opp-2745600000`gnopp-2803200000`pgnpmu2arm,armv8-pmuv3 utimer2arm,armv8-timer0uclocksxo-board 2fixed-clockI xo_boardsleep-clk 2fixed-clockfirmwarescm2qcom,scm-sdm845qcom,scmremoteproc-adsp2qcom,sdm845-adsp-pas@#wdogfatalreadyhandoverstop-ackxo !stopokay#qcom/sdm845/adsp.mdtglink-edge u1lpass7G"apr 2qcom,apr-v2Napr_audio_svcb rapr-service@3  2qcom,q6coreavs/audiomsm/adsp/audio_pdapr-service@4 2qcom,q6afe avs/audiomsm/adsp/audio_pddais2qcom,q6afe-dais apr-service@7 2qcom,q6asm avs/audiomsm/adsp/audio_pddais2qcom,q6asm-dais  #!apr-service@8 2qcom,q6adm avs/audiomsm/adsp/audio_pdrouting2qcom,q6adm-routingfastrpc 2qcom,fastrpcNfastrpcglink-apps-dsp1adsp compute-cb@32qcom,fastrpc-compute-cb  ##compute-cb@42qcom,fastrpc-compute-cb  #$remoteproc-cdsp2qcom,sdm845-cdsp-pas@B$$$$#wdogfatalreadyhandoverstop-ackxo%&stopokay#qcom/sdm845/cdsp.mdtglink-edge u>1turing7G"fastrpc 2qcom,fastrpcNfastrpcglink-apps-dsp1cdsp compute-cb@12qcom,fastrpc-compute-cb  #0compute-cb@22qcom,fastrpc-compute-cb  #0compute-cb@32qcom,fastrpc-compute-cb  #0compute-cb@42qcom,fastrpc-compute-cb  #0compute-cb@52qcom,fastrpc-compute-cb  #0compute-cb@62qcom,fastrpc-compute-cb  #0compute-cb@72qcom,fastrpc-compute-cb  #0compute-cb@82qcom,fastrpc-compute-cb  #0hwlock2qcom,tcsr-mutex ')smem 2qcom,smem()smp2p-cdsp 2qcom,smp2p^ u@G"7master-kernelmaster-kernel&slave-kernel slave-kernel  $smp2p-lpass 2qcom,smp2p uG" 7master-kernelmaster-kernel!slave-kernel slave-kernel  smp2p-mpss 2qcom,smp2p uG"7master-kernelmaster-kernelrslave-kernel slave-kernel  qipa-ap-to-modemipanipa-modem-to-apipa  jsmp2p-slpi 2qcom,smp2p uG"7master-kernelmaster-kernelslave-kernel slave-kernel  psci 2arm,psci-1.0Csmcsoc@0  1 2simple-busclock-controller@1000002qcom,gcc-sdm845 <I]*qfprom@784000 2qcom,qfprom x@ hstx-trim-primary@1eb nhstx-trim-secondary@1eb nrng@793000 2qcom,prng-ee y0*@corequp-opp-table2operating-points-v21opp-50000000`s+opp-75000000`xhs,opp-100000000`s-opp-128000000` s.geniqup@8c00002qcom,geni-se-qup ` m-ahbs-ahb*d*e   disabledi2c@8800002qcom,geni-i2c @se*Ddefault/ uY 01 disabledspi@8800002qcom,geni-spi @se*Ddefault2 uY  disabledserial@8800002qcom,geni-uart @se*Ddefault3 uY01 disabledi2c@8840002qcom,geni-i2c @@se*Fdefault4 uZ 01 disabledspi@8840002qcom,geni-spi @@se*Fdefault5 uZ  disabledserial@8840002qcom,geni-uart @@se*Fdefault6 uZ01 disabledi2c@8880002qcom,geni-i2c @se*Hdefault7 u[ 01 disabledspi@8880002qcom,geni-spi @se*Hdefault8 u[  disabledserial@8880002qcom,geni-uart @se*Hdefault9 u[01 disabledi2c@88c0002qcom,geni-i2c @se*Jdefault: u\ 01 disabledspi@88c0002qcom,geni-spi @se*Jdefault; u\  disabledserial@88c0002qcom,geni-uart @se*Jdefault< u\01 disabledi2c@8900002qcom,geni-i2c @se*Ldefault= u] 01 disabledspi@8900002qcom,geni-spi @se*Ldefault> u]  disabledserial@8900002qcom,geni-uart @se*Ldefault? u]01 disabledi2c@8940002qcom,geni-i2c @@se*Ndefault@ u^ 01 disabledspi@8940002qcom,geni-spi @@se*NdefaultA u^  disabledserial@8940002qcom,geni-uart @@se*NdefaultB u^01 disabledi2c@8980002qcom,geni-i2c @se*PdefaultC u_ 01 disabledspi@8980002qcom,geni-spi @se*PdefaultD u_  disabledserial@8980002qcom,geni-uart @se*PdefaultE u_01 disabledi2c@89c0002qcom,geni-i2c @se*RdefaultF u` 01 disabledspi@89c0002qcom,geni-spi @se*RdefaultG u`  disabledserial@89c0002qcom,geni-uart @se*RdefaultH u`01 disabledgeniqup@ac00002qcom,geni-se-qup ` m-ahbs-ahb*f*g  okayi2c@a800002qcom,geni-i2c @se*TdefaultI ua 01 disabledspi@a800002qcom,geni-spi @se*TdefaultJ ua  disabledserial@a800002qcom,geni-uart @se*TdefaultK ua01 disabledi2c@a840002qcom,geni-i2c @@se*VdefaultL ub 01 disabledspi@a840002qcom,geni-spi @@se*VdefaultM ub  disabledserial@a840002qcom,geni-debug-uart @@se*VdefaultN ub01okayi2c@a880002qcom,geni-i2c @se*XdefaultO uc 01okayspi@a880002qcom,geni-spi @se*XdefaultP uc  disabledserial@a880002qcom,geni-uart @se*XdefaultQ uc01 disabledi2c@a8c0002qcom,geni-i2c @se*ZdefaultR ud 01 disabledspi@a8c0002qcom,geni-spi @se*ZdefaultS ud  disabledserial@a8c0002qcom,geni-uart @se*ZdefaultT ud01 disabledi2c@a900002qcom,geni-i2c @se*\defaultU ue 01 disabledspi@a900002qcom,geni-spi @se*\defaultV ue  disabledserial@a900002qcom,geni-uart @se*\defaultW ue01 disabledi2c@a940002qcom,geni-i2c @@se*^defaultX uf 01 disabledspi@a940002qcom,geni-spi @@se*^defaultY uf  disabledserial@a940002qcom,geni-uart @@se*^defaultZ uf01 disabledi2c@a980002qcom,geni-i2c @se*`default[ ug 01 disabledspi@a980002qcom,geni-spi @se*`default\ ug  disabledserial@a980002qcom,geni-uart @se*`default] ug01 disabledi2c@a9c0002qcom,geni-i2c @se*bdefault^ uh 01 disabledspi@a9c0002qcom,geni-spi @se*bdefault_ uh  disabledserial@a9c0002qcom,geni-uart @se*bdefault` uh01 disabledsystem-cache-controller@11000002qcom,sdm845-llcc   0llcc_basellcc_broadcast_base uFpci@1c000002qcom,pcie-sdm845snps,dw-pcie@  `` `parfdbielbiconfigpci 8 ` ` `0`0 umsi 8*.*)*+*-*/*0*0pipeauxcfgbus_masterbus_slaveslave_q2atbu ########## # # # # ###*pci*apciephy disabledphy@1c060002qcom,sdm845-qmp-pcie-phy `   *9*+*,*:auxcfg_ahbrefrefgen*phy#*:3 disabledlanes@1c06200@ b(dhfp*.pipe0Hpcie_0_pipe_clkapci@1c080002qcom,pcie-sdm845snps,dw-pcie@  @@ @parfdbielbiconfigpci 8 @ @ @0@0 u3msi @*6*1*3*5*7*8*4*4pipeauxcfgbus_masterbus_slaveslave_q2areftbu#*13$ ########## #  #  #  #  # ##*pci*bpciephy disabledphy@1c0a0002qcom,sdm845-qhp-pcie-phy    *9*3*4*:auxcfg_ahbrefrefgen*phy#*:3 disabledlanes@1c062000 *6pipe0Hpcie_1_pipe_clkbinterconnect@13800002qcom,sdm845-mem-noc 8rSgcinterconnect@14e00002qcom,sdm845-dc-noc NSgcinterconnect@15000002qcom,sdm845-config-noc PPSgcminterconnect@16200002qcom,sdm845-system-noc bSgclinterconnect@16e00002qcom,sdm845-aggre1-noc nPSgcinterconnect@17000002qcom,sdm845-aggre2-noc pSgckinterconnect@17400002qcom,sdm845-mmss-noc tSgcufshc@1d84000+2qcom,sdm845-ufshcqcom,ufshcjedec,ufs-2.0  @%stdice u dufsphyw*<*rst #{core_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clkice_core_clkH********H <4`рokay ef 'gphy@1d870002qcom,sdm845-qmp-ufs-phy p   refref_aux**gufsphyokayhilanes@1d87400P tv|xzHdipa@1e400002qcom,sdm845-ipa# #"0 pp @ipa-regipa-sharedgsi87jj(ipagsiipa-clock-queryipa-setup-ready coreHkkl mmemoryimemconfignn*ipa-clock-enabled-validipa-clock-enabledo disabledsyscon@1f400002syscon 'pinctrl@34000002qcom,sdm845-pinctrl @ u  !e-p;Qecci0-defaultPgpio17gpio18Ucci_i2c^kcci0-sleepPgpio17gpio18Ucci_i2ckzcci1-defaultPgpio19gpio20Ucci_i2c^kcci1-sleepPgpio19gpio20Ucci_i2ckzqspi-clkpinmuxPgpio95 Uqspi_clkqspi-cs0pinmuxPgpio90Uqspi_csqspi-cs1pinmuxPgpio89Uqspi_csqspi-data01pinmux-dataPgpio91gpio92 Uqspi_dataqspi-data12pinmux-dataPgpio93gpio94 Uqspi_dataqup-i2c0-default/pinmux Pgpio0gpio1Uqup0qup-i2c1-default4pinmuxPgpio17gpio18Uqup1qup-i2c2-default7pinmuxPgpio27gpio28Uqup2qup-i2c3-default:pinmuxPgpio41gpio42Uqup3qup-i2c4-default=pinmuxPgpio89gpio90Uqup4qup-i2c5-default@pinmuxPgpio85gpio86Uqup5qup-i2c6-defaultCpinmuxPgpio45gpio46Uqup6qup-i2c7-defaultFpinmuxPgpio93gpio94Uqup7qup-i2c8-defaultIpinmuxPgpio65gpio66Uqup8qup-i2c9-defaultLpinmux Pgpio6gpio7Uqup9qup-i2c10-defaultOpinmuxPgpio55gpio56Uqup10pinconfPgpio55gpio56kqup-i2c11-defaultRpinmuxPgpio31gpio32Uqup11qup-i2c12-defaultUpinmuxPgpio49gpio50Uqup12qup-i2c13-defaultXpinmuxPgpio105gpio106Uqup13qup-i2c14-default[pinmuxPgpio33gpio34Uqup14qup-i2c15-default^pinmuxPgpio81gpio82Uqup15qup-spi0-default2pinmuxPgpio0gpio1gpio2gpio3Uqup0qup-spi1-default5pinmuxPgpio17gpio18gpio19gpio20Uqup1qup-spi2-default8pinmuxPgpio27gpio28gpio29gpio30Uqup2qup-spi3-default;pinmuxPgpio41gpio42gpio43gpio44Uqup3qup-spi4-default>pinmuxPgpio89gpio90gpio91gpio92Uqup4qup-spi5-defaultApinmuxPgpio85gpio86gpio87gpio88Uqup5qup-spi6-defaultDpinmuxPgpio45gpio46gpio47gpio48Uqup6qup-spi7-defaultGpinmuxPgpio93gpio94gpio95gpio96Uqup7qup-spi8-defaultJpinmuxPgpio65gpio66gpio67gpio68Uqup8qup-spi9-defaultMpinmuxPgpio6gpio7gpio4gpio5Uqup9qup-spi10-defaultPpinmuxPgpio55gpio56gpio53gpio54Uqup10qup-spi11-defaultSpinmuxPgpio31gpio32gpio33gpio34Uqup11qup-spi12-defaultVpinmuxPgpio49gpio50gpio51gpio52Uqup12qup-spi13-defaultYpinmux Pgpio105gpio106gpio107gpio108Uqup13qup-spi14-default\pinmuxPgpio33gpio34gpio31gpio32Uqup14qup-spi15-default_pinmuxPgpio81gpio82gpio83gpio84Uqup15qup-uart0-default3pinmux Pgpio2gpio3Uqup0qup-uart1-default6pinmuxPgpio19gpio20Uqup1qup-uart2-default9pinmuxPgpio29gpio30Uqup2qup-uart3-default<pinmuxPgpio43gpio44Uqup3qup-uart4-default?pinmuxPgpio91gpio92Uqup4qup-uart5-defaultBpinmuxPgpio87gpio88Uqup5qup-uart6-defaultEpinmuxPgpio47gpio48Uqup6qup-uart7-defaultHpinmuxPgpio95gpio96Uqup7qup-uart8-defaultKpinmuxPgpio67gpio68Uqup8qup-uart9-defaultNpinmux Pgpio4gpio5Uqup9pinconf-txPgpio4kpinconf-rxPgpio5k^qup-uart10-defaultQpinmuxPgpio53gpio54Uqup10qup-uart11-defaultTpinmuxPgpio33gpio34Uqup11qup-uart12-defaultWpinmuxPgpio51gpio52Uqup12qup-uart13-defaultZpinmuxPgpio107gpio108Uqup13qup-uart14-default]pinmuxPgpio31gpio32Uqup14qup-uart15-default`pinmuxPgpio83gpio84Uqup15quat_mi2s_sleepmuxPgpio58gpio59UgpioconfigPgpio58gpio59kzquat_mi2s_activemuxPgpio58gpio59 Uqua_mi2sconfigPgpio58gpio59kquat_mi2s_sd0_sleepmuxPgpio60UgpioconfigPgpio60kzquat_mi2s_sd0_activemuxPgpio60 Uqua_mi2sconfigPgpio60kquat_mi2s_sd1_sleepmuxPgpio61UgpioconfigPgpio61kzquat_mi2s_sd1_activemuxPgpio61 Uqua_mi2sconfigPgpio61kquat_mi2s_sd2_sleepmuxPgpio62UgpioconfigPgpio62kzquat_mi2s_sd2_activemuxPgpio62 Uqua_mi2sconfigPgpio62kquat_mi2s_sd3_sleepmuxPgpio63UgpioconfigPgpio63kzquat_mi2s_sd3_activemuxPgpio63 Uqua_mi2sconfigPgpio63ksdc2-clkpinconf Psdc2_clkksdc2-cmdpinconf Psdc2_cmd^ksdc2-datapinconf Psdc2_data^ksd-card-det-npinmuxPgpio126UgpiopinconfPgpio126^remoteproc@40800002qcom,sdm845-mss-pil  H qdsp6rmbL qqqqq0wdogfatalreadyhandoverstop-ackshutdown-ack@*$*'**%*(*&*@2ifacebusmemgpll0_msssnoc_aximnoc_axiprngxorstopst mss_restartpdc_reset'0P@ u000load_statecxmxmssokay*#qcom/sdm845/mba.mbnqcom/sdm845/modem.mbnombavmpsswglink-edge u1modem7G" clock-controller@50900002qcom,sdm845-gpucc  <I** 8bi_tcxogcc_gpu_gpll0_clk_srcgcc_gpu_gpll0_div_clk_srcstm@6002000 2arm,coresight-stmarm,primecell   (stm-basestm-stimulus-baseu apb_pclkout-portsportendpointxzfunnel@6041000+2arm,coresight-dynamic-funnelarm,primecell u apb_pclkout-portsportendpointy~in-ports port@7 endpointzxfunnel@6043000+2arm,coresight-dynamic-funnelarm,primecell 0u apb_pclkout-portsportendpoint{in-ports port@5 endpoint|funnel@6045000+2arm,coresight-dynamic-funnelarm,primecell Pu apb_pclkout-portsportendpoint}in-ports port@0 endpoint~yport@2 endpoint{replicator@6046000/2arm,coresight-dynamic-replicatorarm,primecell `u apb_pclkout-portsportendpointin-portsportendpointetf@6047000 2arm,coresight-tmcarm,primecell pu apb_pclkout-portsportendpointin-ports port@1 endpoint}etr@6048000 2arm,coresight-tmcarm,primecell u apb_pclkin-portsportendpointetm@7040000"2arm,coresight-etm4xarm,primecell u apb_pclkout-portsportendpointetm@7140000"2arm,coresight-etm4xarm,primecell u apb_pclkout-portsportendpointetm@7240000"2arm,coresight-etm4xarm,primecell $u apb_pclkout-portsportendpointetm@7340000"2arm,coresight-etm4xarm,primecell 4u apb_pclkout-portsportendpointetm@7440000"2arm,coresight-etm4xarm,primecell Du apb_pclkout-portsportendpointetm@7540000"2arm,coresight-etm4xarm,primecell Tu apb_pclkout-portsportendpointetm@7640000"2arm,coresight-etm4xarm,primecell du apb_pclkout-portsportendpointetm@7740000"2arm,coresight-etm4xarm,primecell tu apb_pclkout-portsportendpointfunnel@7800000+2arm,coresight-dynamic-funnelarm,primecell u apb_pclkout-portsportendpointin-ports port@0 endpointport@1 endpointport@2 endpointport@3 endpointport@4 endpointport@5 endpointport@6 endpointport@7 endpointfunnel@7810000+2arm,coresight-dynamic-funnelarm,primecell u apb_pclkout-portsportendpoint|in-portsportendpointsdhci@8804000$2qcom,sdm845-sdhciqcom,sdhci-msm-v5 @uhc_irqpwr_irq*h*i ifacecore #0okaydefault% 2e~sdhc2-opp-table2operating-points-v2opp-9600000`|s+opp-19200000`$s,opp-100000000`s-opp-201500000` `sqspi-opp-table2operating-points-v2opp-19200000`$s+opp-100000000`s,opp-150000000`рs-opp-300000000`s.spi@88df0002qcom,sdm845-qspiqcom,qspi-v1   uR** ifacecore0 disabledslim@171c00002qcom,slim-ngd-v2.1.0  u;xNpokay Y^rxtxtx2rx2 # ngd@1  ifd@0 2slim217,250 codec@1 2slim217,250 h e6  |mclkuw@w@w@w@ gpio-controller@422qcom,wcd9340-gpio Bswm@c852qcom,soundwire-v1.3.0 @??     iface soundphy@88e2000(2qcom,sdm845-qusb2-phyqcom,qusb2-v2-phy  okayH* cfg_ahbref*3?hJ_yphy@88e3000(2qcom,sdm845-qusb2-phyqcom,qusb2-v2-phy 0okayH* cfg_ahbref* 3?hJ_yphy@88e90002qcom,sdm845-qmp-usb3-phy  reg-basedp_comokay   ****auxcfg_ahbrefcom_aux** phycommonihlanes@88e9200` ((H*pipe0usb3_phy_pipe_clk_srcphy@88eb0002qcom,sdm845-qmp-usb3-uni-phy okay   ****auxcfg_ahbrefcom_aux** phycommonihlane@88eb200@ (pH*pipe0usb3_uni_phy_pipe_clk_srcusb@a6f88002qcom,sdm845-dwc3qcom,dwc3 ookay  1(* ****#cfg_noccoreifacemock_utmisleep#**3$р0u2hs_phy_irqss_phy_irqdm_hs_phy_irqdp_hs_phy_irq**0km)usb-ddrapps-usbdwc3@a600000 2snps,dwc3 ` u #@usb2-phyusb3-phy peripheralusb@a8f88002qcom,sdm845-dwc3qcom,dwc3 okay  1(* ****#cfg_noccoreifacemock_utmisleep#**3$р0u2hs_phy_irqss_phy_irqdm_hs_phy_irqdp_hs_phy_irq**0km*usb-ddrapps-usbdwc3@a800000 2snps,dwc3  u #`usb2-phyusb3-phy peripheralvideo-codec@aa000002qcom,sdm845-venus-v2  u 0venusvcodec0vcodec1cx8  Acoreifacebusvcodec0_corevcodec0_busvcodec1_corevcodec1_bus##video-core02venus-decodervideo-core12venus-encodervenus-opp-table2operating-points-v2opp-100000000`s+opp-200000000` s,opp-320000000`s-opp-380000000`Wsopp-444000000`vs.opp-533000097`sclock-controller@ab000002qcom,sdm845-videocc bi_tcxoI<cci@ac4a0002qcom,sdm845-cci  Ġ@ u0SR 5camnoc_axisoc_ahbslow_ahb_srccpas_ahbccicci_src#3Ĵ<4`defaultsleep disabledi2c-bus@0 B@ i2c-bus@1 B@ clock-controller@ad000002qcom,sdm845-camcc <Idsi-opp-table2operating-points-v2opp-19200000`$s+opp-180000000` s,opp-275000000`d*s-opp-328580000`sopp-358000000`Vs.mdss@ae000002qcom,sdm845-mdss mdss** ifacebuscore# 3 uS  0mdp0-memmdp1-mem## okay  mdp@ae010002qcom,sdm845-dpu    mdpvbif  ifacebuscorevsync# 3$0uokayports port@0 endpointport@1 endpointmdp-opp-table2operating-points-v2opp-19200000`$s+opp-171428571` 7s,opp-344000000`sopp-430000000`Gs.dsi@ae940002qcom,mdss-dsi-ctrl @ dsi_ctrlu0$bytebyte_intfpixelcoreifacebus0dsiokayi   ports port@0 endpointport@1 endpoint .panel@02truly,nt35597-2K-display  e 9e4ports port@0 endpointport@1 endpointdsi-phy@ae944002qcom,dsi-phy-10nm0 D F Jdsi_phydsi_phy_lanedsi_pllH ifacerefokay Dhdsi@ae960002qcom,mdss-dsi-ctrl ` dsi_ctrlu0 $bytebyte_intfpixelcoreifacebus0dsiokayi ports port@0 endpointport@1 endpoint .dsi-phy@ae964002qcom,dsi-phy-10nm0 d f jdsi_phydsi_phy_lanedsi_pllH ifacerefokay Dhgpu@50000002qcom,adreno-630.2qcom,adreno P   kgsl_3d0_reg_memorycx_mem u, agfx-memopp-table2operating-points-v2opp-710000000`*Q jgnopp-675000000`(; jgnopp-596000000`#= j@g^opp-520000000` jg^opp-414000000`# jg>opp-342000000`b jg)opp-257000000`Q@ j@g%zap-shader#qcom/sdm845/a630_zap.mbniommu@5040000!2qcom,sdm845-smmu-v2qcom,smmu-v2  t xulmnopqrs*!* busifacegmu@506a000&2qcom,adreno-gmu-630.2qcom,adreno-gmu0  ( Hgmugmu_pdcgmu_pdc_sequ01hfigmu **!gmucxoaximemnoccxgxopp-table2operating-points-v2opp-400000000`ׄ jopp-200000000`  j0clock-controller@af000002qcom,sdm845-dispcc @**bi_tcxogcc_disp_gpll0_clk_srcgcc_disp_gpll0_div_clk_srcdsi0_phy_pll_out_byteclkdsi0_phy_pll_out_dsiclkdsi1_phy_pll_out_byteclkdsi1_phy_pll_out_dsiclkdp_link_clk_divsel_tendp_vco_divided_clk_src_mux<Iinterrupt-controller@b2200002qcom,sdm845-pdcqcom,pdc "$ ^^asv  preset-controller@b2e00002qcom,sdm845-pdc-global .<tthermal-sensor@c263000 2qcom,sdm845-tsensqcom,tsens-v2  &0 "  uuplowcritical thermal-sensor@c265000 2qcom,sdm845-tsensqcom,tsens-v2  &P "0 uuplowcritical reset-controller@c2a00002qcom,sdm845-aoss-cc *<sqmp@c3000002qcom,sdm845-aoss-qmp 0 uG"Iucxebispmi@c4400002qcom,spmi-pmic-arbP D ``p @`corechnlsobsrvrintrcnfg periph_irq u      imem@146bf000 2simple-mfd k  kpil-reloc@94c2qcom,pil-reloc-info Liommu@15000000!2qcom,sdm845-smmu-500arm,mmu-500  t  uA`abcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVW#clock-controller@170140002qcom,sdm845-lpasscc  @0 ccqdsp6ss disabledinterconnect@179000002qcom,sdm845-gladiator-noc ЀSgcwatchdog@17980000#2qcom,apss-wdt-sdm845qcom,kpss-wdt mailbox@179900002qcom,sdm845-apss-shared  "rsc@179c0000 1apps_rsc2qcom,rpmh-rsc0 drv-0drv-1drv-2$u   bcm-voter2qcom,bcm-votercclock-controller2qcom,sdm845-rpmh-clkxopower-controller2qcom,sdm845-rpmhpdI0opp-table2operating-points-v2opp1 jopp2 j0+opp3 j@,opp4 j-opp5 jopp6 j.opp7 j@opp8 jPopp9 jopp10 jpm8998-rpmh-regulators2qcom,pm8998-rpmh-regulators a - ; I W e s            1 ? Y g ~     smps2  smps3 @ @smps5    smps7  ldo1 m  m hldo2 O O  7ldo3 B@ B@ ldo5 5  5 ldo6 R R ldo7 w@ w@ ldo8 O   ldo9 @ , ldo10 @ , ldo11 B@  ldo12 w@ w@ ldo13 w@ -* ldo14 w@ w@ ldo15 w@ w@ ldo16 )B )B ldo17   ldo18 )B -* ldo19 +@ /] ldo20 )B -* fldo21 )B -* ldo22 + 2 ldo23 - 2 ldo24 / / ldo25 2Z 2 ldo26 O O ildo28 +@ - lvs1 w@ w@lvs2 w@ w@pmi8998-rpmh-regulators2qcom,pmi8998-rpmh-regulators b Kbob 2 6  Zpm8005-rpmh-regulators2qcom,pm8005-rpmh-regulators c - ; I Wsmps3 '  'interrupt-controller@17a00000 2arm,gic-v3       u msi-controller@17a400002arm,gic-v3-its q   disableddma@171840002qcom,bam-v1.7.0  @  u    #timer@17c90000  2arm,armv7-timer-mem frame@17ca0000 u  frame@17cc0000  u  disabledframe@17cd0000  u   disabledframe@17ce0000  u   disabledframe@17cf0000  u   disabledframe@17d00000  u   disabledframe@17d10000  u   disabledinterconnect@17d410002qcom,sdm845-osm-l3 * xoalternateS cpufreq@17d430002qcom,cpufreq-hw  0Xfreq-domain0freq-domain1* xoalternate wifi@188000002qcom,wcn3990-wifiokay membasecxo_ref_clk_pinu #@    #thermal-zonescpu0-thermal 6 L Ztripstrip-point0 j_ vpassivetrip-point1 js vpassivecpu_crit j v criticalcooling-mapsmap0 0 map1 0 cpu1-thermal 6 L Ztripstrip-point0 j_ vpassivetrip-point1 js vpassivecpu_crit j v criticalcooling-mapsmap0 0 map1 0 cpu2-thermal 6 L Ztripstrip-point0 j_ vpassivetrip-point1 js vpassivecpu_crit j v criticalcooling-mapsmap0 0 map1 0 cpu3-thermal 6 L Ztripstrip-point0 j_ vpassivetrip-point1 js vpassivecpu_crit j v criticalcooling-mapsmap0 0 map1 0 cpu4-thermal 6 L Ztripstrip-point0 j_ vpassivetrip-point1 js vpassivecpu_crit j v criticalcooling-mapsmap0 0 map1 0 cpu5-thermal 6 L Ztripstrip-point0 j_ vpassivetrip-point1 js vpassivecpu_crit j v criticalcooling-mapsmap0 0 map1 0 cpu6-thermal 6 L Z tripstrip-point0 j_ vpassivetrip-point1 js vpassivecpu_crit j v criticalcooling-mapsmap0 0 map1 0 cpu7-thermal 6 L Z tripstrip-point0 j_ vpassivetrip-point1 js vpassivecpu_crit j v criticalcooling-mapsmap0 0 map1 0 aoss0-thermal 6 L Ztripstrip-point0 j_ vhotcluster0-thermal 6 L Ztripstrip-point0 j_ vhotcluster0_crit j v criticalcluster1-thermal 6 L Ztripstrip-point0 j_ vhotcluster1_crit j v criticalgpu-thermal-top 6 L Z tripstrip-point0 j_ vhotgpu-thermal-bottom 6 L Z tripstrip-point0 j_ vhotaoss1-thermal 6 L Ztripstrip-point0 j_ vhotq6-modem-thermal 6 L Ztripstrip-point0 j_ vhotmem-thermal 6 L Ztripstrip-point0 j_ vhotwlan-thermal 6 L Ztripstrip-point0 j_ vhotq6-hvx-thermal 6 L Ztripstrip-point0 j_ vhotcamera-thermal 6 L Ztripstrip-point0 j_ vhotvideo-thermal 6 L Ztripstrip-point0 j_ vhotmodem-thermal 6 L Ztripstrip-point0 j_ vhotvph-pwr-regulator2regulator-fixed vph_pwr 8u  8u pm8998-smps42regulator-fixed vreg_s4a_1p8 w@ w@ 7   interrupt-parent#address-cells#size-cellsmodelcompatiblei2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10i2c11i2c12i2c13i2c14i2c15spi0spi1spi2spi3spi4spi5spi6spi7spi8spi9spi10spi11spi12spi13spi14spi15serial0stdout-pathdevice_typeregrangesno-mapphandleqcom,client-idqcom,vmidenable-methodcpu-idle-statescapacity-dmips-mhzdynamic-power-coefficientqcom,freq-domainoperating-points-v2interconnects#cooling-cellsnext-level-cachecpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzopp-peak-kBpsinterrupts#clock-cellsclock-frequencyclock-output-namesinterrupts-extendedinterrupt-namesclocksclock-namesmemory-regionqcom,smem-statesqcom,smem-state-namesstatusfirmware-namelabelqcom,remote-pidmboxesqcom,glink-channelsqcom,apr-domainqcom,intentsqcom,protection-domain#sound-dai-cellsiommussyscon#hwlock-cellshwlocksqcom,smemqcom,local-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cells#power-domain-cellsprotected-clocksbitsrequired-oppspinctrl-namespinctrl-0power-domainsreg-nameslinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapiommu-mapresetsreset-namesphysphy-namesassigned-clocksassigned-clock-rates#phy-cells#interconnect-cellsqcom,bcm-voterslanes-per-directionfreq-table-hzreset-gpiosvcc-supplyvcc-max-microampvdda-phy-supplyvdda-pll-supplyinterconnect-namesmodem-remoteprocgpio-controller#gpio-cellsgpio-rangeswakeup-parentgpio-reserved-rangespinsfunctionbias-pull-updrive-strengthbias-pull-downbias-disableinput-enableoutput-highqcom,halt-regspower-domain-namesremote-endpointarm,scatter-gatherarm,coresight-loses-context-with-cpuvmmc-supplyvqmmc-supplycd-gpiosqcom,apps-ch-pipesqcom,ea-pcdmasdma-namesslim-ifc-devqcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,dout-portsqcom,din-portsqcom,ports-sinterval-lowqcom,ports-offset1qcom,ports-offset2nvmem-cellsvdd-supplyvdda-phy-dpdm-supplyqcom,imp-res-offset-valueqcom,hstx-trim-valueqcom,preemphasis-levelqcom,preemphasis-widthsnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirkdr_modepinctrl-1vdda-supplyqcom,dual-dsi-modeqcom,master-dsidata-lanesmode-gpiosvdds-supply#stream-id-cellsqcom,gmuopp-level#iommu-cells#global-interruptsqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,eeqcom,channelcell-index#mbox-cellsqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-s7-supplyvdd-s8-supplyvdd-s9-supplyvdd-s10-supplyvdd-s11-supplyvdd-s12-supplyvdd-s13-supplyvdd-l1-l27-supplyvdd-l2-l8-l17-supplyvdd-l3-l11-supplyvdd-l4-l5-supplyvdd-l6-supplyvdd-l7-l12-l14-l15-supplyvdd-l9-supplyvdd-l10-l23-l25-supplyvdd-l13-l19-l21-supplyvdd-l16-l28-supplyvdd-l18-l22-supplyvdd-l20-l24-supplyvdd-l26-supplyvin-lvs-1-2-supplyregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-always-onvdd-bob-supplyregulator-allow-bypassmsi-controller#msi-cellsqcom,controlled-remotelynum-channels#dma-cellsqcom,num-eesframe-number#freq-domain-cellsvdd-0.8-cx-mx-supplyvdd-1.8-xo-supplyvdd-1.3-rfa-supplyvdd-3.3-ch0-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceregulator-nameregulator-boot-onvin-supply