b8h( 0&firefly,roc-rk3328-ccrockchip,rk3328 +7Firefly roc-rk3328-ccaliases=/serial@ff110000E/serial@ff120000M/serial@ff130000U/i2c@ff150000Z/i2c@ff160000_/i2c@ff170000d/i2c@ff180000i/ethernet@ff540000s/ethernet@ff550000cpus+cpu@0}cpuarm,cortex-a53xpsci cpu@1}cpuarm,cortex-a53xpsci cpu@2}cpuarm,cortex-a53xpsci cpu@3}cpuarm,cortex-a53xpsci idle-statespscicpu-sleeparm,idle-state 1HxYi l2-cache0cache opp_table0operating-points-v2z opp-408000000Q~@opp-600000000#F~@opp-8160000000,B@@opp-1008000000<@opp-1200000000G(@opp-1296000000M?d @bus simple-bus+dmac@ff1f0000arm,pl330arm,primecell@ apb_pclk analog-soundsimple-audio-cardi2s*Analog Adisabledsimple-audio-card,cpuHsimple-audio-card,codecHarm-pmuarm,cortex-a53-pmu0defgR display-subsystemrockchip,display-subsysteme hdmi-soundsimple-audio-cardi2s*HDMI Adisabledsimple-audio-card,cpuHsimple-audio-card,codecHpsciarm,psci-1.0arm,psci-0.2smctimerarm,armv8-timer0   xin24m fixed-clockkxn6xin24m Di2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s )7i2s_clki2s_hclk  txrx Adisabled i2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s *8i2s_clki2s_hclktxrx Adisabled i2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s +9i2s_clki2s_hclktxrx Adisabledspdif@ff030000rockchip,rk3328-spdif .: mclkhclk txdefault Adisabledpdm@ff040000 rockchip,pdm=Rpdm_clkpdm_hclkrxdefaultsleep Adisabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd :io-domains"rockchip,rk3328-io-voltage-domainAokay#1grf-gpiorockchip,rk3328-grf-gpio>N dpower-controller!rockchip,rk3328-power-controllerZ+ <power-domain@6power-domain@5power-domain@8Freboot-modesyscon-reboot-modenuRBRBRB RBserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart 7&baudclkapb_pclktxrxdefault  !" Adisabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart 8'baudclkapb_pclktxrxdefault #$% Adisabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart 9(baudclkapb_pclktxrxdefault&Aokayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c $+7 i2cpclkdefault' Adisabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c %+8 i2cpclkdefault(Aokaypmic@18rockchip,rk805 )kxin32krk805-clkout2>Ndefault*++ ++!- gregulatorsDCDC_REG1 9vdd_logicH 4` xregulator-state-memB@DCDC_REG29vdd_armH 4` x regulator-state-mem~DCDC_REG39vcc_ddrxregulator-state-memDCDC_REG49vcc_ioH2Z`2Zx regulator-state-mem2ZLDO_REG19vcc_18Hw@`w@x regulator-state-memw@LDO_REG2 9vcc18_emmcHw@`w@x regulator-state-memw@LDO_REG39vdd_10HB@`B@xregulator-state-memB@i2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c &+9 i2cpclkdefault, Adisabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c '+: i2cpclkdefault- Adisabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi 1+ spiclkapb_pclk txrxdefault./01 Adisabledwatchdog@ff1a0000 snps,dw-wdt (pwm@ff1b0000rockchip,rk3328-pwm< pwmpclkdefault2 Adisabledpwm@ff1b0010rockchip,rk3328-pwm< pwmpclkdefault3 Adisabledpwm@ff1b0020rockchip,rk3328-pwm < pwmpclkdefault4 Adisabledpwm@ff1b0030rockchip,rk3328-pwm0 2< pwmpclkdefault5 Adisabledthermal-zonessoc-thermal6tripstrip-point0#p/passivetrip-point1#L/passive 7soc-crit#s/ criticalcooling-mapsmap0:70? Ntsadc@ff250000rockchip,rk3328-tsadc% :[$kP$tsadcapb_pclkinitdefaultsleep898B tsadc-apb:Aokay 6efuse@ff260000rockchip,rk3328-efuse&P+> pclk_efuse id@7cpu-leakage@17logic-leakage@19cpu-version@1a Eadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc( P%saradcapb_pclkV saradc-apb Adisabledgpu@ff300000"rockchip,rk3328-maliarm,mali-4500TZW]XY[\"gpgpmmupppp0ppmmu0pp1ppmmu1 buscorefiommu@ff330200rockchip,iommu3 ` h265e_mmu aclkiface Adisablediommu@ff340800rockchip,iommu4@ b vepu_mmuF aclkiface Adisabledvideo-codec@ff350000rockchip,rk3328-vpu5  vdpuF aclkhclk;&<iommu@ff350800rockchip,iommu5@  vpu_mmuF aclkiface&< ;iommu@ff360480rockchip,iommu 6@6@ J rkvdec_mmuB aclkiface Adisabledvop@ff370000rockchip,rk3328-vop7>  x;aclk_vopdclk_vophclk_vop axiahbdclk=Aokayport+ endpoint@04> Ciommu@ff373f00rockchip,iommu7?  vop_mmu; aclkifaceAokay =hdmi@ff3c0000rockchip,rk3328-dw-hdmi<#GFiahbisfrcecD?Ihdmidefault @AB:Aokay portsportendpoint4C >codec@ff410000rockchip,rk3328-codecA* pclkmclk: Adisabled phy@ff430000rockchip,rk3328-hdmi-phyC SDysysclkrefoclkrefpclk hdmi_phykSE _cpu-versionpAokay ?clock-controller@ff440000(rockchip,rk3328-crurockchip,crusysconD:k{[x=&'(ABDC"\5H4$zDDD|kn6n6n6n6#FLGрxhxhрxhxh syscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfdE+usb2-phy@100rockchip,rk3328-usb2phyDphyclk usb480m_phyk[{FAokay Fotg-portp$;<=otg-bvalidotg-idlinestateAokay Uhost-portp > linestateAokay Vmmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcP@   =!JNbiuciuciu-driveciu-sampleрAokaydefaultGHIJ %K1mmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcQ@   >"KObiuciuciu-driveciu-sampleр Adisabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcR@  ?#LPbiuciuciu-driveciu-sampleрAokay>KZdefault LMN%1ethernet@ff540000rockchip,rk3328-gmacT macirq8dWXZYMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macc stmmaceth:hAokay[dfOOsinputPrgmiidefaultQ ) 'P$ethernet@ff550000rockchip,rk3328-gmacU: macirq8TSSUVIstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphybdstmmacethmac-phyrmiiRhsoutput Adisabledmdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22VddefaultST Rusb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2X Motghost,;@ DU Iusb2-phyAokayusb@ff5c0000 generic-ehci\  NFDVIusbAokayusb@ff5d0000 generic-ohci]  NFDVIusbAokayusb@ff600000rockchip,rk3328-dwc3snps,dwc3` C`aref_clksuspend_clkbus_clkotg Jutmi_wideSt Adisabledinterrupt-controller@ff811000 arm,gic-400  @ @ `    pinctrlrockchip,rk3328-pinctrl:+gpio0@ff210000rockchip,gpio-bank! 3>N   bgpio1@ff220000rockchip,gpio-bank" 4>N   )gpio2@ff230000rockchip,gpio-bank# 5>N  gpio3@ff240000rockchip,gpio-bank$ 6>N  pcfg-pull-up ' Ypcfg-pull-down 4 apcfg-pull-none C Wpcfg-pull-none-2ma C P `pcfg-pull-up-2ma ' Ppcfg-pull-up-4ma ' P Zpcfg-pull-none-4ma C P ]pcfg-pull-down-4ma 4 Ppcfg-pull-none-8ma C P [pcfg-pull-up-8ma ' P \pcfg-pull-none-12ma C P  ^pcfg-pull-up-12ma ' P  _pcfg-output-high _pcfg-output-low kpcfg-input-high ' v Xpcfg-input vi2c0i2c0-xfer WW 'i2c1i2c1-xfer WW (i2c2i2c2-xfer  WW ,i2c3i2c3-xfer WW -i2c3-pins WWhdmi_i2chdmii2c-xfer WW Apdm-0pdmm0-clk W pdmm0-fsync Wpdmm0-sdi0 W pdmm0-sdi1 W pdmm0-sdi2 W pdmm0-sdi3 W pdmm0-clk-sleep X pdmm0-sdi0-sleep X pdmm0-sdi1-sleep X pdmm0-sdi2-sleep X pdmm0-sdi3-sleep X pdmm0-fsync-sleep Xtsadcotp-pin  W 8otp-out  W 9uart0uart0-xfer  WY uart0-cts  W !uart0-rts  W "uart0-rts-pin  Wuart1uart1-xfer WY #uart1-cts W $uart1-rts W %uart1-rts-pin Wuart2-0uart2m0-xfer WYuart2-1uart2m1-xfer WY &spi0-0spi0m0-clk Yspi0m0-cs0  Yspi0m0-tx  Yspi0m0-rx  Yspi0m0-cs1  Yspi0-1spi0m1-clk Yspi0m1-cs0 Yspi0m1-tx Yspi0m1-rx Yspi0m1-cs1 Yspi0-2spi0m2-clk Y .spi0m2-cs0 Y 1spi0m2-tx Y /spi0m2-rx Y 0i2s1i2s1-mclk Wi2s1-sclk Wi2s1-lrckrx Wi2s1-lrcktx Wi2s1-sdi Wi2s1-sdo Wi2s1-sdio1 Wi2s1-sdio2 Wi2s1-sdio3 Wi2s1-sleep XXXXXXXXXi2s2-0i2s2m0-mclk Wi2s2m0-sclk Wi2s2m0-lrckrx Wi2s2m0-lrcktx Wi2s2m0-sdi Wi2s2m0-sdo Wi2s2m0-sleep` XXXXXXi2s2-1i2s2m1-mclk Wi2s2m1-sclk Wi2sm1-lrckrx Wi2s2m1-lrcktx Wi2s2m1-sdi Wi2s2m1-sdo Wi2s2m1-sleepP XXXXXspdif-0spdifm0-tx Wspdif-1spdifm1-tx Wspdif-2spdifm2-tx W sdmmc0-0sdmmc0m0-pwren Zsdmmc0m0-pin Zsdmmc0-1sdmmc0m1-pwren Zsdmmc0m1-pin Z csdmmc0sdmmc0-clk [ Gsdmmc0-cmd \ Hsdmmc0-dectn Z Isdmmc0-wrprt Zsdmmc0-bus1 \sdmmc0-bus4@ \\\\ Jsdmmc0-pins ZZZZZZZZsdmmc0extsdmmc0ext-clk ]sdmmc0ext-cmd Zsdmmc0ext-wrprt Zsdmmc0ext-dectn Zsdmmc0ext-bus1 Zsdmmc0ext-bus4@ ZZZZsdmmc0ext-pins ZZZZZZZZsdmmc1sdmmc1-clk  [sdmmc1-cmd  \sdmmc1-pwren \sdmmc1-wrprt \sdmmc1-dectn \sdmmc1-bus1 \sdmmc1-bus4@ \\\\sdmmc1-pins  Z ZZZZZZZZemmcemmc-clk ^ Lemmc-cmd _ Memmc-pwren Wemmc-rstnout Wemmc-bus1 _emmc-bus4@ ____emmc-bus8 ________ Npwm0pwm0-pin W 2pwm1pwm1-pin W 3pwm2pwm2-pin W 4pwmirpwmir-pin W 5gmac-1rgmiim1-pins`  [ ]][]]] ] ][ []][[[ [][[[[ Qrmiim1-pins `^```` ` `^ ^ W WWWWWgmac2phyfephyled-speed10 Wfephyled-duplex Wfephyled-rxm1 W Sfephyled-txm1 Wfephyled-linkm1 W Ttsadc_pintsadc-int  Wtsadc-pin  Whdmi_pinhdmi-cec W @hdmi-hpd a Bcif-0dvp-d2d9-m0 WWWWW W W WWWWWcif-1dvp-d2d9-m1 WWWWWWWWWWWWpmicpmic-int-l Y *usb2usb20-host-drv W echosen serial2:1500000n8external-gmac-clock fixed-clockxsY@ gmac_clkink Odc-12vregulator-fixed9dc_12vxH` fsdmmc-regulatorregulator-fixed bdefaultc9vcc_sdH2Z`2Z  Ksdmmcio-regulatorregulator-gpio dw@2Z 9vcc_sdio voltageHw@`2Zx + vcc-host1-5v-regulatorregulator-fixed  )defaulte 9vcc_host1_5vx +vcc-sysregulator-fixed9vcc_sysxHLK@`LK@ f +vcc-phy-regulatorregulator-fixed9vcc_phyx Pleds gpio-ledsled-0 firefly:blue:power heartbeat g onled-1 firefly:yellow:user mmc1 g off compatibleinterrupt-parent#address-cells#size-cellsmodelserial0serial1serial2i2c0i2c1i2c2i2c3ethernet0ethernet1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodnext-level-cacheoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrangesinterruptsarm,pl330-periph-burstclock-names#dma-cellssimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1vccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplypmuio-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shiftrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,grfrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,efuse-sizebits#io-channel-cellsinterrupt-names#iommu-cellsiommuspower-domainsremote-endpointphysphy-namesnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-ddr-1_8vmmc-hs200-1_8vnon-removablesnps,txpblclock_in_outphy-supplyphy-modesnps,aalsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ussnps,rxpbltx_delayrx_delayphy-handlephy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathvin-supplygpiosregulator-typeenable-active-highlabellinux,default-triggerdefault-state