hR8a(Va,rockchip,rk3368-evb-act8846rockchip,rk3368 +&7Rockchip RK3368 EVB with ACT8846 pmicaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff660000Q/i2c@ff140000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/serial@ff180000m/serial@ff190000u/serial@ff690000}/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53pscicpu@1cpuarm,cortex-a53pscicpu@2cpuarm,cortex-a53pscicpu@3cpuarm,cortex-a53psci cpu@100cpuarm,cortex-a53pscicpu@101cpuarm,cortex-a53pscicpu@102cpuarm,cortex-a53pscicpu@103cpuarm,cortex-a53pscibus simple-bus+dma-controller@ff250000arm,pl330arm,primecell%@ $  +apb_pclkdma-controller@ff600000arm,pl330arm,primecell`@ $  +apb_pclk2arm-pmuarm,armv8-pmuv3`pqrstuvw 7 psci arm,psci-0.2smctimerarm,armv8-timer0   oscillator fixed-clockJn6Zxin24mmmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @zр $  D r v+biuciuciu-driveciu-sample  reset disabledmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @zр $  E s w+biuciuciu-driveciu-sample ! reset disabledmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc@zр $  G u y+biuciuciu-driveciu-sample # resetokay default  saradc@ff100000rockchip,saradc $$ I [+saradcapb_pclk W saradc-apb disabledspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi$ A R+spiclkapb_pclk ,default+ disabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi$ B S+spiclkapb_pclk -default+ disabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi$ C T+spiclkapb_pclk )default+ disabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c >++i2c$ Ndefault disabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c ?++i2c$ Odefault disabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c @++i2c$ Pdefault disabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c A++i2c$ Qdefault disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uartJn6$ M U+baudclkapb_pclk 7  disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uartJn6$ N V+baudclkapb_pclk 8  disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uartJn6$ P X+baudclkapb_pclk :  disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uartJn6$ Q Y+baudclkapb_pclk ;  disabledthermal-zonescpu#d9Gtripscpu_alert0W$cpassive cpu_alert1W8cpassive!cpu_critWsc criticalcooling-mapsmap0n 0smap1n!0s gpu#d9Gtripsgpu_alert0W8cpassive"gpu_critW8c criticalcooling-mapsmap0n"0stsadc@ff280000rockchip,rk3368-tsadc( %$ H Z+tsadcapb_pclk  tsadc-apbinitdefaultsleep#$#sokayethernet@ff290000rockchip,rk3368-gmac) macirq%8$  f g c ]M+stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macokay&rmii&output 3' C Y'B@default(n0wusb@ff500000 generic-ehciP $ okayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2X $ +otghost@@ okayi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2ce$ L+i2c <default)+okayJsyr827@40silergy,syr827@vdd_cpu Pp(:*syr828@41silergy,syr828Avdd_gpu Pp:*act8846@5aactive-semi,act8846ZokayE*P*[*f*q+}*,regulatorsREG1VCC_DDROOREG2VCC_IO2Z2Z+REG3VDD_LOG ``REG4VCC_20,REG5 VCCIO_SDw@2ZREG6 VDD10_LCDB@B@REG7 VCCA_CODEC2Z2ZREG8VCCA_TP2Z2ZREG9 VCCIO_PMU2Z2ZREG10VDD_10B@B@REG11VCC_18w@w@REG12 VCC18_LCDw@w@i2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cf =++i2c$ Mdefault- disabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault.$ _+pwmokay=pwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault/$ _+pwm disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmh $ _+pwm disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmh0default0$ _+pwm disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uarti$ O W+baudclkapb_pclk 9default1 okaymbox@ff6b0000rockchip,rk3368-mailboxk0$ E +pclk_mailbox disabledsyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfds5io-domains&rockchip,rk3368-pmu-io-voltage-domain disabledreboot-modesyscon-reboot-modeRBRBRB RBclock-controller@ff760000rockchip,rk3368-cruv%m syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfdw%io-domains"rockchip,rk3368-io-voltage-domain disabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt$ p Ookaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer  Bspdif@ff880000rockchip,rk3368-spdif 6$ S  +mclkhclk2txdefault3 disabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s (+i2s_clki2s_hclk$ T 22txrx disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s 5+i2s_clki2s_hclk$ R 22txrxdefault4 disablediommu@ff900800rockchip,iommu iep_mmu$  +aclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu$  +aclkiface disablediommu@ff930300rockchip,iommu vop_mmu$  +aclkiface disablediommu@ff9a0440rockchip,iommu @@@  hevc_mmu$  +aclkiface disablediommu@ff9a0800rockchip,iommu  vepu_mmuvdpu_mmu$  +aclkiface disabledefuse@ffb00000rockchip,rk3368-efuse +$ q +pclk_efusecpu-leakage@17temp-adjust@1finterrupt-controller@ffb71000 arm,gic-400-B@ @ `   pinctrlrockchip,rk3368-pinctrl%S5+gpio0@ff750000rockchip,gpio-banku$ @ Q`p-B;gpio1@ff780000rockchip,gpio-bankx$ A R`p-Bgpio2@ff790000rockchip,gpio-banky$ B S`p-B?gpio3@ff7a0000rockchip,gpio-bankz$ C T`p-B'pcfg-pull-up|8pcfg-pull-downpcfg-pull-none9pcfg-pull-none-12ma :emmcemmc-clk6 emmc-cmd7 emmc-pwr8emmc-bus18emmc-bus4@8888emmc-bus877777777emmc-reset9>gmacrgmii-pins999: : ::: :999999rmii-pins999: : :9999(i2c0i2c0-xfer 99)i2c1i2c1-xfer 99-i2c2i2c2-xfer  99i2c3i2c3-xfer 99i2c4i2c4-xfer 99i2c5i2c5-xfer 99i2si2s-8ch-bus 9 999999994pwm0pwm0-pin9.pwm1pwm1-pin9/pwm3pwm3-pin90sdio0sdio0-bus18sdio0-bus4@8888sdio0-cmd8sdio0-clk9sdio0-cd8sdio0-wp8sdio0-pwr8sdio0-bkpwr8sdio0-int8sdmmcsdmmc-clk 9sdmmc-cmd 8sdmmc-cd 8sdmmc-bus18sdmmc-bus4@8888spdifspdif-tx93spi0spi0-clk8spi0-cs08spi0-cs18spi0-tx8spi0-rx8spi1spi1-clk8spi1-cs08spi1-cs18spi1-rx8spi1-tx8spi2spi2-clk 8spi2-cs0 8spi2-rx 8spi2-tx 8tsadcotp-pin9#otp-out9$uart0uart0-xfer 89uart0-cts9uart0-rts9uart1uart1-xfer 89uart1-cts9uart1-rts9uart2uart2-xfer 891uart3uart3-xfer 89uart3-cts9uart3-rts9uart4uart4-xfer 89uart4-cts9uart4-rts9pcfg-pull-none-drv-8ma6pcfg-pull-up-drv-8ma|7backlightbl-en9<keyspwr-key8@pmicpmic-int8sdiowifi-reg-on9bt-rst9usbhost-vbus-drv9Achosenserial2:115200n8memorymemory@backlightpwm-backlight  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ ;default<=B@ 'emmc-pwrseqmmc-pwrseq-emmc>default ? gpio-keys gpio-keysdefault@power$ ; 2GPIO Power8tvcc-host-regulatorregulator-fixedC >;defaultA vcc_host(:*vcc-lan-regulatorregulator-fixedvcc_lan2Z2Z(:+&vcc-sys-regulatorregulator-fixedvcc_sysLK@LK@(* compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2cpudevice_typeregenable-method#cooling-cellsphandlerangesinterrupts#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclocksclock-namesinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyfifo-depthresetsreset-namesstatusbus-widthcap-mmc-highspeedmmc-pwrseqnon-removablepinctrl-namespinctrl-0#io-channel-cellsreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#mbox-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-names#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathbrightness-levelsdefault-brightness-levelenable-gpiospwmspwm-delay-usreset-gpioswakeup-sourcelabellinux,codeenable-active-high