h8a(a'tsd,rk3368-lion-haikourockchip,rk3368 +'7Theobroma Systems RK3368-uQ7 Baseboardaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff660000Q/i2c@ff140000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/serial@ff180000m/serial@ff190000u/serial@ff690000}/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53psci cpu@1cpuarm,cortex-a53psci cpu@2cpuarm,cortex-a53psci cpu@3cpuarm,cortex-a53psci  cpu@100cpuarm,cortex-a53psci cpu@101cpuarm,cortex-a53psci cpu@102cpuarm,cortex-a53psci cpu@103cpuarm,cortex-a53psci bus simple-bus+dma-controller@ff250000arm,pl330arm,primecell%@/  6apb_pclkdma-controller@ff600000arm,pl330arm,primecell`@/  6apb_pclk=arm-pmuarm,armv8-pmuv3`pqrstuvw B psci arm,psci-0.2smctimerarm,armv8-timer0   oscillator fixed-clockUn6exin24mxmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @}x@ /  D r v6biuciuciu-driveciu-sample  resetokay  default  Z/mmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @р /  E s w6biuciuciu-driveciu-sample ! reset disabledmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc@р /  G u y6biuciuciu-driveciu-sample # resetokayUр;J/Xdefault saradc@ff100000rockchip,saradc $e/ I [6saradcapb_pclk W saradc-apb disabledspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi/ A R6spiclkapb_pclk ,default+ disabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi/ B S6spiclkapb_pclk -default+okayflash@0jedec,spi-norwspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi/ C T6spiclkapb_pclk )default !+okay i2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c >+6i2c/ Ndefault"okayGi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c ?+6i2c/ Odefault# disabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c @+6i2c/ Pdefault$ disabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c A+6i2c/ Qdefault% disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uartUn6/ M U6baudclkapb_pclk 7okaydefault &'(serial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uartUn6/ N V6baudclkapb_pclk 8 disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uartUn6/ P X6baudclkapb_pclk :okayserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uartUn6/ Q Y6baudclkapb_pclk ; disabledthermal-zonescpud)tripscpu_alert0$passive*cpu_alert18passive+cpu_crits criticalcooling-mapsmap0*0map1+0 gpud)tripsgpu_alert08passive,gpu_crit8 criticalcooling-mapsmap0,0tsadc@ff280000rockchip,rk3368-tsadc( %/ H Z6tsadcapb_pclk  tsadc-apbinitdefaultsleep-.-2s disabled)ethernet@ff290000rockchip,rk3368-gmac) ImacirqY/8/  f g c ]M6stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macokayf v0inputrgmiidefault1 'P 2 usb@ff500000 generic-ehciP / okayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2X / 6otgotg$@@ okayi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2ce/ L6i2c <default3+okaypmic@1brockchip,rk808 4exin32krk808-clkout2xdefault563T7`7l7x77777777regulatorsDCDC_REG1vdd_cpu ``. DCDC_REG2vdd_log ``.DCDC_REG3vcc_ddr.DCDC_REG4 vcc33_io2Z2Z.LDO_REG2 vcc33_video2Z2Z.LDO_REG3 vdd10_pllB@B@.LDO_REG4 vcc18_iow@w@.LDO_REG6 vdd10_videoB@B@.LDO_REG8 vcc18_videow@w@.i2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cf =+6i2c/ Mdefault8okayEpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmh@default9/ _6pwm disabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmh@default:/ _6pwm disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmh @/ _6pwm disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmh0@default;/ _6pwm disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uarti/ O W6baudclkapb_pclk 9default< disabledmbox@ff6b0000rockchip,rk3368-mailboxk0/ E 6pclk_mailboxK disabledsyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfds@io-domains&rockchip,rk3368-pmu-io-voltage-domain disabledreboot-modesyscon-reboot-modeW^RBjRBxRB RBclock-controller@ff760000rockchip,rk3368-cruvY/x syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfdw/io-domains"rockchip,rk3368-io-voltage-domain disabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt/ p Ookaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer  Bspdif@ff880000rockchip,rk3368-spdif 6/ S  6mclkhclk=txdefault> disabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s (6i2s_clki2s_hclk/ T ==txrx disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s 56i2s_clki2s_hclk/ R ==txrxdefault? disablediommu@ff900800rockchip,iommu Iiep_mmu/  6aclkiface disablediommu@ff914000rockchip,iommu @P Iisp_mmu/  6aclkiface disablediommu@ff930300rockchip,iommu Ivop_mmu/  6aclkiface disablediommu@ff9a0440rockchip,iommu @@@  Ihevc_mmu/  6aclkiface disablediommu@ff9a0800rockchip,iommu  Ivepu_mmuvdpu_mmu/  6aclkiface disabledefuse@ffb00000rockchip,rk3368-efuse +/ q 6pclk_efusecpu-leakage@17temp-adjust@1finterrupt-controller@ffb71000 arm,gic-400@ @ `   pinctrlrockchip,rk3368-pinctrlY/@+defaultAgpio0@ff750000rockchip,gpio-banku/ @ Q 4gpio1@ff780000rockchip,gpio-bankx/ A R Fgpio2@ff790000rockchip,gpio-banky/ B S  gpio3@ff7a0000rockchip,gpio-bankz/ C T 2pcfg-pull-up'Cpcfg-pull-down4pcfg-pull-noneCBpcfg-pull-none-12maCP Demmcemmc-clk_Bemmc-cmd_Cemmc-pwr_Cemmc-bus1_Cemmc-bus4@_CCCCemmc-bus8_CCCCCCCCgmacrgmii-pins_BBBD D DDD DBBBBBB1rmii-pins_BBBD D DBBBBi2c0i2c0-xfer _BB3i2c1i2c1-xfer _BB8i2c2i2c2-xfer _ BB"i2c3i2c3-xfer _BB#i2c4i2c4-xfer _BB$i2c5i2c5-xfer _BB%i2si2s-8ch-bus_ B BBBBBBBB?pwm0pwm0-pin_B9pwm1pwm1-pin_B:pwm3pwm3-pin_B;sdio0sdio0-bus1_Csdio0-bus4@_CCCCsdio0-cmd_Csdio0-clk_Bsdio0-cd_Csdio0-wp_Csdio0-pwr_Csdio0-bkpwr_Csdio0-int_Csdmmcsdmmc-clk_ B sdmmc-cmd_ Csdmmc-cd_ Csdmmc-bus1_Csdmmc-bus4@_CCCCsdmmc-cd-pin_ Bspdifspdif-tx_B>spi0spi0-clk_Cspi0-cs0_Cspi0-cs1_Cspi0-tx_Cspi0-rx_Cspi1spi1-clk_Cspi1-cs0_Cspi1-cs1_Cspi1-rx_Cspi1-tx_Cspi2spi2-clk_ Cspi2-cs0_ C!spi2-rx_ C spi2-tx_ Ctsadcotp-pin_B-otp-out_B.uart0uart0-xfer _CB&uart0-cts_B'uart0-rts_B(uart1uart1-xfer _CBuart1-cts_Buart1-rts_Buart2uart2-xfer _CB<uart3uart3-xfer _CBuart3-cts_Buart3-rts_Buart4uart4-xfer _CBuart4-cts_Buart4-rts_Bledsmodule-led-pins _ BBHsd-card-led-pin_BIpmicpmic-int-l_C5pmic-sleep_B6hoghaikou-pin-hog@_CCCCAusb_otgotg-vbus-drv_BKchosenmserial0:115200n8gmac-clk fixed-clockUsY@ eext_gmacx0i2cmux1 i2c-mux-gpio+yE Fi2c@0+i2c@1+i2cmux2 i2c-mux-gpio+yG F i2c@0+fan@18 ti,amc6821rtc@6f isil,isl1208oeeprom@50 atmel,24c01Pi2c@1+leds gpio-ledsdefaultHIled-1 module_led1   heartbeatled-2 module_led2 2offled-3 sd_card_led 4mmc0vcc-sys-regulatorregulator-fixedvcc_sysLK@LK@.7dc-12vregulator-fixeddc_12v.Jvcc3v3-baseboardregulator-fixedvcc3v3_baseboard.2Z2ZJvcc5v0-otg-regulatorregulator-fixed 4defaultK vcc5v0_otg compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2cpudevice_typeregenable-method#cooling-cellscpu-supplyphandlerangesinterrupts#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclocksclock-namesinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyfifo-depthresetsreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wppinctrl-namespinctrl-0rockchip,default-sample-phasevmmc-supplymmc-hs200-1_8vnon-removablevqmmc-supply#io-channel-cellsspi-max-frequencycs-gpiosreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-tempinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-on#pwm-cells#mbox-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-names#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathi2c-parentmux-gpiospagesizelabellinux,default-triggerpanic-indicatordefault-statevin-supplyenable-active-high