;87(7$Marvell Armada 385 Reference DesignF!marvell,a385-rdmarvell,armada388marvell,armada385marvell,armada380aliases,/soc/internal-regs/gpio@181002/soc/internal-regs/gpio@18140 8/soc/internal-regs/serial@12000 @/soc/internal-regs/serial@12100pmu!arm,cortex-a9-pmuHsoc"!marvell,armada380-mbussimple-bus\gx@  bootrom!marvell,bootrom  devbus-bootcs!marvell,mvebu-devbus / disableddevbus-cs0!marvell,mvebu-devbus > disableddevbus-cs1!marvell,mvebu-devbus = disableddevbus-cs2!marvell,mvebu-devbus ; disableddevbus-cs3!marvell,mvebu-devbus  7 disabledinternal-regs !simple-bussdramc@1400#!marvell,armada-xp-sdram-controllercache-controller@8000!arm,pl310-cachescu@c000!arm,cortex-a9-scuXtimer@c200!arm,cortex-a9-global-timer  " timer@c600!arm,cortex-a9-twd-timer  " interrupt-controller@d000!arm,cortex-a9-gic->Si2c@11000+!marvell,mv78230-a0-i2cmarvell,mv64xxx-i2c  "okay[i2c@11100+!marvell,mv78230-a0-i2cmarvell,mv64xxx-i2c  " disabledserial@12000!!marvell,armada-38x-uartns16550a k " uokayserial@12100!!marvell,armada-38x-uartns16550a!k " u disabledpinctrl@18000 !marvell,mv88f6828-pinctrlge-rgmii-pins-0Dmpp6mpp7mpp8mpp9mpp10mpp11mpp12mpp13mpp14mpp15mpp16mpp17ge0ge-rgmii-pins-1Hmpp21mpp27mpp28mpp29mpp30mpp31mpp32mpp37mpp38mpp39mpp40mpp41ge1i2c-pins-0 mpp2mpp3i2c0mdio-pins mpp4mpp5geref-clk-pins-0mpp45refref-clk-pins-1mpp46refspi-pins-0mpp22mpp23mpp24mpp25spi0spi-pins-1mpp56mpp57mpp58mpp59spi1nand-pinsNmpp22mpp34mpp23mpp33mpp38mpp28mpp40mpp42mpp35mpp36mpp25mpp30mpp32devnand-rbmpp41nanduart-pins-0 mpp0mpp1ua0uart-pins-1 mpp19mpp20ua1sdhci-pins<mpp48mpp49mpp50mpp52mpp53mpp54mpp55mpp57mpp58mpp59sd0Ssata-pins-0mpp20sata0sata-pins-1mpp19sata1sata-pins-2mpp47sata2sata-pins-3mpp44sata3gpio@18100+!marvell,armada-370-gpiomarvell,orion-gpio@ gpiopwm >-0"5678gpio@18140+!marvell,armada-370-gpiomarvell,orion-gpio@@ gpiopwm>-0":;<=system-controller@18200M!marvell,armada-380-system-controllermarvell,armada-370-xp-system-controllerclock-gating-control@18220 !marvell,armada-380-gating-clock Sphy@18300!marvell,armada-380-comphy comphyconf`phy@0phy@1phy@2phy@3phy@4phy@5mvebu-sar@18600!marvell,armada-380-core-clockSmbus-controller@20000!marvell,mbus-controller PSinterrupt-controller@20a00 !marvell,mpic pX-> "Stimer@203001!marvell,armada-380-timermarvell,armada-xp-timer0@0PH     nbclkfixedwatchdog@20300!marvell,armada-380-wdt4`  nbclkfixed H@ cpurst@20800!marvell,armada-370-cpu-resetmpcore-soc-ctrl@20d20#!marvell,armada-380-mpcore-soc-ctrl lcoherency-fabric@21010$!marvell,armada-380-coherency-fabricpmsu@22000!marvell,armada-380-pmsu ethernet@70000!marvell,armada-370-neta@H &Hokay rgmii-idethernet@30000!marvell,armada-370-neta@H okay rgmii-idethernet@34000!marvell,armada-370-neta@@H  disabledusb@58000!marvell,orion-ehci " disabledxor@60800)!marvell,armada-380-xormarvell,orion-xor okayxor00 "&4xor01 "&4?xor@60900)!marvell,armada-380-xormarvell,orion-xor  okayxor10 "A&4xor11 "B&4?mdio@72004!marvell,orion-mdio ethernet-phy@0Sethernet-phy@1Scrypto@90000!marvell,armada-38x-crypto regs" cesa0cesa1cesaz0cesaz1M brtc@a3800!marvell,armada-380-rtc 8   rtcrtc-soc "sata@a8000!marvell,armada-380-ahci  " disabledbm@c8000!marvell,armada-380-neta-bm  {  disabledsata@e0000!marvell,armada-380-ahci  " disabledclock@e4250!!marvell,armada-380-corediv-clockBP  nandS thermal@e8078!marvell,armada380-thermal@x@pokaynand-controller@d0000"!marvell,armada370-nand-controller T "T  disabledsdhci@d8000!marvell,armada-380-sdhcisdhcimbusconf-sdio3  T "okaydefaultusb3@f0000!marvell,armada-380-xhci@@@ " okayusb3@f8000!marvell,armada-380-xhci@@ "  disabledsa-sram0 !mmio-sram  S sa-sram1 !mmio-sram  S bm-bppi !mmio-sram    disabledS spi@10600)!marvell,armada-380-spimarvell,orion-spi P "okayspi-flash@0!st,m25p128jedec,spi-nor ospi@10680)!marvell,armada-380-spimarvell,orion-spi P "? disabledpcie!marvell,armada-370-pcieokaypci(3P  @@  pcie@1,0pci= -@3P cqokaypcie@2,0pci= -@3P c!q disabledpcie@3,0pci=@ -@3P cFq disabledpcie@4,0pci=   -@3P cGq disabledclocksmainpll !fixed-clock[;S oscillator !fixed-clock[}x@Scpusmarvell,armada-380-smpcpu@0cpu!arm,cortex-a9cpu@1cpu!arm,cortex-a9chosenserial0:115200n8memorymemory #address-cells#size-cellsmodelcompatiblegpio0gpio1serial0serial1interrupts-extendedcontrollerinterrupt-parentpcie-mem-aperturepcie-io-aperturerangesregclocksstatuscache-unifiedcache-levelarm,double-linefill-incrarm,double-linefill-wraparm,double-linefillprefetch-datainterrupts#interrupt-cellsinterrupt-controllerphandleclock-frequencyreg-shiftreg-io-widthmarvell,pinsmarvell,functionreg-namesngpiosgpio-controller#gpio-cells#pwm-cells#clock-cells#phy-cellsmsi-controllerclock-namestx-csum-limitphyphy-modedmacap,memcpydmacap,xordmacap,memsetmarvell,crypto-sramsmarvell,crypto-sram-sizeinternal-memclock-output-namesmrvl,clk-delay-cyclespinctrl-namespinctrl-0broken-cdno-1-8-vwp-invertedbus-widthno-memory-wccell-indexspi-max-frequencydevice_typemsi-parentbus-rangeassigned-addressesinterrupt-map-maskinterrupt-mapmarvell,pcie-portmarvell,pcie-laneenable-methodstdout-path