H8C(C2Marvell Armada XP Development Board DB-MV784MP-GPOmarvell,axp-gpmarvell,armadaxp-mv78460marvell,armadaxpmarvell,armada-370-xp aliases ,/soc/internal-regs/serial@12000 4/soc/internal-regs/serial@12100  | disableddevbus-cs1marvell,mvebu-devbus x= | disableddevbus-cs2marvell,mvebu-devbus x; | disableddevbus-cs3marvell,mvebu-devbus x 7 | disabledinternal-regs simple-bus rtc@10300marvell,orion-rtcx 2i2c@11000(marvell,mv78230-i2cmarvell,mv64xxx-i2c | disabledxi2c@11100(marvell,mv78230-i2cmarvell,mv64xxx-i2c  | disabledxserial@12000snps,dw-apb-uartx )|okayserial@12100snps,dw-apb-uartx!*|okaypin-ctrl@18000x8marvell,mv78460-pinctrlge0-gmii-pinsmpp0mpp1mpp2mpp3mpp4mpp5mpp6mpp7mpp8mpp9mpp10mpp11mpp12mpp13mpp14mpp15mpp16mpp17mpp18mpp19mpp20mpp21mpp22mpp23ge0ge0-rgmii-pins>mpp0mpp1mpp2mpp3mpp4mpp5mpp6mpp7mpp8mpp9mpp10mpp11ge0ge1-rgmii-pinsHmpp12mpp13mpp14mpp15mpp16mpp17mpp18mpp19mpp20mpp21mpp22mpp23ge1sdio-pins$mpp30mpp31mpp32mpp33mpp34mpp35sd0spi0-pinsmpp36mpp37mpp38mpp39spi0spi1-pinsmpp13mpp14mpp16mpp17spi1uart2-pins mpp42mpp43uart2 uart3-pins mpp44mpp45uart3corediv-clock@18740!marvell,armada-370-corediv-clockx@ |(nand mbus-controller@20000marvell,mbus-controllerx Pinterrupt-controller@20a00 marvell,mpic; Lax pXcoherency-fabric@20200marvell,coherency-fabricxtimer@20300x0@0%&'(marvell,armada-xp-timer | pnbclkfixedwatchdog@20300x4marvell,armada-xp-wdt | pnbclkfixedcpurst@20800marvell,armada-370-cpu-resetx pmsu@22000marvell,armada-370-pmsux usb@50000marvell,orion-ehcix-okay|usb@51000marvell,orion-ehcix.okay|ethernet@70000x@|okaymarvell,armada-xp-neta| qsgmii mdio@72004 marvell,orion-mdiox |ethernet-phy@0x ethernet-phy@1x ethernet-phy@2xethernet-phy@3xethernet@74000x@@ |okaymarvell,armada-xp-neta| qsgmii sata@a0000marvell,armada-370-satax P7|p01okaynand-controller@d0000"marvell,armada370-nand-controllerx T q| okaynand@0xpxa3xx_nand-0mvsdio@d4000marvell,orion-sdiox @6| disabledsdramc@1400#marvell,armada-xp-sdram-controllerxl2-cache@8000marvell,aurora-system-cachex &serial@12200snps,dw-apb-uart2 Wi|  disabledpcie@6,0lpci#0@ x0 ;@6I?Wi|  disabledpcie@7,0lpci#8 x8 ;@6I@Wi|  disabledpcie@8,0lpci#@ x@ ;@6IAWi|  disabledpcie@9,0lpci#H xH ;@  6IcWi|okaypcie@a,0lpci#P xP ;@  6IgWi|okayclocksmainpll fixed-clock{w5oscillator fixed-clock{}x@chosenserial0:115200n8memory@0lmemory x modelcompatible#address-cells#size-cellsserial0serial1serial2serial3gpio0gpio1gpio2enable-methoddevice_typeregclocksclock-latencyctrl-gpiosinterrupts-extendedcontrollerinterrupt-parentpcie-mem-aperturepcie-io-aperturerangesstatusdevbus,bus-widthdevbus,turn-off-psdevbus,badr-skew-psdevbus,acc-first-psdevbus,acc-next-psdevbus,rd-setup-psdevbus,rd-hold-psdevbus,sync-enabledevbus,wr-high-psdevbus,wr-low-psdevbus,ale-wr-psbank-widthinterruptsreg-shiftreg-io-widthmarvell,pinsmarvell,functionphandle#clock-cellsclock-output-names#interrupt-cellsinterrupt-controllermsi-controllerclock-namesphyphy-modebuffer-managerbm,pool-longnr-portslabelnand-rbnand-on-flash-bbtcap-sdio-irqcap-sd-highspeedcap-mmc-highspeedcache-id-partcache-levelcache-unifiedwt-overridepinctrl-0pinctrl-namesdmacap,memcpydmacap,xordmacap,memsetreg-namesmarvell,crypto-sramsmarvell,crypto-sram-sizeinternal-memngpiosgpio-controller#gpio-cells#pwm-cellscell-indexspi-max-frequencyno-memory-wcmsi-parentbus-rangeassigned-addressesinterrupt-map-maskinterrupt-mapmarvell,pcie-portmarvell,pcie-laneclock-frequencystdout-path