:86(T6Hsolidrun,cuboxmarvell,dove&SolidRun CuBox,aliases9=/mbus/internal-regs/power-management@d0000/gpio-ctrl@4009C/mbus/internal-regs/power-management@d0000/gpio-ctrl@420$I/mbus/internal-regs/gpio-ctrl@e8400cpuscpu@0marvell,pj4amarvell,sheeva-v7Ocpu[ll2-cachemarvell,tauros2-cachepgpu-subsystemmarvell,dove-gpu-subsystemokayi2c-muxi2c-mux-pinctrli2c0i2c1i2c2i2c@0lokayclock-generator@60silabs,si5351a-msopl`xtal clkout0l3L`clkout2l3L`i2c@1l disabledi2c@2l disabledmbus*marvell,dove-mbusmarvell,mbussimple-busr } P pciemarvell,dove-pcie disabledOpci  pcie@1Opci disabled l @pcie@2Opci disabled l @internal-regs simple-bus@ spi@10600marvell,orion-spil(  defaultokayspi-flash@0 st,w25q32)1-li2c@11000marvell,mv64xxx-i2cl   okayserial@12000 ns16550al ; okayserial@12100 ns16550al!;  default disabledserial@12200 ns16550al";   disabledserial@12300 ns16550al#;   disabledspi@14600marvell,orion-spilF(  disabledmbus-ctrl@20000marvell,mbus-controllerl system-ctrl@20000 marvell,orion-system-controllerlbridge-interrupt-ctrl@20110marvell,orion-bridge-intcElZinterrupt-controller@20200marvell,orion-intcEltimer@20300marvell,orion-timerl , watchdog@20300marvell,orion-wdtl(, crypto-engine@30000marvell,dove-cryptolnregs xokayusb-host@50000marvell,orion-ehcil okayusb-host@51000marvell,orion-ehcil okaydma-engine@60800marvell,orion-xorl  okaychannel0'channel1(dma-engine@60900marvell,orion-xorl   okaychannel0*channel1+sdio-host@90000marvell,dove-sdhcil $& default disabledethernet-ctrl@72000marvell,orion-ethl @ @okayethernet-port@0marvell,orion-eth-portlmdio-bus@72004marvell,orion-mdiol  okayethernet-phymarvell,88e1310lsdio-host@92000marvell,dove-sdhcil #% defaultokaysata-host@a0000marvell,orion-satal $> port0okaysata-phy@a2000marvell,mvebu-sata-phyl 4 sataokaudio-controller@b0000marvell,dove-audiol "  internal disabledaudio-controller@b4000marvell,dove-audiol @" internalextclkokaydefaultpower-management@d0000marvell,dove-pmusimple-busl  !Edomainsvpu-domain&:Odgpu-domain&:Odthermal-diode@1cmarvell,dove-thermall \clock-gating-ctrl@38marvell,dove-gating-clockl8  core-clock@64marvell,dove-divider-clockldpin-ctrl@200marvell,dove-pinctrll@ pmx-gpio-0kmpp0xgpiopmx-gpio-1kmpp1xgpiopmx-gpio-2kmpp2xgpiopmx-gpio-3kmpp3xgpiopmx-gpio-4kmpp4xgpiopmx-gpio-5kmpp5xgpiopmx-gpio-6kmpp6xgpiopmx-gpio-7kmpp7xgpiopmx-gpio-8kmpp8xgpiopmx-gpio-9kmpp9xgpiopmx-pcie1-clkreqkmpp9xpex1pmx-gpio-10kmpp10xgpiopmx-gpio-11kmpp11xgpiopmx-pcie0-clkreqkmpp11xpex0pmx-gpio-12kmpp12xgpiopmx-gpio-13kmpp13xgpiopmx-audio1-extclkkmpp13xaudio1pmx-gpio-14kmpp14xgpiopmx-gpio-15kmpp15xgpiopmx-gpio-16kmpp16xgpiopmx-gpio-17kmpp17xgpiopmx-gpio-18kmpp18xgpiopmx-gpio-19kmpp19xgpiopmx-gpio-20kmpp20xgpiopmx-gpio-21kmpp21xgpiopmx-camera kmpp_cameraxcamerapmx-camera-gpio kmpp_cameraxgpiopmx-sdio0 kmpp_sdio0xsdio0pmx-sdio0-gpio kmpp_sdio0xgpiopmx-sdio1 kmpp_sdio1xsdio1pmx-sdio1-gpio kmpp_sdio1xgpiopmx-audio1-gpio kmpp_audio1xgpiopmx-audio1-i2s1-spdifo kmpp_audio1 xi2s1/spdifopmx-spi0 kmpp_spi0xspi0 pmx-spi0-gpio kmpp_spi0xgpiopmx-spi1-4-7kmpp4mpp5mpp6mpp7xspi1pmx-spi1-20-23kmpp20mpp21mpp22mpp23xspi1pmx-uart1 kmpp_uart1xuart1 pmx-uart1-gpio kmpp_uart1xgpiopmx-nand kmpp_nandxnandpmx-nand-gpo kmpp_nandxgpopmx-i2c1 kmpp17mpp19xtwsipmx-i2c2 kmpp_audio1xtwsipmx-ssp-i2c2 kmpp_audio1 xssp/twsipmx-i2cmux-0ktwsi xtwsi-opt1pmx-i2cmux-1ktwsi xtwsi-opt2pmx-i2cmux-2ktwsi xtwsi-opt3core-clocks@214marvell,dove-core-clockl gpio-ctrl@400marvell,orion-gpiol  E, <gpio-ctrl@420marvell,orion-gpiol  E,=real-time-clock@8500marvell,orion-rtcl global-config@e802c"marvell,dove-global-configsysconl,gpio-ctrl@e8400marvell,orion-gpiol lcd-controller@810000marvell,dove-lcdl. disabledlcd-controller@820000marvell,dove-lcdl/ disabledsram@ffffe000 mmio-sraml gpu@840000core vivante,gc0l@okaymemoryOmemoryl@chosen#console=ttyS0,115200n8 earlyprintkleds gpio-ledsdefaultpowerPower keepregulators simple-busregulator@1regulator-fixedl USB PowerLK@LK@)= Odefaultclocksoscillator fixed-clock}x@ir-receivergpio-ir-receiver default #address-cells#size-cellscompatiblemodelinterrupt-parentgpio0gpio1gpio2device_typenext-level-cacheregmarvell,tauros2-cache-featuresphandlecoresstatusi2c-parentpinctrl-namespinctrl-0pinctrl-1pinctrl-2clock-frequency#clock-cellsclocksclock-namessilabs,pll-sourcesilabs,drive-strengthsilabs,multisynth-sourcesilabs,clock-sourcesilabs,pll-mastercontrollerpcie-mem-aperturepcie-io-aperturerangesmsi-parentbus-rangeassigned-addressesmarvell,pcie-port#interrupt-cellsinterrupt-map-maskinterrupt-mapcell-indexinterruptsspi-max-frequencyreg-shiftinterrupt-controllermarvell,#interruptsreg-namesmarvell,crypto-sramsmarvell,crypto-sram-sizedmacap,memcpydmacap,xormarvell,tx-checksum-limitlocal-mac-addressphy-handlephysphy-namesnr-ports#phy-cells#reset-cells#power-domain-cellsmarvell,pmu_pwr_maskmarvell,pmu_iso_maskresetsmarvell,pinsmarvell,function#gpio-cellsgpio-controllerngpiospower-domainsbootargslabeldefault-stateregulator-nameregulator-min-microvoltregulator-max-microvoltenable-active-highregulator-always-onregulator-boot-ongpio