581(\1marvell,dove-dbmarvell,dove*&Marvell DB-MV88AP510-BP Development Board,aliases9=/mbus/internal-regs/power-management@d0000/gpio-ctrl@4009C/mbus/internal-regs/power-management@d0000/gpio-ctrl@420$I/mbus/internal-regs/gpio-ctrl@e8400cpuscpu@0marvell,pj4amarvell,sheeva-v7Ocpu[ll2-cachemarvell,tauros2-cachepgpu-subsystemmarvell,dove-gpu-subsystem disabledi2c-muxi2c-mux-pinctrli2c0i2c1i2c2i2c@0lokayi2c@1l disabledi2c@2l disabledmbus*marvell,dove-mbusmarvell,mbussimple-bus P  pciemarvell,dove-pcie disabledOpci   pcie@1Opci disabled% l8 ?@ Qbupcie@2Opci disabled% l8 ?@ Qbuinternal-regs simple-bus@  spi@10600marvell,orion-spil(8  defaultokayspi-flash@0 st,m25p321-li2c@11000marvell,mv64xxx-i2cl  8 okayserial@12000 ns16550al 8 okayserial@12100 ns16550al!8  defaultokayserial@12200 ns16550al" 8  disabledserial@12300 ns16550al# 8  disabledspi@14600marvell,orion-spilF(8  disabledmbus-ctrl@20000marvell,mbus-controllerlsystem-ctrl@20000 marvell,orion-system-controllerlbridge-interrupt-ctrl@20110marvell,orion-bridge-intcQl interrupt-controller@20200marvell,orion-intcQltimer@20300marvell,orion-timerl , 8 watchdog@20300marvell,orion-wdtl(, 8 crypto-engine@30000marvell,dove-cryptolregs8  okayusb-host@50000marvell,orion-ehcil8 okayusb-host@51000marvell,orion-ehcil8 okaydma-engine@60800marvell,orion-xorl 8 okaychannel0'&4channel1(&4dma-engine@60900marvell,orion-xorl  8 okaychannel0*&4channel1+&4sdio-host@90000marvell,dove-sdhcil $&8 defaultokayethernet-ctrl@72000marvell,orion-ethl @8 ?@ disabledethernet-port@0marvell,orion-eth-portlYkmdio-bus@72004marvell,orion-mdiol 8  disabledethernet-physdio-host@92000marvell,dove-sdhcil #%8 defaultokaysata-host@a0000marvell,orion-satal $>8 v{port0okaysata-phy@a2000marvell,mvebu-sata-phyl 48 sataokaudio-controller@b0000marvell,dove-audiol "8  internal disabledaudio-controller@b4000marvell,dove-audiol @"8  internal disabledpower-management@d0000marvell,dove-pmusimple-busl  !Qdomainsvpu-domaingpu-domainthermal-diode@1cmarvell,dove-thermall \clock-gating-ctrl@38marvell,dove-gating-clockl88  core-clock@64marvell,dove-divider-clockldpin-ctrl@200marvell,dove-pinctrll@8 pmx-gpio-0mpp0gpiopmx-gpio-1mpp1gpiopmx-gpio-2mpp2gpiopmx-gpio-3mpp3gpiopmx-gpio-4mpp4gpiopmx-gpio-5mpp5gpiopmx-gpio-6mpp6gpiopmx-gpio-7mpp7gpiopmx-gpio-8mpp8gpiopmx-gpio-9mpp9gpiopmx-pcie1-clkreqmpp9pex1pmx-gpio-10mpp10gpiopmx-gpio-11mpp11gpiopmx-pcie0-clkreqmpp11pex0pmx-gpio-12mpp12gpiopmx-gpio-13mpp13gpiopmx-audio1-extclkmpp13audio1pmx-gpio-14mpp14gpiopmx-gpio-15mpp15gpiopmx-gpio-16mpp16gpiopmx-gpio-17mpp17gpiopmx-gpio-18mpp18gpiopmx-gpio-19mpp19gpiopmx-gpio-20mpp20gpiopmx-gpio-21mpp21gpiopmx-camera mpp_cameracamerapmx-camera-gpio mpp_cameragpiopmx-sdio0 mpp_sdio0sdio0pmx-sdio0-gpio mpp_sdio0gpiopmx-sdio1 mpp_sdio1sdio1pmx-sdio1-gpio mpp_sdio1gpiopmx-audio1-gpio mpp_audio1gpiopmx-audio1-i2s1-spdifo mpp_audio1 i2s1/spdifopmx-spi0 mpp_spi0spi0 pmx-spi0-gpio mpp_spi0gpiopmx-spi1-4-7mpp4mpp5mpp6mpp7spi1pmx-spi1-20-23mpp20mpp21mpp22mpp23spi1pmx-uart1 mpp_uart1uart1 pmx-uart1-gpio mpp_uart1gpiopmx-nand mpp_nandnandpmx-nand-gpo mpp_nandgpopmx-i2c1 mpp17mpp19twsipmx-i2c2 mpp_audio1twsipmx-ssp-i2c2 mpp_audio1 ssp/twsipmx-i2cmux-0twsi twsi-opt1pmx-i2cmux-1twsi twsi-opt2pmx-i2cmux-2twsi twsi-opt3core-clocks@214marvell,dove-core-clockl gpio-ctrl@400marvell,orion-gpio".l > Q, <gpio-ctrl@420marvell,orion-gpio".l > Q,=real-time-clock@8500marvell,orion-rtcl global-config@e802c"marvell,dove-global-configsysconl,gpio-ctrl@e8400marvell,orion-gpio".l >lcd-controller@810000marvell,dove-lcdl. disabledlcd-controller@820000marvell,dove-lcdl/ disabledsram@ffffe000 mmio-sraml8 gpu@8400008core vivante,gc0El@ disabledmemoryOmemoryl@chosen#Sconsole=ttyS0,115200n8 earlyprintk #address-cells#size-cellscompatiblemodelinterrupt-parentgpio0gpio1gpio2device_typenext-level-cacheregmarvell,tauros2-cache-featuresphandlecoresstatusi2c-parentpinctrl-namespinctrl-0pinctrl-1pinctrl-2controllerpcie-mem-aperturepcie-io-aperturerangesmsi-parentbus-rangeassigned-addressesclocksmarvell,pcie-port#interrupt-cellsinterrupt-map-maskinterrupt-mapcell-indexinterruptsspi-max-frequencyclock-frequencyreg-shiftinterrupt-controllermarvell,#interruptsreg-namesmarvell,crypto-sramsmarvell,crypto-sram-sizedmacap,memcpydmacap,xormarvell,tx-checksum-limitlocal-mac-addressphy-handlephysphy-namesnr-portsclock-names#phy-cells#reset-cells#power-domain-cellsmarvell,pmu_pwr_maskmarvell,pmu_iso_maskresets#clock-cellsmarvell,pinsmarvell,function#gpio-cellsgpio-controllerngpiospower-domainsbootargs