n8h(hT$Ka-Ro electronics TX53 module (LCD)!karo,tx53fsl,imx53chosenaliases$,/soc/bus@60000000/ethernet@63fec000 6/soc/bus@50000000/gpio@53f84000 tsc2007grpDc*iomuxc-gpr@53fa8000!fsl,imx53-iomuxc-gprsysconS cldb@53fa8008!fsl,imx53-ldbS0zxst{U(di0_plldi1_plldi0_seldi1_seldi0di1 disabledlvds-channel@0 disabledport@0endpointc port@2lvds-channel@1 disabledport@1endpointc port@2pwm@53fb4000!fsl,imx53-pwmfsl,imx27-pwmS@@%&ipgper=pwm@53fb8000!fsl,imx53-pwmfsl,imx27-pwmS@'(ipgper^default-c@serial@53fbc000!fsl,imx53-uartfsl,imx21-uartS@ipgper 7"okay defaultgpio-+    xds1339@68!dallas,ds1339hdefault-,-ssi@63fcc000q*!fsl,imx53-ssifsl,imx51-ssifsl,imx21-ssic@0 ipgbaud 72Imdioethernet-phy@0 ethernet-phyc2tve@63ff0000!fsl,imx53-tvec\Et tvedi_sel disabledportendpoint3c vpu@63ff4000!fsl,imx53-vpucnm,coda7541c@ @?perahbU4crypto@63ff8000!fsl,imx53-saharac@ipgahbsram@f8000000 !mmio-sramc4memory@70000000memorypclock-mclk !fixed-clockkxc'gpio-keys !gpio-keysdefault-5power ZPower Button 6`ttleds !gpio-ledsdefault-7user ZHeartbeat  kheartbeatregulator-2v5!regulator-fixed2V5&%&%c%regulator-3v3!regulator-fixed3V32Z2Zc&regulator-can-xcvr!regulator-fixed CAN XCVR2Z2Zdefault-8 -c"regulator-usbh1-vbus!regulator-fixed usbh1_vbusLK@LK@default-9  cregulator-usbotg-vbus!regulator-fixed usbotg_vbusLK@LK@default-: ;csound0!karo,tx53-audio-sgtl5000fsl,imx-audio-sgtl5000tx53-audio-sgtl5000<=8MIC_INMic JackMic JackMic BiasHeadphone JackHP_OUTdisp0!fsl,imx-parallel-displayrgb24default->okayportendpoint?cdisplay-timingsVGAx-5=0I`S`lv ETV570x-5=rIS` lv ET0350xa-@5="I"S`lvET0430xwh-5=I)S`l vET0500x- 5=XIS(`!lv ET0700x- 5=XIS(`!lv ETQ570xd-@5=&IS`lvbacklight!pwm-backlight@ &  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcd2regulator-lcd-pwr!regulator-fixed LCD POWER2Z2Z regulator-lcd-reset!regulator-fixed LCD RESET2Z2Z   #address-cells#size-cellsmodelcompatibleethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2can0can1ipureg-can-xcvrusbh1usbotgdisplaydevice_typeregclocksclock-latencyvoltage-toleranceoperating-pointsportsinterrupt-controller#interrupt-cellsphandle#clock-cellsclock-frequencyinterrupt-parentinterruptsclock-names#phy-cellsstatusrangesresetsremote-endpointreg-namesinterrupt-namesbus-widthcd-gpiosfsl,wp-controllerpinctrl-namespinctrl-0dmasdma-namesuart-has-rtsctscs-gpiosspi-max-frequency#sound-dai-cellsfsl,fifo-depthfsl,usbmiscfsl,usbphyphy_typedr_modedisable-over-currentvbus-supply#index-cellsgpio-controller#gpio-cellslinux,keymapfsl,pinsgpr#pwm-cellsxceiver-supply#reset-cellsVDDA-supplyVDDIO-supplyreset-gpioswake-gpioswakeup-sourceti,x-plate-ohms#dma-cellsfsl,sdma-ram-script-namescl-gpiossda-gpiostrickle-resistor-ohmstrickle-diode-disablenand-bus-widthnand-ecc-modenand-on-flash-bbtphy-modephy-reset-gpiosphy-handlemac-addressiramlabellinux,codelinux,default-triggerregulator-nameregulator-min-microvoltregulator-max-microvoltgpioenable-active-highssi-controlleraudio-codecaudio-routingmux-int-portmux-ext-portinterface-pix-fmthactivevactivehback-porchhsync-lenhfront-porchvback-porchvsync-lenvfront-porchhsync-activevsync-activede-activepixelclk-activepwmspower-supplybrightness-levelsdefault-brightness-levelregulator-boot-on