8(&Wandboard i.MX6 Dual Lite Board revD1!!wand,imx6dl-wandboardfsl,imx6dlchosen1,/soc/bus@2000000/spba-bus@2000000/serial@2020000aliases"8/soc/bus@2100000/ethernet@2188000!B/soc/bus@2000000/flexcan@2090000!G/soc/bus@2000000/flexcan@2094000L/soc/bus@2000000/gpio@209c000R/soc/bus@2000000/gpio@20a0000X/soc/bus@2000000/gpio@20a4000^/soc/bus@2000000/gpio@20a8000d/soc/bus@2000000/gpio@20ac000j/soc/bus@2000000/gpio@20b0000p/soc/bus@2000000/gpio@20b4000v/soc/bus@2100000/i2c@21a0000{/soc/bus@2100000/i2c@21a4000/soc/bus@2100000/i2c@21a8000/soc/ipu@2400000/soc/bus@2100000/mmc@2190000/soc/bus@2100000/mmc@2194000/soc/bus@2100000/mmc@2198000/soc/bus@2100000/mmc@219c0001/soc/bus@2000000/spba-bus@2000000/serial@2020000 /soc/bus@2100000/serial@21e8000 /soc/bus@2100000/serial@21ec000 /soc/bus@2100000/serial@21f0000 /soc/bus@2100000/serial@21f4000./soc/bus@2000000/spba-bus@2000000/spi@2008000./soc/bus@2000000/spba-bus@2000000/spi@200c000./soc/bus@2000000/spba-bus@2000000/spi@2010000./soc/bus@2000000/spba-bus@2000000/spi@2014000 /soc/bus@2000000/usbphy@20c9000 /soc/bus@2000000/usbphy@20ca000/soc/bus@2100000/i2c@21f8000clocksckil!fsl,imx-ckilfixed-clockckih1!fsl,imx-ckih1fixed-clockosc!fsl,imx-oscfixed-clockn6ldb!fsl,imx6q-ldbfsl,imx53-ldb  disabled0!"'((di0_plldi1_plldi0_seldi1_seldi0di1lvds-channel@0* disabledport@0*endpoint.>Qport@1*endpoint.>Ulvds-channel@1* disabledport@0*endpoint.>Rport@1*endpoint.>Vpmu!arm,cortex-a9-pmuF W^usbphynop1!usb-nop-xceivb>*usbphynop2!usb-nop-xceivb>+soc !simple-busFmdma-apbh@110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbh* 0W    tgpmi0gpmi1gpmi2gpmi3j>nand-controller@112000!fsl,imx6q-gpmi-nand* @ gpmi-nandbch Wtbch(0gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-tx disabledhdmi@120000* Ws {| iahbisfrokay!fsl,imx6dl-hdmi port@0*endpoint. >Oport@1*endpoint. >Sgpu@130000 !vivante,gc*@ W zJbuscoreshader gpu@134000 !vivante,gc*@@ W y buscore timer@a00600!arm,cortex-a9-twd-timer*  W F interrupt-controller@a01000!arm,cortex-a9-gic*F > cache-controller@a02000!arm,pl310-cache*  W\  .?>Wpcie@1ffc000!fsl,imx6q-pciesnps,dw-pcie*@ dbiconfigSpci_0mis Wxtmsi{zyxpciepcie_buspcie_phy disabledbus@2000000!fsl,aips-bussimple-bus*mspba-bus@2000000!fsl,spba-bussimple-bus*mspdif@2004000!fsl,imx35-spdif*@@ W4 rxtxPkv>:corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spbaokaydefault>aspi@2008000 !fsl,imx6q-ecspifsl,imx51-ecspi*@ Wppipgper rxtx disabledspi@200c000 !fsl,imx6q-ecspifsl,imx51-ecspi*@ W qqipgper rxtx disabledspi@2010000 !fsl,imx6q-ecspifsl,imx51-ecspi*@ W!rripgper rxtx disabledspi@2014000 !fsl,imx6q-ecspifsl,imx51-ecspi*@@ W"ssipgper   rxtx disabledserial@2020000!fsl,imx6q-uartfsl,imx21-uart*@ Wipgper rxtxokaydefaultesai@2024000!fsl,imx35-esai*@@ W3(vcorememextalfsysspba rxtx disabledssi@2028000!fsl,imx6q-ssifsl,imx51-ssi*@ W. ipgbaud %&rxtxokay>_ssi@202c000!fsl,imx6q-ssifsl,imx51-ssi*@ W/ ipgbaud )*rxtx disabledssi@2030000!fsl,imx6q-ssifsl,imx51-ssi*@ W0 ipgbaud -.rxtx disabledasrc@2034000!fsl,imx53-asrc*@@ W2kmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`rxarxbrxctxatxbtxcokayspba@203c000*@vpu@2040000!fsl,imx6dl-vpucnm,coda960*W  tbitjpegperahb aipstz@207c000*@pwm@2080000!fsl,imx6q-pwmfsl,imx27-pwm*@ WS>ipgper disabledpwm@2084000!fsl,imx6q-pwmfsl,imx27-pwm*@@ WT>ipgper disabledpwm@2088000!fsl,imx6q-pwmfsl,imx27-pwm*@ WU>ipgper disabledpwm@208c000!fsl,imx6q-pwmfsl,imx27-pwm*@ WV>ipgper disabledflexcan@2090000!fsl,imx6q-flexcan* @ Wnlmipgper 4 disabledflexcan@2094000!fsl,imx6q-flexcan* @@ Wonoipgper 4 disabledtimer@2098000!fsl,imx6dl-gpt* @ W7wxipgperosc_pergpio@209c000!fsl,imx6q-gpiofsl,imx35-gpio* @WBC+@7   {y~z>1gpio@20a0000!fsl,imx6q-gpiofsl,imx35-gpio* @WDE+7JIHGFEDOvuqgpio@20a4000!fsl,imx6q-gpiofsl,imx35-gpio* @@WFG+@7ai cQ>.gpio@20a8000!fsl,imx6q-gpiofsl,imx35-gpio* @WHI+7     '8=.>=gpio@20ac000!fsl,imx6q-gpiofsl,imx35-gpio* @WJK+7xML/ 9%$#&gpio@20b0000!fsl,imx6q-gpiofsl,imx35-gpio* @WLM+ 7K   Ngpio@20b4000!fsl,imx6q-gpiofsl,imx35-gpio* @@WNO+7   >ckeypad@20b8000!fsl,imx6q-kppfsl,imx21-kpp* @ WR> disabledwatchdog@20bc000!fsl,imx6q-wdtfsl,imx21-wdt* @ WP>watchdog@20c0000!fsl,imx6q-wdtfsl,imx21-wdt* @ WQ> disabledclock-controller@20c4000!fsl,imx6q-ccm* @@WWX>anatop@20c8000#!fsl,imx6q-anatopsysconsimple-mfd* $W16>regulator-1p1!fsl,anatop-regulatorCvdd1p1RB@jO 5 regulator-3p0!fsl,anatop-regulatorCvdd3p0R*j0 ( 3@ regulator-2p5!fsl,anatop-regulatorCvdd2p5R"Uj)00 +x regulator-vddcore!fsl,anatop-regulatorCvddarmR j @p5L  >Xregulator-vddpu!fsl,anatop-regulatorCvddpuR j c|@ p5L  >regulator-vddsoc!fsl,anatop-regulatorCvddsocR j @p5L  >Ytempmon!fsl,imx6q-tempmonF W1calibtemp_gradeusbphy@20c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy*  W,>%usbphy@20ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy*  W->)snvs@20cc000#!fsl,sec-v4.0-monsysconsimple-mfd* @>snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp4Wsnvs-poweroff!syscon-poweroff8`` disabledsnvs-powerkey!fsl,sec-v4.0-pwrkey Wt disabledsnvs-lpgpr!fsl,imx6q-snvs-lpgprepit@20d0000* @ W8epit@20d4000* @@ W9reset-controller@20d8000!fsl,imx6q-srcfsl,imx51-src* @W[`>gpc@20dc000!fsl,imx6q-gpc* @ WYF >ipg>pgcpower-domain@0*power-domain@1*0zJy> iomuxc-gpr@20e0000'!fsl,imx6q-iomuxc-gprsysconsimple-mfd*8>mux-controller !mmio-mux 83448 (( >ipu1_csi0_mux !video-muxAport@0*endpoint.>Aport@1*endpoint.>Cport@2*endpoint.>Eport@3*endpoint.>Gport@4*endpointport@5*endpoint.>Mipu1_csi1_mux !video-muxAport@0*endpoint.>Bport@1*endpoint. >Dport@2*endpoint.!>Fport@3*endpoint.">Hport@4*endpointport@5*endpoint.#>Npinctrl@20e0000!fsl,imx6dl-iomuxc*@default$>imx6qdl-wandboardaudmuxgrp`N0t0x|0>@enetgrphN000000000 0$0(0>,i2c1grp0NX(h@tDl@>4i2c2grp0NP8p@dLt@>5mclkgrpN 0>6ov5645grpHN(4T<>9spdifgrpN >uart1grp0NL`Pd>uart3grp`Nd4h8 `0 >LusbotggrpNpY>(usbotgvbusgrpN\,0>busdhc1grpNpY (YpYpYpYpY>0usdhc2grpNpY 0YpYpYpYpY>2usdhc3grpNpY  4YpYpYpY pY>3hoggrp`N\,$xH>$i2c3grp0N0x@|@>?dcic@20e4000*@@ W|dcic@20e8000*@ W}sdma@20ec000!fsl,imx6q-sdmafsl,imx35-sdma*@ W>ipgahbWimx/sdma/sdma-imx6q.bin>pxp@20f0000*@ Wbepdc@20f4000*@@ Wabus@2100000!fsl,aips-bussimple-bus*mcrypto@2100000 !fsl,sec-v4.0* m memaclkipgemi_slowjr@1000!fsl,sec-v4.0-job-ring* Wijr@2000!fsl,sec-v4.0-job-ring*  Wjaipstz@217c000*@usb@2184000!fsl,imx6q-usbfsl,imx27-usb*@ W+p%{&okay'default(otgusb@2184200!fsl,imx6q-usbfsl,imx27-usb*B W(p){&hostokayusb@2184400!fsl,imx6q-usbfsl,imx27-usb*D W)p*hsic{&host disabledusb@2184600!fsl,imx6q-usbfsl,imx27-usb*F W*p+hsic{&host disabledusbmisc@2184800!fsl,imx6q-usbmisc*H>&ethernet@2188000!fsl,imx6q-fec*@ tint0ppsWvw uuipgahbptpenet_out  4okaydefault, rgmii-id- .#/mdioethernet-phy@1*.sY@>-mlb@218c000*@$W5u~mmc@2190000!fsl,imx6q-usdhc*@ W ipgahbperDokaydefault0 N1mmc@2194000!fsl,imx6q-usdhc*@@ W ipgahbperDokaydefault2W`mmc@2198000!fsl,imx6q-usdhc*@ W ipgahbperDokaydefault3 N. mmc@219c000!fsl,imx6q-usdhc*@ W ipgahbperD disabledi2c@21a0000!fsl,imx6q-i2cfsl,imx21-i2c*@ W$}okaydefault4i2c@21a4000!fsl,imx6q-i2cfsl,imx21-i2c*@@ W%~okaydefault5> sgtl5000@adefault6 !fsl,sgtl5000* n7z8>`camera@3c !ovti,ov5645default9*<xclkn6:;< 1 =portendpoint.>>Ii2c@21a8000!fsl,imx6q-i2cfsl,imx21-i2c*@ W&okaydefault?pfuze100@8 !fsl,pfuze100*regulatorssw1abRj8jsw1cRj8jsw2R 5j2Zjsw3aRj"sw3bRj"sw4R 5j2ZswbstRLK@jN0vsnvsRB@j-vrefddrvgen1R 5jvgen2R`j`vgen3Rw@j2Zvgen4Rw@j2Zvgen5Rw@j2Zvgen6Rw@j2Zromcp@21ac000*@memory-controller@21b0000!fsl,imx6q-mmdc*@memory-controller@21b4000!fsl,imx6q-mmdc*@@ disabledweim@21b8000!fsl,imx6q-weim*@ W disabledefuse@21bc000!fsl,imx6q-ocotpsyscon*@speed-grade@10*>Zcalib@38*8>temp-grade@20* >tzasc@21d0000*@ Wltzasc@21d4000*@@ Wmaudmux@21d8000"!fsl,imx6q-audmuxfsl,imx31-audmux*@okaydefault@mipi@21dc000!fsl,imx6-mipi-csi2*@Wdea dphyrefpixokayport@1*endpoint@0*.A>endpoint@1*.B>port@2*endpoint@0*.C>endpoint@1*.D> port@3*endpoint@0*.E>endpoint@1*.F>!port@4*endpoint@0*.G>endpoint@1*.H>"port@0*endpoint.I>>mipi@21e0000*@ disabledportsport@0*endpoint.J>Pport@1*endpoint.K>Tvdoa@21e4000!fsl,imx6q-vdoa*@@ Wserial@21e8000!fsl,imx6q-uartfsl,imx21-uart*@ Wipgper rxtx disabledserial@21ec000!fsl,imx6q-uartfsl,imx21-uart*@ Wipgper rxtxokaydefaultLserial@21f0000!fsl,imx6q-uartfsl,imx21-uart*@ Wipgper  rxtx disabledserial@21f4000!fsl,imx6q-uartfsl,imx21-uart*@@ Wipgper !"rxtx disabledi2c@21f8000!fsl,imx6q-i2cfsl,imx21-i2c*@ W#t disabledipu@2400000!fsl,imx6q-ipu*@@W busdi0di1port@0*>[endpoint.M>port@1*>\endpoint.N>#port@2*>]endpoint@0*endpoint@1*.O> endpoint@2*.P>Jendpoint@3*.Q>endpoint@4*.R>port@3*>^endpoint@0*endpoint@1*.S> endpoint@2*.T>Kendpoint@3*.U>endpoint@4*.V>sram@900000 !mmio-sram* m>cpuscpu@0!arm,cortex-a9Scpu*&W72  0H2  al(h)armpll2_pfd2_396msteppll1_swpll1_sysoXzYZ speed_gradecpu@1!arm,cortex-a9Scpu*&W72  0H2  al(h)armpll2_pfd2_396msteppll1_swpll1_sysoXzYcapture-subsystem!fsl,imx-capture-subsystem[\display-subsystem!fsl,imx-display-subsystem]^sound3!fsl,imx6-wandboard-sgtl5000fsl,imx-audio-sgtl5000imx6-wandboard-sgtl5000_`8MIC_INMic JackMic JackMic BiasHeadphone JackHP_OUTsound-spdif!fsl,imx-audio-spdif imx-spdifaregulator-1p5v!regulator-fixedC1P5VR`j`><regulator-1p8v!regulator-fixedC1P8VRw@jw@>:regulator-2p8v!regulator-fixedC2P8VR*j*>;regulator-2p5v!regulator-fixedC2P5VR&%j&%>7regulator-3p3v!regulator-fixedC3P3VR2Zj2Z>8regulator-usbotgvbus!regulator-fixed Cusb_otg_vbusRLK@jLK@defaultb .>'regulator-eth-phy!regulator-fixedCETH_PHYR2Zj2Z c >/memory@10000000Smemory*@ #address-cells#size-cellsmodelcompatiblestdout-pathethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1i2c3#clock-cellsclock-frequencygprstatusclocksclock-namesregremote-endpointphandleinterrupt-parentinterrupts#phy-cellsrangesinterrupt-names#dma-cellsdma-channelsreg-namesdmasdma-namesddc-i2c-buspower-domains#cooling-cells#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridedevice_typebus-rangenum-lanesnum-viewportinterrupt-map-maskinterrupt-mappinctrl-namespinctrl-0#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsfsl,stop-modegpio-controller#gpio-cellsgpio-rangesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,tempmonnvmem-cellsnvmem-cell-names#thermal-sensor-cellsfsl,anatopregmapvaluelinux,keycodewakeup-source#reset-cells#power-domain-cellspower-supply#mux-control-cellsmux-reg-masksmux-controlsfsl,pinsfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_modephy_type#index-cellsphy-modephy-handlephy-reset-gpiosphy-supplyqca,clk-out-frequencybus-widthcd-gpiosno-1-8-vnon-removableVDDA-supplyVDDIO-supplylrclk-strengthvdddo-supplyvdda-supplyvddd-supplyenable-gpiosclock-lanesdata-lanesregulator-boot-onregulator-ramp-delayfsl,weim-cs-gpruart-has-rtsctsnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplypu-supplysoc-supplyportsssi-controlleraudio-codecaudio-routingmux-int-portmux-ext-portspdif-controllerspdif-outgpio