8(4ti,omap3-beagle-xmti,omap3630ti,omap36xxti,omap3 +7TI OMAP3 BeagleBoard xMchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000 {/connector0 /connector1@/ocp@68000000/usbhshost@48064000/ehci@48064800/hub@2/usbether@1cpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuT debugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus +  pinmux@30 ti,omap3-padconfpinctrl-single08+%4EZxdefaultpinmux_uart3_pinsnppinmux_hsusb2_pins0      pinmux_dss_dpi_pins2pinmux_twl4030_pinsAscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clock h mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock  mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clockmcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+%4EZxpinmux_gpio1_pinsApinmux_dss_dpi_pins10  pinmux_twl4030_vpins target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `L!revsyscsyss+ 8Fick+ H ` aes1@0 ti,omap3-aesP S  Xtxrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PL!revsyscsyss+ 8Fick+ H P aes2@0 ti,omap3-aesP SABXtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockbYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockrp}#sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clock "dpll4_x2_ckfixed-factor-clock!corex2_fckfixed-factor-clock"$wkup_l4_ickfixed-factor-clock#Scorex2_d3_fckfixed-factor-clock$corex2_d5_fckfixed-factor-clock$clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockbomap_32k_fck fixed-clockbEvirt_12m_ck fixed-clockbvirt_13m_ck fixed-clockb]@virt_19200000_ck fixed-clockb$virt_26000000_ck fixed-clockbvirt_38_4m_ck fixed-clockbIdpll4_ck@d00ti,omap3-dpll-per-j-type-clock## D 0!dpll4_m2_ck@d48ti,divider-clock!r? H}%dpll4_m2x2_mul_ckfixed-factor-clock%&dpll4_m2x2_ck@d00ti,hsdiv-gate-clock& 'omap_96m_alwon_fckfixed-factor-clock'.dpll3_ck@d00ti,omap3-dpll-core-clock## @ 0dpll3_m3_ck@1140ti,divider-clockr@}(dpll3_m3x2_mul_ckfixed-factor-clock()dpll3_m3x2_ck@d00ti,hsdiv-gate-clock)  *emu_core_alwon_ckfixed-factor-clock*gsys_altclk fixed-clockb3mcbsp_clks fixed-clockb dpll3_m2_ck@d40ti,divider-clockr @} core_ckfixed-factor-clock +dpll1_fck@940ti,divider-clock+r @},dpll1_ck@904ti,omap3-dpll-clock#,  $ @ 4dpll1_x2_ckfixed-factor-clock-dpll1_x2m2_ck@944ti,divider-clock-r D}Acm_96m_fckfixed-factor-clock./omap_96m_fck@d40 ti,mux-clock/# @Jdpll4_m3_ck@e40ti,divider-clock!r @}0dpll4_m3x2_mul_ckfixed-factor-clock01dpll4_m3x2_ck@d00ti,hsdiv-gate-clock1 2omap_54m_fck@d40 ti,mux-clock23 @=cm_96m_d2_fckfixed-factor-clock/4omap_48m_fck@d40 ti,mux-clock43 @5omap_12m_fckfixed-factor-clock5Ldpll4_m4_ck@e40ti,divider-clock!r@}6dpll4_m4x2_mul_ckti,fixed-factor-clock67dpll4_m4x2_ck@d00ti,gate-clock7 dpll4_m5_ck@f40ti,divider-clock!r?@}8dpll4_m5x2_mul_ckti,fixed-factor-clock89dpll4_m5x2_ck@d00ti,hsdiv-gate-clock9 odpll4_m6_ck@1140ti,divider-clock!r?@}:dpll4_m6x2_mul_ckfixed-factor-clock:;dpll4_m6x2_ck@d00ti,hsdiv-gate-clock; <emu_per_alwon_ckfixed-factor-clock<hclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock+ p>clkout2_src_mux_ck@d70ti,composite-mux-clock+#/= p?clkout2_src_ckti,composite-clock>?@sys_clkout2@d70ti,divider-clock@r@ pmpu_ckfixed-factor-clockABarm_fck@924ti,divider-clockB $remu_mpu_alwon_ckfixed-factor-clockBil3_ick@a40ti,divider-clock+r @}Cl4_ick@a40ti,divider-clockCr @}Drm_ick@c40ti,divider-clockDr @}gpt10_gate_fck@a00ti,composite-gate-clock#  Fgpt10_mux_fck@a40ti,composite-mux-clockE# @Ggpt10_fckti,composite-clockFGgpt11_gate_fck@a00ti,composite-gate-clock#  Hgpt11_mux_fck@a40ti,composite-mux-clockE# @Igpt11_fckti,composite-clockHIcore_96m_fckfixed-factor-clockJmmchs2_fck@a00ti,wait-gate-clock mmchs1_fck@a00ti,wait-gate-clock i2c3_fck@a00ti,wait-gate-clock i2c2_fck@a00ti,wait-gate-clock i2c1_fck@a00ti,wait-gate-clock mcbsp5_gate_fck@a00ti,composite-gate-clock    mcbsp1_gate_fck@a00ti,composite-gate-clock    core_48m_fckfixed-factor-clock5Kmcspi4_fck@a00ti,wait-gate-clockK mcspi3_fck@a00ti,wait-gate-clockK mcspi2_fck@a00ti,wait-gate-clockK mcspi1_fck@a00ti,wait-gate-clockK uart2_fck@a00ti,wait-gate-clockK uart1_fck@a00ti,wait-gate-clockK  core_12m_fckfixed-factor-clockLMhdq_fck@a00ti,wait-gate-clockM core_l3_ickfixed-factor-clockCNsdrc_ick@a10ti,wait-gate-clockN gpmc_fckfixed-factor-clockNcore_l4_ickfixed-factor-clockDOmmchs2_ick@a10ti,omap3-interface-clockO mmchs1_ick@a10ti,omap3-interface-clockO hdq_ick@a10ti,omap3-interface-clockO mcspi4_ick@a10ti,omap3-interface-clockO mcspi3_ick@a10ti,omap3-interface-clockO mcspi2_ick@a10ti,omap3-interface-clockO mcspi1_ick@a10ti,omap3-interface-clockO i2c3_ick@a10ti,omap3-interface-clockO i2c2_ick@a10ti,omap3-interface-clockO i2c1_ick@a10ti,omap3-interface-clockO uart2_ick@a10ti,omap3-interface-clockO uart1_ick@a10ti,omap3-interface-clockO  gpt11_ick@a10ti,omap3-interface-clockO  gpt10_ick@a10ti,omap3-interface-clockO  mcbsp5_ick@a10ti,omap3-interface-clockO  mcbsp1_ick@a10ti,omap3-interface-clockO  omapctrl_ick@a10ti,omap3-interface-clockO dss_tv_fck@e00ti,gate-clock=dss_96m_fck@e00ti,gate-clockJdss2_alwon_fck@e00ti,gate-clock#dummy_ck fixed-clockbgpt1_gate_fck@c00ti,composite-gate-clock# Pgpt1_mux_fck@c40ti,composite-mux-clockE# @Qgpt1_fckti,composite-clockPQaes2_ick@a10ti,omap3-interface-clockO wkup_32k_fckfixed-factor-clockERgpio1_dbck@c00ti,gate-clockR sha12_ick@a10ti,omap3-interface-clockO wdt2_fck@c00ti,wait-gate-clockR wdt2_ick@c10ti,omap3-interface-clockS wdt1_ick@c10ti,omap3-interface-clockS gpio1_ick@c10ti,omap3-interface-clockS omap_32ksync_ick@c10ti,omap3-interface-clockS gpt12_ick@c10ti,omap3-interface-clockS gpt1_ick@c10ti,omap3-interface-clockS per_96m_fckfixed-factor-clock.per_48m_fckfixed-factor-clock5Tuart3_fck@1000ti,wait-gate-clockT gpt2_gate_fck@1000ti,composite-gate-clock#Ugpt2_mux_fck@1040ti,composite-mux-clockE#@Vgpt2_fckti,composite-clockUVgpt3_gate_fck@1000ti,composite-gate-clock#Wgpt3_mux_fck@1040ti,composite-mux-clockE#@Xgpt3_fckti,composite-clockWXgpt4_gate_fck@1000ti,composite-gate-clock#Ygpt4_mux_fck@1040ti,composite-mux-clockE#@Zgpt4_fckti,composite-clockYZgpt5_gate_fck@1000ti,composite-gate-clock#[gpt5_mux_fck@1040ti,composite-mux-clockE#@\gpt5_fckti,composite-clock[\gpt6_gate_fck@1000ti,composite-gate-clock#]gpt6_mux_fck@1040ti,composite-mux-clockE#@^gpt6_fckti,composite-clock]^gpt7_gate_fck@1000ti,composite-gate-clock#_gpt7_mux_fck@1040ti,composite-mux-clockE#@`gpt7_fckti,composite-clock_`gpt8_gate_fck@1000ti,composite-gate-clock# agpt8_mux_fck@1040ti,composite-mux-clockE#@bgpt8_fckti,composite-clockabgpt9_gate_fck@1000ti,composite-gate-clock# cgpt9_mux_fck@1040ti,composite-mux-clockE#@dgpt9_fckti,composite-clockcdper_32k_alwon_fckfixed-factor-clockEegpio6_dbck@1000ti,gate-clockegpio5_dbck@1000ti,gate-clockegpio4_dbck@1000ti,gate-clockegpio3_dbck@1000ti,gate-clockegpio2_dbck@1000ti,gate-clocke wdt3_fck@1000ti,wait-gate-clocke per_l4_ickfixed-factor-clockDfgpio6_ick@1010ti,omap3-interface-clockfgpio5_ick@1010ti,omap3-interface-clockfgpio4_ick@1010ti,omap3-interface-clockfgpio3_ick@1010ti,omap3-interface-clockfgpio2_ick@1010ti,omap3-interface-clockf wdt3_ick@1010ti,omap3-interface-clockf uart3_ick@1010ti,omap3-interface-clockf uart4_ick@1010ti,omap3-interface-clockfgpt9_ick@1010ti,omap3-interface-clockf gpt8_ick@1010ti,omap3-interface-clockf gpt7_ick@1010ti,omap3-interface-clockfgpt6_ick@1010ti,omap3-interface-clockfgpt5_ick@1010ti,omap3-interface-clockfgpt4_ick@1010ti,omap3-interface-clockfgpt3_ick@1010ti,omap3-interface-clockfgpt2_ick@1010ti,omap3-interface-clockfmcbsp2_ick@1010ti,omap3-interface-clockfmcbsp3_ick@1010ti,omap3-interface-clockfmcbsp4_ick@1010ti,omap3-interface-clockfmcbsp2_gate_fck@1000ti,composite-gate-clock mcbsp3_gate_fck@1000ti,composite-gate-clock mcbsp4_gate_fck@1000ti,composite-gate-clock emu_src_mux_ck@1140 ti,mux-clock#ghi@jemu_src_ckti,clkdm-gate-clockjkpclk_fck@1140ti,divider-clockkr@}pclkx2_fck@1140ti,divider-clockkr@}atclk_fck@1140ti,divider-clockkr@}traceclk_src_fck@1140 ti,mux-clock#ghi@ltraceclk_fck@1140ti,divider-clockl r@}secure_32k_fck fixed-clockbmgpt12_fckfixed-factor-clockmwdt1_fckfixed-factor-clockmsecurity_l4_ick2fixed-factor-clockDnaes1_ick@a14ti,omap3-interface-clockn rng_ick@a14ti,omap3-interface-clockn sha11_ick@a14ti,omap3-interface-clockn des1_ick@a14ti,omap3-interface-clockn cam_mclk@f00ti,gate-clockocam_ick@f10!ti,omap3-no-wait-interface-clockDcsi2_96m_fck@f00ti,gate-clocksecurity_l3_ickfixed-factor-clockCppka_ick@a14ti,omap3-interface-clockp icr_ick@a10ti,omap3-interface-clockO des2_ick@a10ti,omap3-interface-clockO mspro_ick@a10ti,omap3-interface-clockO mailboxes_ick@a10ti,omap3-interface-clockO ssi_l4_ickfixed-factor-clockDwsr1_fck@c00ti,wait-gate-clock#  sr2_fck@c00ti,wait-gate-clock#  sr_l4_ickfixed-factor-clockDdpll2_fck@40ti,divider-clock+r@}qdpll2_ck@4ti,omap3-dpll-clock#q$@4rdpll2_m2_ck@44ti,divider-clockrrD}siva2_ck@0ti,wait-gate-clocksmodem_fck@a00ti,omap3-interface-clock# sad2d_ick@a10ti,omap3-interface-clockC mad2d_ick@a18ti,omap3-interface-clockC mspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock$ tssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock$ @$1ussi_ssr_fck_3430es2ti,composite-clocktuvssi_sst_fck_3430es2fixed-factor-clockvhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockN ssi_ick_3430es2@a10ti,omap3-ssi-interface-clockw usim_gate_fck@c00ti,composite-gate-clockJ  sys_d2_ckfixed-factor-clock#yomap_96m_d2_fckfixed-factor-clockJzomap_96m_d4_fckfixed-factor-clockJ{omap_96m_d8_fckfixed-factor-clockJ|omap_96m_d10_fckfixed-factor-clockJ }dpll5_m2_d4_ckfixed-factor-clockx~dpll5_m2_d8_ckfixed-factor-clockxdpll5_m2_d16_ckfixed-factor-clockxdpll5_m2_d20_ckfixed-factor-clockxusim_mux_fck@c40ti,composite-mux-clock(#yz{|}~ @}usim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockS  dpll5_ck@d04ti,omap3-dpll-clock##  $ L 4dpll5_m2_ck@d50ti,divider-clockr P}xsgx_gate_fck@b00ti,composite-gate-clock+ core_d3_ckfixed-factor-clock+core_d4_ckfixed-factor-clock+core_d6_ckfixed-factor-clock+omap_192m_alwon_fckfixed-factor-clock'core_d2_ckfixed-factor-clock+sgx_mux_fck@b40ti,composite-mux-clock / @sgx_fckti,composite-clock sgx_ick@b10ti,wait-gate-clockC cpefuse_fck@a08ti,gate-clock# ts_fck@a08ti,gate-clockE usbtll_fck@a08ti,wait-gate-clockx usbtll_ick@a18ti,omap3-interface-clockO mmchs3_ick@a10ti,omap3-interface-clockO mmchs3_fck@a00ti,wait-gate-clock dss1_alwon_fck_3430es2@e00ti,dss-gate-clockdss_ick_3430es2@e10ti,omap3-dss-interface-clockDusbhost_120m_fck@1400ti,gate-clockxusbhost_48m_fck@1400ti,dss-gate-clock5usbhost_ick@1410ti,omap3-dss-interface-clockDuart4_fck@1000ti,wait-gate-clockTclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainkdpll4_clkdmti,clockdomain!wkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainrd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 !revsysc8Rfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intcE4H target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(!revsyscsyss+# = 8FNick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma KV c`gpio@48310000ti,omap3-gpioH1 gpio1pE4defaultgpio@49050000ti,omap3-gpioI gpio2E4gpio@49052000ti,omap3-gpioI  gpio3E4gpio@49054000ti,omap3-gpioI@ gpio4E4gpio@49056000ti,omap3-gpioI` !gpio5E4gpio@49058000ti,omap3-gpioI "gpio6E4serial@4806a000ti,omap3-uartH HS12Xtxrxuart1blserial@4806c000ti,omap3-uartHIS34Xtxrxuart2blserial@49020000ti,omap3-uartIJnS56Xtxrxuart3bldefaulti2c@48070000 ti,omap3-i2cH 8SXtxrx+i2c1b'@twl@48H  fck ti,twl4030E4defaultaudioti,twl4030-audiocodecpower>ti,twl4030-power-beagleboard-xmti,twl4030-power-idle-osc-offrtcti,twl4030-rtc bciti,twl4030-bci  vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2usb_1v8w@w@regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' 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:hdq1wmmc@4809c000ti,omap3-hsmmcH  Smmc1S=>Xtxrx*mmc@480b4000ti,omap3-hsmmcH @ Vmmc2S/0Xtxrx 4disabledmmc@480ad000ti,omap3-hsmmcH  ^mmc3SMNXtxrx 4disabledmmu@480bd400;ti,omap2-iommuH  mmu_ispHmmu@5d000000;ti,omap2-iommu] mmu_iva 4disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@!mpu  ;< Xcommontxrxhmcbsp1S Xtxrxfck 4disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H D!revsyscsyss+8Fick+ H rng@0 ti,omap2-rng  4mcbsp@49022000ti,omap3-mcbspI I !mpusidetone >?Xcommontxrxsidetonehmcbsp2mcbsp2_sidetoneS!"Xtxrxfckick4okaymcbsp@49024000ti,omap3-mcbspI@I !mpusidetone YZXcommontxrxsidetonehmcbsp3mcbsp3_sidetoneSXtxrxfckick 4disabledmcbsp@49026000ti,omap3-mcbspI`!mpu  67 Xcommontxrxhmcbsp4SXtxrxfckw 4disabledmcbsp@48096000ti,omap3-mcbspH `!mpu  QR Xcommontxrxhmcbsp5SXtxrxfck 4disabledsham@480c3000ti,omap3-shamshamH 0d 1SEXrxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1!revsyscsyss+' 8Ffckick+ H1timer@0ti,omap3430-timerfck %Etarget-module@49032000ti,sysc-omap2-timerti,syscI I I !revsyscsyss+' 8Ffckick+ I timer@0ti,omap3430-timer &timer@49034000ti,omap3430-timerI@ 'timer3timer@49036000ti,omap3430-timerI` (timer4timer@49038000ti,omap3430-timerI )timer5timer@4903a000ti,omap3430-timerI *timer6timer@4903c000ti,omap3430-timerI +timer7timer@4903e000ti,omap3430-timerI ,timer8timer@49040000ti,omap3430-timerI -timer9timer@48086000ti,omap3430-timerH` .timer10timer@48088000ti,omap3430-timerH /timer11target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@!revsyscsyss+' 8Ffckick+ H0@timer@0ti,omap3430-timer _usbhstll@48062000 ti,usbhs-tllH  N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ehci-phyohci@48064400ti,ohci-omap3HD Lehci@48064800 ti,ehci-omapHH M*+hub@2 usb424,9514+usbether@1 usb424,ec00gpmc@6e000000ti,omap3430-gpmcgpmcn SXrxtx/;+E4usb_otg_hs@480ab000ti,omap3-musbH  \]Xmcdma usb_otg_hsMX` ix* usb2-phyS2dss@48050000 ti,omap3-dssH4okay dss_corefck+defaultdispc@48050400ti,omap3-dispcH  dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H !protophypll  4disabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH 4disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH 4okay dss_vencfcktv_dac_clkportendpointportendpointssi-controller@48058000 ti,omap3-ssissi4okayHH!sysgdd GXgdd_mpu+ v ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHH!txrx CDssi-port@4805b000ti,omap3-ssi-portHH!txrx EFserial@49042000ti,omap3-uartI  PSQRXtxrxuart4blregulator-abb-mpu ti,abb-v1 abb_mpu_iva+H0rH0h!base-addressint-address#`sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\+%4EZxdefaultpinmux_hsusb2_2_pins0PRT V X Z isp@480bc000 ti,omap3-ispH H   ports+bandgap@48002524H%$ti,omap36xx-bandgap target-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_coreH 8!sysc+ 8 fck+ H smartreflex@0ti,omap3-smartreflex-core target-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaH 8!sysc+ 8 fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-iva target-module@50000000ti,sysc-omap4ti,syscPP !revsysc = 8 fckick+ Popp-tableoperating-points-v2-ti-cpuopp50-30000000029ssssssGXopp100-6000000002#F9OOOOOOGopp130-8000000002/9777777Gopp1g-10000000002;9Gdopp_supplyti,omap-opp-supplyothermal-zonescpu_thermalN  tripscpu_alert8passive cpu_crit_ criticalcooling-mapsmap0  memory@80000000memory oscillator fixed-clockbleds gpio-ledsheartbeatbeagleboard::usr0  heartbeatmmcbeagleboard::usr1 mmc0pwmleds pwm-ledspmu_statbeagleboard::pmu_stat w5soundti,omap-twl4030 ,omap3beagle5gpio_keys gpio-keysuseruser >Ihsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z W\pmhsusb2_phyusb-nop-xceiv Xencoder0 ti,tfp410 ports+port@0endpointport@1endpointconnector0dvi-connectordviportendpointconnector1svideo-connectortvportendpointetb@5401b000"arm,coresight-etb10arm,primecellTk apb_pclkin-portsportendpointetm@54010000"arm,coresight-etm3xarm,primecellTk apb_pclkout-portsportendpoint compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3display0display1ethernetdevice_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedti,use_poweroffbci3v1-supplyio-channelsio-channel-namesregulator-always-onti,use-ledsti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-widthstatus#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdda-supplyremote-endpointti,channelsdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicelabelgpioslinux,default-triggerpwmsmax-brightnessti,modelti,mcbsplinux,codewakeup-sourcegpiostartup-delay-usenable-active-highreset-gpiosvcc-supplypowerdown-gpiosdigitalddc-i2c-bus