,8t(<+compulab,omap3-cm-t3517ti,am3517ti,omap3 +7CompuLab CM-T3517chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@4809e000{/ocp@68000000/can@5c050000cpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+:pinmux_uart3_pinsWnpkpinmux_mmc1_pins0Wkpinmux_green_led_pinsWkpinmux_dss_dpi_pins_commonWkpinmux_dss_dpi_pins_cm_t35x0Wkpinmux_ads7846_pinsWkpinmux_mcspi1_pins Wkpinmux_i2c1_pinsWkpinmux_mcbsp2_pins W kpinmux_hsusb1_phy_reset_pinsWHkpinmux_hsusb2_phy_reset_pinsWJkpinmux_otg_drv_vbusWkpinmux_mmc2_pins0W(*,.02kpinmux_wl12xx_core_pinsWFkpinmux_usb_hub_pinsWTscm_conf@270sysconsimple-busp0+ p0kpbias_regulator@2b0ti,pbias-omap3ti,pbias-omapspbias_mmc_omap2430zpbias_mmc_omap2430w@-kclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhkmcbsp5_fckti,composite-clockkmcbsp1_mux_fck@4ti,composite-mux-clockk mcbsp1_fckti,composite-clock kmcbsp2_mux_fck@4ti,composite-mux-clock k mcbsp2_fckti,composite-clock kmcbsp3_mux_fck@68ti,composite-mux-clock hkmcbsp3_fckti,composite-clockkmcbsp4_mux_fck@68ti,composite-mux-clock hkmcbsp4_fckti,composite-clockkemac_ick@32cti,am35xx-gate-clock,kxemac_fck@32cti,gate-clock, kvpfe_ick@32cti,am35xx-gate-clock,kyvpfe_fck@32cti,gate-clock, hsotgusb_ick_am35xx@32cti,am35xx-gate-clock,kzhsotgusb_fck_am35xx@32cti,gate-clock,k{hecc_ck@32cti,am35xx-gate-clock,k|clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+:pinmux_wl12xx_wkup_pinsWkprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYkosc_sys_ck@d40 ti,mux-clock @ksys_ck@1270ti,divider-clockpksys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clockk dpll4_x2_ckfixed-factor-clockcorex2_fckfixed-factor-clock k!wkup_l4_ickfixed-factor-clockkPcorex2_d3_fckfixed-factor-clock!kqcorex2_d5_fckfixed-factor-clock!krclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockkBvirt_12m_ck fixed-clockkvirt_13m_ck fixed-clock]@kvirt_19200000_ck fixed-clock$kvirt_26000000_ck fixed-clockkvirt_38_4m_ck fixed-clockIkdpll4_ck@d00ti,omap3-dpll-per-clock D 0kdpll4_m2_ck@d48ti,divider-clock? Hk"dpll4_m2x2_mul_ckfixed-factor-clock"k#dpll4_m2x2_ck@d00ti,gate-clock# k$omap_96m_alwon_fckfixed-factor-clock$k+dpll3_ck@d00ti,omap3-dpll-core-clock @ 0kdpll3_m3_ck@1140ti,divider-clock@k%dpll3_m3x2_mul_ckfixed-factor-clock%k&dpll3_m3x2_ck@d00ti,gate-clock&  k'emu_core_alwon_ckfixed-factor-clock'kdsys_altclk fixed-clockk0mcbsp_clks fixed-clockkdpll3_m2_ck@d40ti,divider-clock @kcore_ckfixed-factor-clockk(dpll1_fck@940ti,divider-clock( @k)dpll1_ck@904ti,omap3-dpll-clock)  $ @ 4kdpll1_x2_ckfixed-factor-clockk*dpll1_x2m2_ck@944ti,divider-clock* Dk>cm_96m_fckfixed-factor-clock+k,omap_96m_fck@d40 ti,mux-clock, @kGdpll4_m3_ck@e40ti,divider-clock @k-dpll4_m3x2_mul_ckfixed-factor-clock-k.dpll4_m3x2_ck@d00ti,gate-clock. k/omap_54m_fck@d40 ti,mux-clock/0 @k:cm_96m_d2_fckfixed-factor-clock,k1omap_48m_fck@d40 ti,mux-clock10 @k2omap_12m_fckfixed-factor-clock2kIdpll4_m4_ck@e40ti,divider-clock@k3dpll4_m4x2_mul_ckti,fixed-factor-clock30>Kk4dpll4_m4x2_ck@d00ti,gate-clock4 Kkvdpll4_m5_ck@f40ti,divider-clock?@k5dpll4_m5x2_mul_ckti,fixed-factor-clock50>Kk6dpll4_m5x2_ck@d00ti,gate-clock6 Kdpll4_m6_ck@1140ti,divider-clock?@k7dpll4_m6x2_mul_ckfixed-factor-clock7k8dpll4_m6x2_ck@d00ti,gate-clock8 k9emu_per_alwon_ckfixed-factor-clock9keclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock( pk;clkout2_src_mux_ck@d70ti,composite-mux-clock(,: pk<clkout2_src_ckti,composite-clock;<k=sys_clkout2@d70ti,divider-clock=@ p^mpu_ckfixed-factor-clock>k?arm_fck@924ti,divider-clock? $emu_mpu_alwon_ckfixed-factor-clock?kfl3_ick@a40ti,divider-clock( @k@l4_ick@a40ti,divider-clock@ @kArm_ick@c40ti,divider-clockA @gpt10_gate_fck@a00ti,composite-gate-clock  kCgpt10_mux_fck@a40ti,composite-mux-clockB @kDgpt10_fckti,composite-clockCDgpt11_gate_fck@a00ti,composite-gate-clock  kEgpt11_mux_fck@a40ti,composite-mux-clockB @kFgpt11_fckti,composite-clockEFcore_96m_fckfixed-factor-clockGkmmchs2_fck@a00ti,wait-gate-clock kmmchs1_fck@a00ti,wait-gate-clock ki2c3_fck@a00ti,wait-gate-clock ki2c2_fck@a00ti,wait-gate-clock ki2c1_fck@a00ti,wait-gate-clock kmcbsp5_gate_fck@a00ti,composite-gate-clock  kmcbsp1_gate_fck@a00ti,composite-gate-clock  k core_48m_fckfixed-factor-clock2kHmcspi4_fck@a00ti,wait-gate-clockH kmcspi3_fck@a00ti,wait-gate-clockH kmcspi2_fck@a00ti,wait-gate-clockH kmcspi1_fck@a00ti,wait-gate-clockH kuart2_fck@a00ti,wait-gate-clockH kuart1_fck@a00ti,wait-gate-clockH  kcore_12m_fckfixed-factor-clockIkJhdq_fck@a00ti,wait-gate-clockJ kcore_l3_ickfixed-factor-clock@kKsdrc_ick@a10ti,wait-gate-clockK kwgpmc_fckfixed-factor-clockKcore_l4_ickfixed-factor-clockAkLmmchs2_ick@a10ti,omap3-interface-clockL kmmchs1_ick@a10ti,omap3-interface-clockL khdq_ick@a10ti,omap3-interface-clockL kmcspi4_ick@a10ti,omap3-interface-clockL kmcspi3_ick@a10ti,omap3-interface-clockL kmcspi2_ick@a10ti,omap3-interface-clockL kmcspi1_ick@a10ti,omap3-interface-clockL ki2c3_ick@a10ti,omap3-interface-clockL ki2c2_ick@a10ti,omap3-interface-clockL ki2c1_ick@a10ti,omap3-interface-clockL kuart2_ick@a10ti,omap3-interface-clockL kuart1_ick@a10ti,omap3-interface-clockL  kgpt11_ick@a10ti,omap3-interface-clockL  kgpt10_ick@a10ti,omap3-interface-clockL  kmcbsp5_ick@a10ti,omap3-interface-clockL  kmcbsp1_ick@a10ti,omap3-interface-clockL  komapctrl_ick@a10ti,omap3-interface-clockL kdss_tv_fck@e00ti,gate-clock:kdss_96m_fck@e00ti,gate-clockGkdss2_alwon_fck@e00ti,gate-clockkdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock kMgpt1_mux_fck@c40ti,composite-mux-clockB @kNgpt1_fckti,composite-clockMNkaes2_ick@a10ti,omap3-interface-clockL kwkup_32k_fckfixed-factor-clockBkOgpio1_dbck@c00ti,gate-clockO ksha12_ick@a10ti,omap3-interface-clockL kwdt2_fck@c00ti,wait-gate-clockO kwdt2_ick@c10ti,omap3-interface-clockP kwdt1_ick@c10ti,omap3-interface-clockP kgpio1_ick@c10ti,omap3-interface-clockP komap_32ksync_ick@c10ti,omap3-interface-clockP kgpt12_ick@c10ti,omap3-interface-clockP kgpt1_ick@c10ti,omap3-interface-clockP kper_96m_fckfixed-factor-clock+k per_48m_fckfixed-factor-clock2kQuart3_fck@1000ti,wait-gate-clockQ k}gpt2_gate_fck@1000ti,composite-gate-clockkRgpt2_mux_fck@1040ti,composite-mux-clockB@kSgpt2_fckti,composite-clockRSkgpt3_gate_fck@1000ti,composite-gate-clockkTgpt3_mux_fck@1040ti,composite-mux-clockB@kUgpt3_fckti,composite-clockTUgpt4_gate_fck@1000ti,composite-gate-clockkVgpt4_mux_fck@1040ti,composite-mux-clockB@kWgpt4_fckti,composite-clockVWgpt5_gate_fck@1000ti,composite-gate-clockkXgpt5_mux_fck@1040ti,composite-mux-clockB@kYgpt5_fckti,composite-clockXYgpt6_gate_fck@1000ti,composite-gate-clockkZgpt6_mux_fck@1040ti,composite-mux-clockB@k[gpt6_fckti,composite-clockZ[gpt7_gate_fck@1000ti,composite-gate-clockk\gpt7_mux_fck@1040ti,composite-mux-clockB@k]gpt7_fckti,composite-clock\]gpt8_gate_fck@1000ti,composite-gate-clock k^gpt8_mux_fck@1040ti,composite-mux-clockB@k_gpt8_fckti,composite-clock^_gpt9_gate_fck@1000ti,composite-gate-clock k`gpt9_mux_fck@1040ti,composite-mux-clockB@kagpt9_fckti,composite-clock`aper_32k_alwon_fckfixed-factor-clockBkbgpio6_dbck@1000ti,gate-clockbk~gpio5_dbck@1000ti,gate-clockbkgpio4_dbck@1000ti,gate-clockbkgpio3_dbck@1000ti,gate-clockbkgpio2_dbck@1000ti,gate-clockb kwdt3_fck@1000ti,wait-gate-clockb kper_l4_ickfixed-factor-clockAkcgpio6_ick@1010ti,omap3-interface-clockckgpio5_ick@1010ti,omap3-interface-clockckgpio4_ick@1010ti,omap3-interface-clockckgpio3_ick@1010ti,omap3-interface-clockckgpio2_ick@1010ti,omap3-interface-clockc kwdt3_ick@1010ti,omap3-interface-clockc kuart3_ick@1010ti,omap3-interface-clockc kuart4_ick@1010ti,omap3-interface-clockckgpt9_ick@1010ti,omap3-interface-clockc kgpt8_ick@1010ti,omap3-interface-clockc kgpt7_ick@1010ti,omap3-interface-clockckgpt6_ick@1010ti,omap3-interface-clockckgpt5_ick@1010ti,omap3-interface-clockckgpt4_ick@1010ti,omap3-interface-clockckgpt3_ick@1010ti,omap3-interface-clockckgpt2_ick@1010ti,omap3-interface-clockckmcbsp2_ick@1010ti,omap3-interface-clockckmcbsp3_ick@1010ti,omap3-interface-clockckmcbsp4_ick@1010ti,omap3-interface-clockckmcbsp2_gate_fck@1000ti,composite-gate-clockk mcbsp3_gate_fck@1000ti,composite-gate-clockkmcbsp4_gate_fck@1000ti,composite-gate-clockkemu_src_mux_ck@1140 ti,mux-clockdef@kgemu_src_ckti,clkdm-gate-clockgkhpclk_fck@1140ti,divider-clockh@pclkx2_fck@1140ti,divider-clockh@atclk_fck@1140ti,divider-clockh@traceclk_src_fck@1140 ti,mux-clockdef@kitraceclk_fck@1140ti,divider-clocki @secure_32k_fck fixed-clockkjgpt12_fckfixed-factor-clockjkwdt1_fckfixed-factor-clockjipss_ick@a10ti,am35xx-interface-clockK krmii_ck fixed-clockkpclk_ck fixed-clockkuart4_ick_am35xx@a10ti,omap3-interface-clockL uart4_fck_am35xx@a00ti,wait-gate-clockH dpll5_ck@d04ti,omap3-dpll-clock  $ L 4tkkdpll5_m2_ck@d50ti,divider-clockk Pkusgx_gate_fck@b00ti,composite-gate-clock( kscore_d3_ckfixed-factor-clock(klcore_d4_ckfixed-factor-clock(kmcore_d6_ckfixed-factor-clock(knomap_192m_alwon_fckfixed-factor-clock$kocore_d2_ckfixed-factor-clock(kpsgx_mux_fck@b40ti,composite-mux-clock lmn,opqr @ktsgx_fckti,composite-clockstksgx_ick@b10ti,wait-gate-clock@ kcpefuse_fck@a08ti,gate-clock kts_fck@a08ti,gate-clockB kusbtll_fck@a08ti,wait-gate-clocku kusbtll_ick@a18ti,omap3-interface-clockL kmmchs3_ick@a10ti,omap3-interface-clockL kmmchs3_fck@a00ti,wait-gate-clock kdss1_alwon_fck_3430es2@e00ti,dss-gate-clockvKkdss_ick_3430es2@e10ti,omap3-dss-interface-clockAkusbhost_120m_fck@1400ti,gate-clockukusbhost_48m_fck@1400ti,dss-gate-clock2kusbhost_ick@1410ti,omap3-dss-interface-clockAkclockdomainscore_l3_clkdmti,clockdomainwxyz{|dpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainh}~emu_clkdmti,clockdomainhdpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaindpll5_clkdmti,clockdomainksgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscOfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intcH ktarget-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss#  Kick+ H`dma-controller@0ti,omap3430-sdmati,omap-sdma  `kgpio@48310000ti,omap3-gpioH1gpio1kgpio@49050000ti,omap3-gpioIgpio2kgpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4gpio@49056000ti,omap3-gpioI`!gpio5kgpio@49058000ti,omap3-gpioI"gpio6kserial@4806a000ti,omap3-uartH !H512:txrxuart1lserial@4806c000ti,omap3-uartH!I534:txrxuart2lserial@49020000ti,omap3-uartI!J556:txrxuart3lDdefaultRi2c@48070000 ti,omap3-i2cH85:txrx+i2c1DdefaultRat24@50 atmel,24c02\Pi2c@48072000 ti,omap3-i2cH 95:txrx+i2c2i2c@48060000 ti,omap3-i2cH=5:txrx+i2c3mailbox@48094000ti,omap3-mailboxmailboxH @eq disableddsp  spi@48098000ti,omap2-mcspiH A+mcspi1@5#$%&'()* :tx0rx0tx1rx1tx2rx2tx3rx3DdefaultRads7846@0DdefaultR ti,ads7846`  '7 GWspi@4809a000ti,omap2-mcspiH B+mcspi2 5+,-.:tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3 5:tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi45FG:tx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1e5=>:txrxrDdefaultRmmc@480b4000ti,omap3-hsmmcH @Vmmc25/0:txrxDdefaultR+wlcore@2 ti,wl1271 Immc@480ad000ti,omap3-hsmmcH ^mmc35MN:txrx disabledmmu@480bd400ti,omap2-iommuH mmu_isp disabledmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp15 :txrxfck disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyssick+ H  disabledrng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone5!":txrxfckickokayDdefaultRmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetone5:txrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp45:txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp55:txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d15E:rxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss' fckick+ H1$8timer@0ti,omap3430-timerfck%CRbtarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss' fckick+ I $8timer@0ti,omap3430-timer&Rbtimer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5ytimer@4903a000ti,omap3430-timerI*timer6ytimer@4903c000ti,omap3430-timerI+timer7ytimer@4903e000ti,omap3430-timerI,timer8ytimer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss' fckick+ H0@timer@0ti,omap3430-timer_Cusbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ehci-phy ehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcn5:rxtx+0knand@0,0ti,omap2-nand  sw%3xExWfxyxZZH< xx+=Z+partition@0Uxloaderpartition@80000Uubootpartition@260000Uuboot environment&partition@2a0000Ulinux*@partition@6a0000Urootfsjusb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs[fn  disableddss@48050000 ti,omap3-dssHokay dss_corefck+DdefaultRdispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH okay dss_vencfckportendpointwkssi-controller@48058000 ti,omap3-ssissi disabledHHsysgddGgdd_mpu+ssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFam35x_otg_hs@5c040000ti,omap3-musb am35x_otg_hsokay\GmcDdefaultRethernet@5c000000ti,am3517-emac davinci_emacokay\CDEFs xickmdio@5c030000ti,davinci_mdio davinci_mdiookay\&B@+fckserial@4809e000ti,omap3-uartuart4 disabledH T576:txrxlpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+:can@5c050000ti,am3517-hecc disabled\\0\ hecchecc-rammbx|target-module@50000000ti,sysc-omap2ti,syscPrevfckick+ P@opp-tableoperating-points-v2-ti-cpuskopp50-300000000/6ODUopp100-600000000/#F6ODmemory@80000000memoryleds gpio-ledsDdefaultRledb Ucm-t3x:green a gheartbeathsusb1_power_regregulator-fixed zhsusb1_vbus2Z2Z}pkhsusb2_power_regregulator-fixed zhsusb2_vbus2Z2Z}pkhsusb1_phyusb-nop-xceivDdefaultR khsusb2_phyusb-nop-xceivDdefaultR kads7846-regregulator-fixed zads7846-reg2Z2Zksvideo-connectorsvideo-connectorUtvportendpointwkregulator-vmmcregulator-fixedzvmmc2Z2Zkwl12xx_vmmc2regulator-fixedzvw1271DdefaultRw@w@ }N kwl12xx_vaux2regulator-fixedzvwl1271_vaux2w@w@k compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3candevice_typeregclocksclock-namesclock-latencyoperating-points-v2interruptsti,hwmodsstatusranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockreg-namesti,sysc-sidleti,sysc-maskti,sysc-midleti,syss-mask#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendeddmasdma-namespinctrl-namespinctrl-0pagesize#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltpbias-supplybus-widthvmmc-supplyvqmmc-supplynon-removablecap-power-off-cardref-clock-frequency#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelmultipointnum-epsram-bitsremote-endpointti,channelsti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freqopp-hzopp-microvoltopp-supported-hwopp-suspendgpioslinux,default-triggerstartup-delay-us#phy-cellsreset-gpiosenable-active-high