8('amazon,omap3-echoti,omap3630ti,omap3 +7Amazon Echo (first generation)chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8{cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus +  pinmux@30 ti,omap3-padconfpinctrl-single08+ *?]pinmux_tps_pinszwpinmux_button_pinszpinmux_mmc1_pins0zpinmux_mmc2_pinsPz(*,.02468:scm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clockmcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ *?]target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss ick+ H ` aes1@0 ti,omap3-aesP   %txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss ick+ H P aes2@0 ti,omap3-aesP AB%txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clock/Yosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clock?pJ"sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockaldpll3_m2x2_ckfixed-factor-clockal!dpll4_x2_ckfixed-factor-clock alcorex2_fckfixed-factor-clock!al#wkup_l4_ickfixed-factor-clock"alRcorex2_d3_fckfixed-factor-clock#alcorex2_d5_fckfixed-factor-clock#alclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clock/omap_32k_fck fixed-clock/Dvirt_12m_ck fixed-clock/virt_13m_ck fixed-clock/]@virt_19200000_ck fixed-clock/$virt_26000000_ck fixed-clock/virt_38_4m_ck fixed-clock/Idpll4_ck@d00ti,omap3-dpll-per-j-type-clock"" D 0 dpll4_m2_ck@d48ti,divider-clock ?? HJ$dpll4_m2x2_mul_ckfixed-factor-clock$al%dpll4_m2x2_ck@d00ti,hsdiv-gate-clock% v&omap_96m_alwon_fckfixed-factor-clock&al-dpll3_ck@d00ti,omap3-dpll-core-clock"" @ 0dpll3_m3_ck@1140ti,divider-clock?@J'dpll3_m3x2_mul_ckfixed-factor-clock'al(dpll3_m3x2_ck@d00ti,hsdiv-gate-clock(  v)emu_core_alwon_ckfixed-factor-clock)alfsys_altclk fixed-clock/2mcbsp_clks fixed-clock/dpll3_m2_ck@d40ti,divider-clock? @Jcore_ckfixed-factor-clockal*dpll1_fck@940ti,divider-clock*? @J+dpll1_ck@904ti,omap3-dpll-clock"+  $ @ 4dpll1_x2_ckfixed-factor-clockal,dpll1_x2m2_ck@944ti,divider-clock,? DJ@cm_96m_fckfixed-factor-clock-al.omap_96m_fck@d40 ti,mux-clock." @Idpll4_m3_ck@e40ti,divider-clock ? @J/dpll4_m3x2_mul_ckfixed-factor-clock/al0dpll4_m3x2_ck@d00ti,hsdiv-gate-clock0 v1omap_54m_fck@d40 ti,mux-clock12 @<cm_96m_d2_fckfixed-factor-clock.al3omap_48m_fck@d40 ti,mux-clock32 @4omap_12m_fckfixed-factor-clock4alKdpll4_m4_ck@e40ti,divider-clock ?@J5dpll4_m4x2_mul_ckti,fixed-factor-clock56dpll4_m4x2_ck@d00ti,gate-clock6 vdpll4_m5_ck@f40ti,divider-clock ??@J7dpll4_m5x2_mul_ckti,fixed-factor-clock78dpll4_m5x2_ck@d00ti,hsdiv-gate-clock8 vndpll4_m6_ck@1140ti,divider-clock ??@J9dpll4_m6x2_mul_ckfixed-factor-clock9al:dpll4_m6x2_ck@d00ti,hsdiv-gate-clock: v;emu_per_alwon_ckfixed-factor-clock;algclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock* p=clkout2_src_mux_ck@d70ti,composite-mux-clock*".< p>clkout2_src_ckti,composite-clock=>?sys_clkout2@d70ti,divider-clock??@ pmpu_ckfixed-factor-clock@alAarm_fck@924ti,divider-clockA $?emu_mpu_alwon_ckfixed-factor-clockAalhl3_ick@a40ti,divider-clock*? @JBl4_ick@a40ti,divider-clockB? @JCrm_ick@c40ti,divider-clockC? @Jgpt10_gate_fck@a00ti,composite-gate-clock"  Egpt10_mux_fck@a40ti,composite-mux-clockD" @Fgpt10_fckti,composite-clockEFgpt11_gate_fck@a00ti,composite-gate-clock"  Ggpt11_mux_fck@a40ti,composite-mux-clockD" @Hgpt11_fckti,composite-clockGHcore_96m_fckfixed-factor-clockIalmmchs2_fck@a00ti,wait-gate-clock mmchs1_fck@a00ti,wait-gate-clock i2c3_fck@a00ti,wait-gate-clock i2c2_fck@a00ti,wait-gate-clock i2c1_fck@a00ti,wait-gate-clock mcbsp5_gate_fck@a00ti,composite-gate-clock   mcbsp1_gate_fck@a00ti,composite-gate-clock   core_48m_fckfixed-factor-clock4alJmcspi4_fck@a00ti,wait-gate-clockJ mcspi3_fck@a00ti,wait-gate-clockJ mcspi2_fck@a00ti,wait-gate-clockJ mcspi1_fck@a00ti,wait-gate-clockJ uart2_fck@a00ti,wait-gate-clockJ uart1_fck@a00ti,wait-gate-clockJ  core_12m_fckfixed-factor-clockKalLhdq_fck@a00ti,wait-gate-clockL core_l3_ickfixed-factor-clockBalMsdrc_ick@a10ti,wait-gate-clockM gpmc_fckfixed-factor-clockMalcore_l4_ickfixed-factor-clockCalNmmchs2_ick@a10ti,omap3-interface-clockN mmchs1_ick@a10ti,omap3-interface-clockN hdq_ick@a10ti,omap3-interface-clockN mcspi4_ick@a10ti,omap3-interface-clockN mcspi3_ick@a10ti,omap3-interface-clockN mcspi2_ick@a10ti,omap3-interface-clockN mcspi1_ick@a10ti,omap3-interface-clockN i2c3_ick@a10ti,omap3-interface-clockN i2c2_ick@a10ti,omap3-interface-clockN i2c1_ick@a10ti,omap3-interface-clockN uart2_ick@a10ti,omap3-interface-clockN uart1_ick@a10ti,omap3-interface-clockN  gpt11_ick@a10ti,omap3-interface-clockN  gpt10_ick@a10ti,omap3-interface-clockN  mcbsp5_ick@a10ti,omap3-interface-clockN  mcbsp1_ick@a10ti,omap3-interface-clockN  omapctrl_ick@a10ti,omap3-interface-clockN dss_tv_fck@e00ti,gate-clock<dss_96m_fck@e00ti,gate-clockIdss2_alwon_fck@e00ti,gate-clock"dummy_ck fixed-clock/gpt1_gate_fck@c00ti,composite-gate-clock" Ogpt1_mux_fck@c40ti,composite-mux-clockD" @Pgpt1_fckti,composite-clockOPaes2_ick@a10ti,omap3-interface-clockN wkup_32k_fckfixed-factor-clockDalQgpio1_dbck@c00ti,gate-clockQ sha12_ick@a10ti,omap3-interface-clockN wdt2_fck@c00ti,wait-gate-clockQ wdt2_ick@c10ti,omap3-interface-clockR wdt1_ick@c10ti,omap3-interface-clockR gpio1_ick@c10ti,omap3-interface-clockR omap_32ksync_ick@c10ti,omap3-interface-clockR gpt12_ick@c10ti,omap3-interface-clockR gpt1_ick@c10ti,omap3-interface-clockR per_96m_fckfixed-factor-clock-al per_48m_fckfixed-factor-clock4alSuart3_fck@1000ti,wait-gate-clockS gpt2_gate_fck@1000ti,composite-gate-clock"Tgpt2_mux_fck@1040ti,composite-mux-clockD"@Ugpt2_fckti,composite-clockTUgpt3_gate_fck@1000ti,composite-gate-clock"Vgpt3_mux_fck@1040ti,composite-mux-clockD"@Wgpt3_fckti,composite-clockVWgpt4_gate_fck@1000ti,composite-gate-clock"Xgpt4_mux_fck@1040ti,composite-mux-clockD"@Ygpt4_fckti,composite-clockXYgpt5_gate_fck@1000ti,composite-gate-clock"Zgpt5_mux_fck@1040ti,composite-mux-clockD"@[gpt5_fckti,composite-clockZ[gpt6_gate_fck@1000ti,composite-gate-clock"\gpt6_mux_fck@1040ti,composite-mux-clockD"@]gpt6_fckti,composite-clock\]gpt7_gate_fck@1000ti,composite-gate-clock"^gpt7_mux_fck@1040ti,composite-mux-clockD"@_gpt7_fckti,composite-clock^_gpt8_gate_fck@1000ti,composite-gate-clock" `gpt8_mux_fck@1040ti,composite-mux-clockD"@agpt8_fckti,composite-clock`agpt9_gate_fck@1000ti,composite-gate-clock" bgpt9_mux_fck@1040ti,composite-mux-clockD"@cgpt9_fckti,composite-clockbcper_32k_alwon_fckfixed-factor-clockDaldgpio6_dbck@1000ti,gate-clockdgpio5_dbck@1000ti,gate-clockdgpio4_dbck@1000ti,gate-clockdgpio3_dbck@1000ti,gate-clockdgpio2_dbck@1000ti,gate-clockd wdt3_fck@1000ti,wait-gate-clockd per_l4_ickfixed-factor-clockCalegpio6_ick@1010ti,omap3-interface-clockegpio5_ick@1010ti,omap3-interface-clockegpio4_ick@1010ti,omap3-interface-clockegpio3_ick@1010ti,omap3-interface-clockegpio2_ick@1010ti,omap3-interface-clocke wdt3_ick@1010ti,omap3-interface-clocke uart3_ick@1010ti,omap3-interface-clocke uart4_ick@1010ti,omap3-interface-clockegpt9_ick@1010ti,omap3-interface-clocke gpt8_ick@1010ti,omap3-interface-clocke gpt7_ick@1010ti,omap3-interface-clockegpt6_ick@1010ti,omap3-interface-clockegpt5_ick@1010ti,omap3-interface-clockegpt4_ick@1010ti,omap3-interface-clockegpt3_ick@1010ti,omap3-interface-clockegpt2_ick@1010ti,omap3-interface-clockemcbsp2_ick@1010ti,omap3-interface-clockemcbsp3_ick@1010ti,omap3-interface-clockemcbsp4_ick@1010ti,omap3-interface-clockemcbsp2_gate_fck@1000ti,composite-gate-clockmcbsp3_gate_fck@1000ti,composite-gate-clockmcbsp4_gate_fck@1000ti,composite-gate-clockemu_src_mux_ck@1140 ti,mux-clock"fgh@iemu_src_ckti,clkdm-gate-clockijpclk_fck@1140ti,divider-clockj?@Jpclkx2_fck@1140ti,divider-clockj?@Jatclk_fck@1140ti,divider-clockj?@Jtraceclk_src_fck@1140 ti,mux-clock"fgh@ktraceclk_fck@1140ti,divider-clockk ?@Jsecure_32k_fck fixed-clock/lgpt12_fckfixed-factor-clocklalwdt1_fckfixed-factor-clocklalsecurity_l4_ick2fixed-factor-clockCalmaes1_ick@a14ti,omap3-interface-clockm rng_ick@a14ti,omap3-interface-clockm sha11_ick@a14ti,omap3-interface-clockm des1_ick@a14ti,omap3-interface-clockm cam_mclk@f00ti,gate-clockncam_ick@f10!ti,omap3-no-wait-interface-clockCcsi2_96m_fck@f00ti,gate-clocksecurity_l3_ickfixed-factor-clockBalopka_ick@a14ti,omap3-interface-clocko icr_ick@a10ti,omap3-interface-clockN des2_ick@a10ti,omap3-interface-clockN mspro_ick@a10ti,omap3-interface-clockN mailboxes_ick@a10ti,omap3-interface-clockN ssi_l4_ickfixed-factor-clockCalvsr1_fck@c00ti,wait-gate-clock" sr2_fck@c00ti,wait-gate-clock" sr_l4_ickfixed-factor-clockCaldpll2_fck@40ti,divider-clock*?@Jpdpll2_ck@4ti,omap3-dpll-clock"p$@4qdpll2_m2_ck@44ti,divider-clockq?DJriva2_ck@0ti,wait-gate-clockrmodem_fck@a00ti,omap3-interface-clock" sad2d_ick@a10ti,omap3-interface-clockB mad2d_ick@a18ti,omap3-interface-clockB mspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock# sssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock# @$tssi_ssr_fck_3430es2ti,composite-clockstussi_sst_fck_3430es2fixed-factor-clockualhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockM ssi_ick_3430es2@a10ti,omap3-ssi-interface-clockv usim_gate_fck@c00ti,composite-gate-clockI  sys_d2_ckfixed-factor-clock"alxomap_96m_d2_fckfixed-factor-clockIalyomap_96m_d4_fckfixed-factor-clockIalzomap_96m_d8_fckfixed-factor-clockIal{omap_96m_d10_fckfixed-factor-clockIal |dpll5_m2_d4_ckfixed-factor-clockwal}dpll5_m2_d8_ckfixed-factor-clockwal~dpll5_m2_d16_ckfixed-factor-clockwaldpll5_m2_d20_ckfixed-factor-clockwalusim_mux_fck@c40ti,composite-mux-clock("xyz{|}~ @Jusim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockR  dpll5_ck@d04ti,omap3-dpll-clock""  $ L 4dpll5_m2_ck@d50ti,divider-clock? PJwsgx_gate_fck@b00ti,composite-gate-clock* core_d3_ckfixed-factor-clock*alcore_d4_ckfixed-factor-clock*alcore_d6_ckfixed-factor-clock*alomap_192m_alwon_fckfixed-factor-clock&alcore_d2_ckfixed-factor-clock*alsgx_mux_fck@b40ti,composite-mux-clock . @sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clockB cpefuse_fck@a08ti,gate-clock" ts_fck@a08ti,gate-clockD usbtll_fck@a08ti,wait-gate-clockw usbtll_ick@a18ti,omap3-interface-clockN mmchs3_ick@a10ti,omap3-interface-clockN mmchs3_fck@a00ti,wait-gate-clock dss1_alwon_fck_3430es2@e00ti,dss-gate-clockdss_ick_3430es2@e10ti,omap3-dss-interface-clockCusbhost_120m_fck@1400ti,gate-clockwusbhost_48m_fck@1400ti,dss-gate-clock4usbhost_ick@1410ti,omap3-dss-interface-clockCuart4_fck@1000ti,wait-gate-clockSclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainjdpll4_clkdmti,clockdomain wkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainqd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscQfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intc*H target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss#   Mick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma # 0`gpio@48310000ti,omap3-gpioH1gpio1=O_*gpio@49050000ti,omap3-gpioIgpio2O_*gpio@49052000ti,omap3-gpioI gpio3O_*gpio@49054000ti,omap3-gpioI@ gpio4O_*gpio@49056000ti,omap3-gpioI`!gpio5O_*gpio@49058000ti,omap3-gpioI"gpio6O_*serial@4806a000ti,omap3-uartH kH 12%txrxuart1/lserial@4806c000ti,omap3-uartHkI 34%txrxuart2/lserial@49020000ti,omap3-uartIkJ 56%txrxuart3/li2c@48070000 ti,omap3-i2cH8 %txrx+i2c1/tps@2d- ti,tps65910default  regulators+regulator@0$vrtcregulator@1$viow@w@9regulator@2$vdd1vdd_mpu '`M9regulator@3$vdd2vdd_dsp '`9regulator@4$vdd3 vdd_coreLK@LK@9regulator@5$vdig1O)29regulator@6$vdig2B@w@9regulator@7$vpllB@&%9regulator@8$vdac2Z9regulator@9 $vaux1w@+|9regulator@10 $vaux2w@2Z9regulator@11 $vaux33w@2Z9regulator@12 $vmmcw@-9regulator@13 $vbbi2c@48072000 ti,omap3-i2cH 9 %txrx+i2c2/lp5523A@32national,lp5523_q12e p chan0| chan1| chan2| chan3| chan4| chan5| chan6| chan7| chan8| lp5523B@33national,lp5523_q33echan0| chan1| chan2| chan3| chan4| chan5| chan6| chan7| chan8| lp5523C@34national,lp5523_q44echan0| chan1| chan2| chan3| chan4| chan5| chan6| chan7| chan8| lp552D@35national,lp5523_q25echan0| chan1| chan2| chan3| chan4| chan5| chan6| chan7| chan8| i2c@48060000 ti,omap3-i2cH= %txrx+i2c3mailbox@48094000ti,omap3-mailboxmailboxH @dsp  spi@48098000ti,omap2-mcspiH A+mcspi1@ #$%&'()* %tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi2  +,-.%tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3  %tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4 FG%tx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1 =>%txrxokaydefault mmc@480b4000ti,omap3-hsmmcH @Vmmc2 /0%txrxokaydefault mmc@480ad000ti,omap3-hsmmcH ^mmc3 MN%txrxokaydefault%0 ;mmu@480bd400Hti,omap2-iommuH mmu_ispUmmu@5d000000Hti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< ecommontxrxumcbsp1  %txrxfck disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyssick+ H rng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?ecommontxrxsidetoneumcbsp2mcbsp2_sidetone !"%txrxfckick disabledmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZecommontxrxsidetoneumcbsp3mcbsp3_sidetone %txrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 ecommontxrxumcbsp4 %txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR ecommontxrxumcbsp5 %txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1 E%rxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss' fckick+ H1timer@0ti,omap3430-timerfck%Dtarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss' fckick+ I timer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss' fckick+ H0@timer@0ti,omap3430-timer_usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcn %rxtx,8+*O_usb_otg_hs@480ab000ti,omap3-musbH \]emcdma usb_otg_hsJU] dss@48050000 ti,omap3-dssH disabled dss_corefck+dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  disabled dss_vencfcktv_dac_clkssi-controller@48058000 ti,omap3-ssissiokayHHsysgddGegdd_mpu+ u ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFserial@49042000ti,omap3-uartI P QR%txrxuart4/lregulator-abb-mpu ti,abb-v1 abb_mpu_iva+H0rH0hbase-addressint-addressf"`sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\+ *?]pinmux_mmc3_pins0z8:BDFHisp@480bc000 ti,omap3-ispH H ports+bandgap@48002524H%$ti,omap36xx-bandgaptarget-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_coreH 8sysc fck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaH 8sysc fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap4ti,syscPP revsysc   fckick+ P disabledopp-tableoperating-points-v2-ti-cpuopp50-300000000ssssssopp100-600000000#FOOOOOOopp130-800000000/777777opp1g-1000000000;opp_supplyti,omap-opp-supplythermal-zonescpu_thermal-CQN ^tripscpu_alertn8zpassivecpu_critn_z criticalcooling-mapsmap0 memory@80000000{memory `fixedregulator0regulator-fixedvcc5vLK@LK@M9fixedregulator1regulator-fixedvcc3v32Z2ZM9fixedregulator2regulator-fixedvcc1v8w@w@M9sdio-pwrseqmmc-pwrseq-simple (gpio-keys gpio-keysdefaultmute-button_muteq help-button_help rotary-encoderrotary-encoder  compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0ti,en-ck32k-xtalti,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-compatibleregulator-always-onregulator-boot-onlabelclock-modeenable-gpioled-curmax-cur#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplystatusbus-widthvmmc-supplynon-removabledisable-wpmmc-pwrseqvqmmc-supply#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicereset-gpiospost-power-on-delay-mslinux,codewakeup-sourcelinux,axisrotary-encoder,relative-axis