8( @openpandora,omap3-pandora-1ghzti,omap3630ti,omap36xxti,omap3 +7Pandora Handheld Console 1GHzchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000!{/ocp@68000000/spi@48098000/lcd@1cpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush + l3_mainl4@48000000ti,omap3-l4-coresimple-bus+  Hscm@2000ti,omap3-scmsimple-bus +  pinmux@30 ti,omap3-padconfpinctrl-single08+"3Hfpinmux_mmc1_pins0pinmux_mmc2_pinsP(*,.02468:pinmux_dss_dpi_pins^ pinmux_uart3_pinsnAppinmux_leds_pins $&`bpinmux_button_pinspinmux_penirq_pinspinmux_twl4030_pinsAscm_conf@270sysconsimple-busp0+  p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clockmcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+"3Hfpinmux_twl4030_vpins target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss ick+  H ` aes1@0 ti,omap3-aesP)  .txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss ick+  H P aes2@0 ti,omap3-aesP)AB.txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clock8Yosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockHpS"sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockjudpll3_m2x2_ckfixed-factor-clockju!dpll4_x2_ckfixed-factor-clock jucorex2_fckfixed-factor-clock!ju#wkup_l4_ickfixed-factor-clock"juRcorex2_d3_fckfixed-factor-clock#jucorex2_d5_fckfixed-factor-clock#juclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clock8omap_32k_fck fixed-clock8Dvirt_12m_ck fixed-clock8virt_13m_ck fixed-clock8]@virt_19200000_ck fixed-clock8$virt_26000000_ck fixed-clock8virt_38_4m_ck fixed-clock8Idpll4_ck@d00ti,omap3-dpll-per-j-type-clock"" D 0 dpll4_m2_ck@d48ti,divider-clock H? HS$dpll4_m2x2_mul_ckfixed-factor-clock$ju%dpll4_m2x2_ck@d00ti,hsdiv-gate-clock% &omap_96m_alwon_fckfixed-factor-clock&ju-dpll3_ck@d00ti,omap3-dpll-core-clock"" @ 0dpll3_m3_ck@1140ti,divider-clockH@S'dpll3_m3x2_mul_ckfixed-factor-clock'ju(dpll3_m3x2_ck@d00ti,hsdiv-gate-clock(  )emu_core_alwon_ckfixed-factor-clock)jufsys_altclk fixed-clock82mcbsp_clks fixed-clock8dpll3_m2_ck@d40ti,divider-clockH @Score_ckfixed-factor-clockju*dpll1_fck@940ti,divider-clock*H @S+dpll1_ck@904ti,omap3-dpll-clock"+  $ @ 4dpll1_x2_ckfixed-factor-clockju,dpll1_x2m2_ck@944ti,divider-clock,H DS@cm_96m_fckfixed-factor-clock-ju.omap_96m_fck@d40 ti,mux-clock." @Idpll4_m3_ck@e40ti,divider-clock H @S/dpll4_m3x2_mul_ckfixed-factor-clock/ju0dpll4_m3x2_ck@d00ti,hsdiv-gate-clock0 1omap_54m_fck@d40 ti,mux-clock12 @<cm_96m_d2_fckfixed-factor-clock.ju3omap_48m_fck@d40 ti,mux-clock32 @4omap_12m_fckfixed-factor-clock4juKdpll4_m4_ck@e40ti,divider-clock H@S5dpll4_m4x2_mul_ckti,fixed-factor-clock56dpll4_m4x2_ck@d00ti,gate-clock6 dpll4_m5_ck@f40ti,divider-clock H?@S7dpll4_m5x2_mul_ckti,fixed-factor-clock78dpll4_m5x2_ck@d00ti,hsdiv-gate-clock8 ndpll4_m6_ck@1140ti,divider-clock H?@S9dpll4_m6x2_mul_ckfixed-factor-clock9ju:dpll4_m6x2_ck@d00ti,hsdiv-gate-clock: ;emu_per_alwon_ckfixed-factor-clock;jugclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock* p=clkout2_src_mux_ck@d70ti,composite-mux-clock*".< p>clkout2_src_ckti,composite-clock=>?sys_clkout2@d70ti,divider-clock?H@ pmpu_ckfixed-factor-clock@juAarm_fck@924ti,divider-clockA $Hemu_mpu_alwon_ckfixed-factor-clockAjuhl3_ick@a40ti,divider-clock*H @SBl4_ick@a40ti,divider-clockBH @SCrm_ick@c40ti,divider-clockCH @Sgpt10_gate_fck@a00ti,composite-gate-clock"  Egpt10_mux_fck@a40ti,composite-mux-clockD" @Fgpt10_fckti,composite-clockEFgpt11_gate_fck@a00ti,composite-gate-clock"  Ggpt11_mux_fck@a40ti,composite-mux-clockD" @Hgpt11_fckti,composite-clockGHcore_96m_fckfixed-factor-clockIjummchs2_fck@a00ti,wait-gate-clock mmchs1_fck@a00ti,wait-gate-clock i2c3_fck@a00ti,wait-gate-clock i2c2_fck@a00ti,wait-gate-clock i2c1_fck@a00ti,wait-gate-clock mcbsp5_gate_fck@a00ti,composite-gate-clock   mcbsp1_gate_fck@a00ti,composite-gate-clock   core_48m_fckfixed-factor-clock4juJmcspi4_fck@a00ti,wait-gate-clockJ mcspi3_fck@a00ti,wait-gate-clockJ mcspi2_fck@a00ti,wait-gate-clockJ mcspi1_fck@a00ti,wait-gate-clockJ uart2_fck@a00ti,wait-gate-clockJ uart1_fck@a00ti,wait-gate-clockJ  core_12m_fckfixed-factor-clockKjuLhdq_fck@a00ti,wait-gate-clockL core_l3_ickfixed-factor-clockBjuMsdrc_ick@a10ti,wait-gate-clockM gpmc_fckfixed-factor-clockMjucore_l4_ickfixed-factor-clockCjuNmmchs2_ick@a10ti,omap3-interface-clockN mmchs1_ick@a10ti,omap3-interface-clockN hdq_ick@a10ti,omap3-interface-clockN mcspi4_ick@a10ti,omap3-interface-clockN mcspi3_ick@a10ti,omap3-interface-clockN mcspi2_ick@a10ti,omap3-interface-clockN mcspi1_ick@a10ti,omap3-interface-clockN i2c3_ick@a10ti,omap3-interface-clockN i2c2_ick@a10ti,omap3-interface-clockN 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per_48m_fckfixed-factor-clock4juSuart3_fck@1000ti,wait-gate-clockS gpt2_gate_fck@1000ti,composite-gate-clock"Tgpt2_mux_fck@1040ti,composite-mux-clockD"@Ugpt2_fckti,composite-clockTUgpt3_gate_fck@1000ti,composite-gate-clock"Vgpt3_mux_fck@1040ti,composite-mux-clockD"@Wgpt3_fckti,composite-clockVWgpt4_gate_fck@1000ti,composite-gate-clock"Xgpt4_mux_fck@1040ti,composite-mux-clockD"@Ygpt4_fckti,composite-clockXYgpt5_gate_fck@1000ti,composite-gate-clock"Zgpt5_mux_fck@1040ti,composite-mux-clockD"@[gpt5_fckti,composite-clockZ[gpt6_gate_fck@1000ti,composite-gate-clock"\gpt6_mux_fck@1040ti,composite-mux-clockD"@]gpt6_fckti,composite-clock\]gpt7_gate_fck@1000ti,composite-gate-clock"^gpt7_mux_fck@1040ti,composite-mux-clockD"@_gpt7_fckti,composite-clock^_gpt8_gate_fck@1000ti,composite-gate-clock" `gpt8_mux_fck@1040ti,composite-mux-clockD"@agpt8_fckti,composite-clock`agpt9_gate_fck@1000ti,composite-gate-clock" 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compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3display0device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0ti,use_poweroffti,ramp_delay_valuebci3v1-supplyio-channelsio-channel-namesti,bb-uvoltti,bb-uampregulator-always-onusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencypendown-gpiovcc-supplyti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxwakeup-sourcespi-cpolspi-cphalabelreset-gpiosremote-endpointti,dual-voltpbias-supplyvmmc-supplybus-widthcd-gpiosnon-removableti,non-removablecap-power-off-cardti,wl1251-has-eeprom#iommu-cellsti,#tlb-entriesstatusinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,device-widthmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda-supplyti,channelsdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicelinux,default-triggerdefault-statelinux,codelinux,input-typeregulator-boot-onenable-active-highstartup-delay-us