'8\( $Dcompulab,omap3-sbc-t3517compulab,omap3-cm-t3517ti,am3517ti,omap3 +!7CompuLab SBC-T3517 with CM-T3517chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@4809e000{/ocp@68000000/can@5c050000/dvi-connector/svideo-connectorcpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+.Lidefaultwpinmux_uart3_pinsnppinmux_mmc1_pins0pinmux_green_led_pinspinmux_dss_dpi_pins_commonpinmux_dss_dpi_pins_cm_t35x0pinmux_ads7846_pinspinmux_mcspi1_pins pinmux_i2c1_pinspinmux_mcbsp2_pins  pinmux_hsusb1_phy_reset_pinsHpinmux_hsusb2_phy_reset_pinsJpinmux_otg_drv_vbuspinmux_mmc2_pins0(*,.02pinmux_wl12xx_core_pinsFpinmux_usb_hub_pinsTpinmux_smsc2_pinspinmux_tfp410_pinspinmux_i2c3_pinspinmux_sb_t35_audio_amppinmux_mmc1_aux_pinsDpinmux_sb_t35_usb_hub_pinsscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clockmcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockemac_ick@32cti,am35xx-gate-clock,zemac_fck@32cti,gate-clock, vpfe_ick@32cti,am35xx-gate-clock,{vpfe_fck@32cti,gate-clock, hsotgusb_ick_am35xx@32cti,am35xx-gate-clock,|hsotgusb_fck_am35xx@32cti,gate-clock,}hecc_ck@32cti,am35xx-gate-clock,~clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+.Lpinmux_wl12xx_wkup_pinsprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clock psys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock/:dpll3_m2x2_ckfixed-factor-clock /:"dpll4_x2_ckfixed-factor-clock!/:corex2_fckfixed-factor-clock"/:#wkup_l4_ickfixed-factor-clock/:Rcorex2_d3_fckfixed-factor-clock#/:scorex2_d5_fckfixed-factor-clock#/:tclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockDvirt_12m_ck fixed-clockvirt_13m_ck fixed-clock]@virt_19200000_ck fixed-clock$virt_26000000_ck fixed-clockvirt_38_4m_ck fixed-clockIdpll4_ck@d00ti,omap3-dpll-per-clock D 0!dpll4_m2_ck@d48ti,divider-clock! ? H$dpll4_m2x2_mul_ckfixed-factor-clock$/:%dpll4_m2x2_ck@d00ti,gate-clock% D&omap_96m_alwon_fckfixed-factor-clock&/:-dpll3_ck@d00ti,omap3-dpll-core-clock @ 0dpll3_m3_ck@1140ti,divider-clock @'dpll3_m3x2_mul_ckfixed-factor-clock'/:(dpll3_m3x2_ck@d00ti,gate-clock(  D)emu_core_alwon_ckfixed-factor-clock)/:fsys_altclk fixed-clock2mcbsp_clks fixed-clockdpll3_m2_ck@d40ti,divider-clock  @ core_ckfixed-factor-clock /:*dpll1_fck@940ti,divider-clock*  @+dpll1_ck@904ti,omap3-dpll-clock+  $ @ 4dpll1_x2_ckfixed-factor-clock/:,dpll1_x2m2_ck@944ti,divider-clock,  D@cm_96m_fckfixed-factor-clock-/:.omap_96m_fck@d40 ti,mux-clock. @Idpll4_m3_ck@e40ti,divider-clock! @/dpll4_m3x2_mul_ckfixed-factor-clock//:0dpll4_m3x2_ck@d00ti,gate-clock0 D1omap_54m_fck@d40 ti,mux-clock12 @<cm_96m_d2_fckfixed-factor-clock./:3omap_48m_fck@d40 ti,mux-clock32 @4omap_12m_fckfixed-factor-clock4/:Kdpll4_m4_ck@e40ti,divider-clock! @5dpll4_m4x2_mul_ckti,fixed-factor-clock5Zhu6dpll4_m4x2_ck@d00ti,gate-clock6 Duxdpll4_m5_ck@f40ti,divider-clock! ?@7dpll4_m5x2_mul_ckti,fixed-factor-clock7Zhu8dpll4_m5x2_ck@d00ti,gate-clock8 Dudpll4_m6_ck@1140ti,divider-clock! ?@9dpll4_m6x2_mul_ckfixed-factor-clock9/::dpll4_m6x2_ck@d00ti,gate-clock: D;emu_per_alwon_ckfixed-factor-clock;/:gclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock* p=clkout2_src_mux_ck@d70ti,composite-mux-clock*.< p>clkout2_src_ckti,composite-clock=>?sys_clkout2@d70ti,divider-clock? @ pmpu_ckfixed-factor-clock@/:Aarm_fck@924ti,divider-clockA $ emu_mpu_alwon_ckfixed-factor-clockA/:hl3_ick@a40ti,divider-clock*  @Bl4_ick@a40ti,divider-clockB  @Crm_ick@c40ti,divider-clockC  @gpt10_gate_fck@a00ti,composite-gate-clock  Egpt10_mux_fck@a40ti,composite-mux-clockD @Fgpt10_fckti,composite-clockEFgpt11_gate_fck@a00ti,composite-gate-clock  Ggpt11_mux_fck@a40ti,composite-mux-clockD @Hgpt11_fckti,composite-clockGHcore_96m_fckfixed-factor-clockI/:mmchs2_fck@a00ti,wait-gate-clock mmchs1_fck@a00ti,wait-gate-clock i2c3_fck@a00ti,wait-gate-clock i2c2_fck@a00ti,wait-gate-clock i2c1_fck@a00ti,wait-gate-clock mcbsp5_gate_fck@a00ti,composite-gate-clock   mcbsp1_gate_fck@a00ti,composite-gate-clock   core_48m_fckfixed-factor-clock4/:Jmcspi4_fck@a00ti,wait-gate-clockJ mcspi3_fck@a00ti,wait-gate-clockJ mcspi2_fck@a00ti,wait-gate-clockJ mcspi1_fck@a00ti,wait-gate-clockJ uart2_fck@a00ti,wait-gate-clockJ uart1_fck@a00ti,wait-gate-clockJ  core_12m_fckfixed-factor-clockK/:Lhdq_fck@a00ti,wait-gate-clockL core_l3_ickfixed-factor-clockB/:Msdrc_ick@a10ti,wait-gate-clockM ygpmc_fckfixed-factor-clockM/:core_l4_ickfixed-factor-clockC/:Nmmchs2_ick@a10ti,omap3-interface-clockN mmchs1_ick@a10ti,omap3-interface-clockN hdq_ick@a10ti,omap3-interface-clockN mcspi4_ick@a10ti,omap3-interface-clockN mcspi3_ick@a10ti,omap3-interface-clockN mcspi2_ick@a10ti,omap3-interface-clockN mcspi1_ick@a10ti,omap3-interface-clockN i2c3_ick@a10ti,omap3-interface-clockN i2c2_ick@a10ti,omap3-interface-clockN i2c1_ick@a10ti,omap3-interface-clockN uart2_ick@a10ti,omap3-interface-clockN uart1_ick@a10ti,omap3-interface-clockN  gpt11_ick@a10ti,omap3-interface-clockN  gpt10_ick@a10ti,omap3-interface-clockN  mcbsp5_ick@a10ti,omap3-interface-clockN  mcbsp1_ick@a10ti,omap3-interface-clockN  omapctrl_ick@a10ti,omap3-interface-clockN dss_tv_fck@e00ti,gate-clock<dss_96m_fck@e00ti,gate-clockIdss2_alwon_fck@e00ti,gate-clockdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock Ogpt1_mux_fck@c40ti,composite-mux-clockD @Pgpt1_fckti,composite-clockOPaes2_ick@a10ti,omap3-interface-clockN wkup_32k_fckfixed-factor-clockD/:Qgpio1_dbck@c00ti,gate-clockQ sha12_ick@a10ti,omap3-interface-clockN wdt2_fck@c00ti,wait-gate-clockQ wdt2_ick@c10ti,omap3-interface-clockR wdt1_ick@c10ti,omap3-interface-clockR gpio1_ick@c10ti,omap3-interface-clockR omap_32ksync_ick@c10ti,omap3-interface-clockR gpt12_ick@c10ti,omap3-interface-clockR gpt1_ick@c10ti,omap3-interface-clockR per_96m_fckfixed-factor-clock-/: per_48m_fckfixed-factor-clock4/:Suart3_fck@1000ti,wait-gate-clockS gpt2_gate_fck@1000ti,composite-gate-clockTgpt2_mux_fck@1040ti,composite-mux-clockD@Ugpt2_fckti,composite-clockTUgpt3_gate_fck@1000ti,composite-gate-clockVgpt3_mux_fck@1040ti,composite-mux-clockD@Wgpt3_fckti,composite-clockVWgpt4_gate_fck@1000ti,composite-gate-clockXgpt4_mux_fck@1040ti,composite-mux-clockD@Ygpt4_fckti,composite-clockXYgpt5_gate_fck@1000ti,composite-gate-clockZgpt5_mux_fck@1040ti,composite-mux-clockD@[gpt5_fckti,composite-clockZ[gpt6_gate_fck@1000ti,composite-gate-clock\gpt6_mux_fck@1040ti,composite-mux-clockD@]gpt6_fckti,composite-clock\]gpt7_gate_fck@1000ti,composite-gate-clock^gpt7_mux_fck@1040ti,composite-mux-clockD@_gpt7_fckti,composite-clock^_gpt8_gate_fck@1000ti,composite-gate-clock `gpt8_mux_fck@1040ti,composite-mux-clockD@agpt8_fckti,composite-clock`agpt9_gate_fck@1000ti,composite-gate-clock bgpt9_mux_fck@1040ti,composite-mux-clockD@cgpt9_fckti,composite-clockbcper_32k_alwon_fckfixed-factor-clockD/:dgpio6_dbck@1000ti,gate-clockdgpio5_dbck@1000ti,gate-clockdgpio4_dbck@1000ti,gate-clockdgpio3_dbck@1000ti,gate-clockdgpio2_dbck@1000ti,gate-clockd wdt3_fck@1000ti,wait-gate-clockd per_l4_ickfixed-factor-clockC/:egpio6_ick@1010ti,omap3-interface-clockegpio5_ick@1010ti,omap3-interface-clockegpio4_ick@1010ti,omap3-interface-clockegpio3_ick@1010ti,omap3-interface-clockegpio2_ick@1010ti,omap3-interface-clocke wdt3_ick@1010ti,omap3-interface-clocke uart3_ick@1010ti,omap3-interface-clocke uart4_ick@1010ti,omap3-interface-clockegpt9_ick@1010ti,omap3-interface-clocke gpt8_ick@1010ti,omap3-interface-clocke gpt7_ick@1010ti,omap3-interface-clockegpt6_ick@1010ti,omap3-interface-clockegpt5_ick@1010ti,omap3-interface-clockegpt4_ick@1010ti,omap3-interface-clockegpt3_ick@1010ti,omap3-interface-clockegpt2_ick@1010ti,omap3-interface-clockemcbsp2_ick@1010ti,omap3-interface-clockemcbsp3_ick@1010ti,omap3-interface-clockemcbsp4_ick@1010ti,omap3-interface-clockemcbsp2_gate_fck@1000ti,composite-gate-clockmcbsp3_gate_fck@1000ti,composite-gate-clockmcbsp4_gate_fck@1000ti,composite-gate-clockemu_src_mux_ck@1140 ti,mux-clockfgh@iemu_src_ckti,clkdm-gate-clockijpclk_fck@1140ti,divider-clockj @pclkx2_fck@1140ti,divider-clockj @atclk_fck@1140ti,divider-clockj @traceclk_src_fck@1140 ti,mux-clockfgh@ktraceclk_fck@1140ti,divider-clockk  @secure_32k_fck fixed-clocklgpt12_fckfixed-factor-clockl/:wdt1_fckfixed-factor-clockl/:ipss_ick@a10ti,am35xx-interface-clockM rmii_ck fixed-clockpclk_ck fixed-clockuart4_ick_am35xx@a10ti,omap3-interface-clockN uart4_fck_am35xx@a00ti,wait-gate-clockJ dpll5_ck@d04ti,omap3-dpll-clock  $ L 4mdpll5_m2_ck@d50ti,divider-clockm  Pwsgx_gate_fck@b00ti,composite-gate-clock* ucore_d3_ckfixed-factor-clock*/:ncore_d4_ckfixed-factor-clock*/:ocore_d6_ckfixed-factor-clock*/:pomap_192m_alwon_fckfixed-factor-clock&/:qcore_d2_ckfixed-factor-clock*/:rsgx_mux_fck@b40ti,composite-mux-clock nop.qrst @vsgx_fckti,composite-clockuvsgx_ick@b10ti,wait-gate-clockB cpefuse_fck@a08ti,gate-clock ts_fck@a08ti,gate-clockD usbtll_fck@a08ti,wait-gate-clockw usbtll_ick@a18ti,omap3-interface-clockN mmchs3_ick@a10ti,omap3-interface-clockN mmchs3_fck@a00ti,wait-gate-clock dss1_alwon_fck_3430es2@e00ti,dss-gate-clockxudss_ick_3430es2@e10ti,omap3-dss-interface-clockCusbhost_120m_fck@1400ti,gate-clockwusbhost_48m_fck@1400ti,dss-gate-clock4usbhost_ick@1410ti,omap3-dss-interface-clockCclockdomainscore_l3_clkdmti,clockdomainyz{|}~dpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainjdpll4_clkdmti,clockdomain!wkup_clkdmti,clockdomain dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaindpll5_clkdmti,clockdomainmsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscQfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intcH target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss#  Mick+ H`dma-controller@0ti,omap3430-sdmati,omap-sdma  `gpio@48310000ti,omap3-gpioH1gpio1/?gpio@49050000ti,omap3-gpioIgpio2/?gpio@49052000ti,omap3-gpioI gpio3/?gpio@49054000ti,omap3-gpioI@ gpio4/?gpio@49056000ti,omap3-gpioI`!gpio5/?gpio@49058000ti,omap3-gpioI"gpio6/?serial@4806a000ti,omap3-uartH KH_12dtxrxuart1lserial@4806c000ti,omap3-uartHKI_34dtxrxuart2lserial@49020000ti,omap3-uartIKJ_56dtxrxuart3lidefaultwi2c@48070000 ti,omap3-i2cH8_dtxrx+i2c1idefaultwat24@50 atmel,24c02nPi2c@48072000 ti,omap3-i2cH 9_dtxrx+i2c2i2c@48060000 ti,omap3-i2cH=_dtxrx+i2c3idefaultwat24@50 atmel,24c02nPmailbox@48094000ti,omap3-mailboxmailboxH @w disableddsp  spi@48098000ti,omap2-mcspiH A+mcspi1@_#$%&'()* dtx0rx0tx1rx1tx2rx2tx3rx3idefaultwads7846@0idefaultw ti,ads7846`  )9I Yispi@4809a000ti,omap2-mcspiH B+mcspi2 _+,-.dtx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3 _dtx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4_FGdtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1w_=>dtxrxidefaultw  mmc@480b4000ti,omap3-hsmmcH @Vmmc2_/0dtxrxidefaultw+wlcore@2 ti,wl1271 Immc@480ad000ti,omap3-hsmmcH ^mmc3_MNdtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_isp disabledmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrx(mcbsp1_ dtxrxfck disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyssick+ H  disabledrng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetone(mcbsp2mcbsp2_sidetone_!"dtxrxfckickokayidefaultwmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetone(mcbsp3mcbsp3_sidetone_dtxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrx(mcbsp4_dtxrxfck7 disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrx(mcbsp5_dtxrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1_Edrxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss' fckick+ H1H\timer@0ti,omap3430-timerfck%gvtarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss' fckick+ I H\timer@0ti,omap3430-timer&vtimer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss' fckick+ H0@timer@0ti,omap3430-timer_gusbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ehci-phy ehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcn_drxtx+/? -nand@0,0ti,omap2-nand  '9swIWxix{xxZZH<-x>xOaZ+partition@0yxloaderpartition@80000yubootpartition@260000yuboot environment&partition@2a0000ylinux*@partition@6a0000yrootfsjethernet@4,0smsc,lan9221smsc,lan9115idefaultw  'IWi{(--->xKKaO"/usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hsEPX  disableddss@48050000 ti,omap3-dssHokay dss_corefck+idefaultwdispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH okay dss_vencfckportendpointaqportendpointa}ssi-controller@48058000 ti,omap3-ssissi disabledHHsysgddGgdd_mpu+ssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFam35x_otg_hs@5c040000ti,omap3-musb am35x_otg_hsokay\Gmcidefaultwethernet@5c000000ti,am3517-emac davinci_emacokay\CDEF  zickmdio@5c030000ti,davinci_mdio davinci_mdiookay\ B@+fckserial@4809e000ti,omap3-uartuart4 disabledH T_76dtxrxlpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+.Lcan@5c050000ti,am3517-hecc disabled\\0\ hecchecc-rammbx~target-module@50000000ti,sysc-omap2ti,syscPrevfckick+ P@opp-tableoperating-points-v2-ti-cpuopp50-300000000 $ +O 9 Jopp100-600000000 $#F +O 9memory@80000000memoryleds gpio-ledsidefaultwledb ycm-t3x:green  Vheartbeathsusb1_power_regregulator-fixed hsusb1_vbus2Z2Z lphsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z lphsusb1_phyusb-nop-xceiv }idefaultw hsusb2_phyusb-nop-xceiv }idefaultw ads7846-regregulator-fixed ads7846-reg2Z2Zsvideo-connectorsvideo-connectorytvportendpointaregulator-vmmcregulator-fixedvmmc2Z2Zwl12xx_vmmc2regulator-fixedvw1271idefaultww@w@  lN  wl12xx_vaux2regulator-fixedvwl1271_vaux2w@w@encoder ti,tfp410 idefaultwports+port@0endpointaport@1endpointadvi-connectordvi-connectorydviportendpointaaudio_ampregulator-fixed audio_ampidefaultw  regulator-vddvario-sb-t35regulator-fixed vddvario regulator-vdd33a-sb-t35regulator-fixedvdd33a  compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3candisplay0display1device_typeregclocksclock-namesclock-latencyoperating-points-v2interruptsti,hwmodsstatusranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockreg-namesti,sysc-sidleti,sysc-maskti,sysc-midleti,syss-mask#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendeddmasdma-namespagesize#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltpbias-supplybus-widthvmmc-supplywp-gpioscd-gpiosvqmmc-supplynon-removablecap-power-off-cardref-clock-frequency#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,bus-turnaround-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsremote-endpointti,channelsdata-linesti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freqopp-hzopp-microvoltopp-supported-hwopp-suspendlinux,default-triggerstartup-delay-us#phy-cellsreset-gpiosenable-active-highpowerdown-gpiosregulator-always-on