V8K( KP"ti,omap4-sdpti,omap4430ti,omap4 +7TI OMAP4 SDP boardchosenaliases?=/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?B/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?G/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EL/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0?Q/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0?V/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0?[/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0?`/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0?e/ocp/interconnect@48000000/segment@0/target-module@d5000/mmc@0Bj/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Br/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Bz/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 /ocp/dsp/ocp/ipu@55020000G/ocp/target-module@58000000/dss@0/target-module@4000/encoder@0/panel@0G/ocp/target-module@58000000/dss@0/target-module@5000/encoder@0/panel@0 /connectorcpus+cpu@0arm,cortex-a9cpucpu  'O 5acpu@1arm,cortex-a9cpupmuarm,cortex-a9-pmudebugssinterrupt-controller@48241000arm,cortex-a9-gic'<H$H$ cache-controller@48242000arm,pl310-cacheH$ M[local-timer@48240600arm,cortex-a9-twd-timerH$  g  interrupt-controller@48281000ti,omap4-wugen-mpu'<H( socti,omap-inframpu ti,omap4-mpumpuriva ti,ivahdivaocpti,omap4-l3-nocsimple-bus+wl3_main_1l3_main_2l3_main_3DD Eg  interconnect@4a300000ti,omap4-l4-wkupsimple-busJ0J0J0 ~aplaia0+$wJ0J1J2segment@0 simple-bus+w`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc@@ ~revsysc 0fck+ w@counter@0ti,omap-counter32k target-module@6000ti,sysc-omap4ti,sysc`~rev+ w` prm@0ti,omap4-prmsimple-bus  g + w clocks+sys_clkin_ck@110 ti,mux-clock abe_dpll_bypass_clk_mux_ck@108 ti,mux-clock3abe_dpll_refclk_mux_ck@10c ti,mux-clock 2dbgclk_mux_ckfixed-factor-clockl4_wkup_clk_mux_ck@108 ti,mux-clocksyc_clk_div_ck@100ti,divider-clockusim_ck@1858ti,divider-clockXusim_fclk@1858ti,gate-clockXtrace_clk_div_ckti,clkdm-gate-clock bandgap_fclk@1888ti,gate-clockclockdomainsemu_sys_clkdmti,clockdomainl4_wkup_cm@1800 ti,omap4-cm+ wclk@20 ti,clkctrl \emu_sys_cm@1a00 ti,omap4-cm+ wclk@20 ti,clkctrl prm@400#ti,omap4-prm-instti,omap-prm-inst]prm@500#ti,omap4-prm-instti,omap-prm-instprm@700#ti,omap4-prm-instti,omap-prm-instprm@f00#ti,omap4-prm-instti,omap-prm-instprm@1b00#ti,omap4-prm-instti,omap-prm-inst@target-module@a000ti,sysc-omap4ti,sysc~rev+ wscrm@0ti,omap4-scrm clocks+auxclk0_src_gate_ck@310 ti,composite-no-wait-gate-clockauxclk0_src_mux_ck@310ti,composite-mux-clock auxclk0_src_ckti,composite-clockauxclk0_ck@310ti,divider-clock*auxclk1_src_gate_ck@314 ti,composite-no-wait-gate-clockauxclk1_src_mux_ck@314ti,composite-mux-clock auxclk1_src_ckti,composite-clockauxclk1_ck@314ti,divider-clock+auxclk2_src_gate_ck@318 ti,composite-no-wait-gate-clockauxclk2_src_mux_ck@318ti,composite-mux-clock auxclk2_src_ckti,composite-clock auxclk2_ck@318ti,divider-clock ,auxclk3_src_gate_ck@31c ti,composite-no-wait-gate-clock!auxclk3_src_mux_ck@31cti,composite-mux-clock "auxclk3_src_ckti,composite-clock!"#auxclk3_ck@31cti,divider-clock#-auxclk4_src_gate_ck@320 ti,composite-no-wait-gate-clock $auxclk4_src_mux_ck@320ti,composite-mux-clock  %auxclk4_src_ckti,composite-clock$%&auxclk4_ck@320ti,divider-clock& .auxclk5_src_gate_ck@324 ti,composite-no-wait-gate-clock$'auxclk5_src_mux_ck@324ti,composite-mux-clock $(auxclk5_src_ckti,composite-clock'()auxclk5_ck@324ti,divider-clock)$/auxclkreq0_ck@210 ti,mux-clock*+,-./auxclkreq1_ck@214 ti,mux-clock*+,-./auxclkreq2_ck@218 ti,mux-clock*+,-./auxclkreq3_ck@21c ti,mux-clock*+,-./auxclkreq4_ck@220 ti,mux-clock*+,-./ auxclkreq5_ck@224 ti,mux-clock*+,-./$clockdomainstarget-module@c000ti,sysc-omap4ti,syscctrl_module_wkup ~revsysc+ wscm@c000ti,omap4-scm-wkupsegment@10000 simple-bus+xw@@PPtarget-module@0ti,sysc-omap2ti,sysc~revsyscsyss! fckdbclk+ wgpio@0ti,omap4-gpio g.@P'<target-module@4000ti,sysc-omap2ti,sysc@@@~revsyscsyss"! fck+ w@wdt@0ti,omap4-wdtti,omap3-wdt gPtarget-module@8000ti,sysc-omap2-timerti,sysc~revsyscsyss' !  fck+ w\ptimer@0ti,omap3430-timer fcktimer_sys_ck g%{  target-module@c000ti,sysc-omap2ti,sysc~revsyscsyss' ! Xfck+ wkeypad@0ti,omap4-keypad gx~mpuf?* !"@%-./kA4:,N0;B9<s&i#$=Cr2j1g>`ltarget-module@e000ti,sysc-omap4ti,syscctrl_module_pad_wkup ~revsysc+ wpinmux@40 ti,omap4-padconfpinctrl-single@8+<' (pinmux_twl6030_wkup_pinsEqsegment@20000 simple-bus+w``  00@@PPpptarget-module@0ti,sysc Ydisabled+ wtarget-module@2000ti,sysc Ydisabled+ w target-module@4000ti,sysc Ydisabled+ w@target-module@6000ti,sysc Ydisabled+0w`p 0interconnect@4a000000ti,omap4-l4-cfgsimple-busJJJ ~aplaia0+TwJJJJ J (J(0J0segment@0 simple-bus+w 00@@PP``pp@  00 ``pp @@PPtarget-module@2000ti,sysc-omap4ti,syscctrl_module_core   ~revsysc+ w scm@0ti,omap4-scm-coresimple-bus+ wscm_conf@0syscon+control-phy@300ti,control-phy-usb2~power`control-phy@33cti,control-phy-otghs<~otghs_control_target-module@4000ti,sysc-omap4ti,sysc@~rev+ w@cm1@0ti,omap4-cm1simple-bus + w clocks+extalt_clkin_ck fixed-clock`Dpad_clks_src_ck fixed-clock`0pad_clks_ck@108ti,gate-clock0pad_slimbus_core_clks_ck fixed-clock`secure_32k_clk_src_ck fixed-clock`slimbus_src_clk fixed-clock`1slimbus_clk@108ti,gate-clock1 sys_32k_ck fixed-clock`virt_12000000_ck fixed-clock`virt_13000000_ck fixed-clock`]@ virt_16800000_ck fixed-clock`Y virt_19200000_ck fixed-clock`$ virt_26000000_ck fixed-clock` virt_27000000_ck fixed-clock` virt_38400000_ck fixed-clock`Itie_low_clock_ck fixed-clock`utmi_phy_clkout_ck fixed-clock`xclk60mhsp1_ck fixed-clock`Zxclk60mhsp2_ck fixed-clock`[xclk60motg_ck fixed-clock`dpll_abe_ck@1e0ti,omap4-dpll-m4xen-clock234dpll_abe_x2_ck@1f0ti,omap4-dpll-x2-clock45dpll_abe_m2x2_ck@1f0ti,divider-clock5p6abe_24m_fclkfixed-factor-clock6abe_clk@108ti,divider-clock6dpll_abe_m3x2_ck@1f4ti,divider-clock5p7core_hsd_byp_clk_mux_ck@12c ti,mux-clock7,8dpll_core_ck@120ti,omap4-dpll-core-clock8 $,(9dpll_core_x2_ckti,omap4-dpll-x2-clock9:dpll_core_m6x2_ck@140ti,divider-clock:p@dpll_core_m2_ck@130ti,divider-clock9p0;ddrphy_ckfixed-factor-clock;dpll_core_m5x2_ck@13cti,divider-clock:p<<div_core_ck@100ti,divider-clock<Gdiv_iva_hs_clk@1dcti,divider-clock<@div_mpu_hs_clk@19cti,divider-clock<Fdpll_core_m4x2_ck@138ti,divider-clock:p8=dll_clk_div_ckfixed-factor-clock=dpll_abe_m2_ck@1f0ti,divider-clock4Jdpll_core_m3x2_gate_ck@134 ti,composite-no-wait-gate-clock:4>dpll_core_m3x2_div_ck@134ti,composite-divider-clock:4?dpll_core_m3x2_ckti,composite-clock>?dpll_core_m7x2_ck@144ti,divider-clock:pDiva_hsd_byp_clk_mux_ck@1ac ti,mux-clock@Adpll_iva_ck@1a0ti,omap4-dpll-clockAB7Bdpll_iva_x2_ckti,omap4-dpll-x2-clockBCdpll_iva_m4x2_ck@1b8ti,divider-clockCpD~Ddpll_iva_m5x2_ck@1bcti,divider-clockCpE] Edpll_mpu_ck@160ti,omap4-dpll-clockF`dlhdpll_mpu_m2_ck@170ti,divider-clockppper_hs_clk_div_ckfixed-factor-clock7Kusb_hs_clk_div_ckfixed-factor-clock7Ql3_div_ck@100ti,divider-clockGHl4_div_ck@100ti,divider-clockHlp_clk_div_ckfixed-factor-clock6mpu_periphclkfixed-factor-clockocp_abe_iclk@528ti,divider-clock I(per_abe_24m_fclkfixed-factor-clockJdummy_ck fixed-clock`clockdomainsmpuss_cm@300 ti,omap4-cm+ wclk@20 ti,clkctrl tesla_cm@400 ti,omap4-cm+ wclk@20 ti,clkctrl \abe_cm@500 ti,omap4-cm+ wclk@20 ti,clkctrl lItarget-module@8000ti,sysc-omap4ti,sysc~rev+ w cm2@0ti,omap4-cm2simple-bus + w clocks+per_hsd_byp_clk_mux_ck@14c ti,mux-clockKLLdpll_per_ck@140ti,omap4-dpll-clockL@DLHMdpll_per_m2_ck@150ti,divider-clockMPUdpll_per_x2_ck@150ti,omap4-dpll-x2-clockMPNdpll_per_m2x2_ck@150ti,divider-clockNpPTdpll_per_m3x2_gate_ck@154 ti,composite-no-wait-gate-clockNTOdpll_per_m3x2_div_ck@154ti,composite-divider-clockNTPdpll_per_m3x2_ckti,composite-clockOPdpll_per_m4x2_ck@158ti,divider-clockNpXdpll_per_m5x2_ck@15cti,divider-clockNp\dpll_per_m6x2_ck@160ti,divider-clockNp`Sdpll_per_m7x2_ck@164ti,divider-clockNpddpll_usb_ck@180ti,omap4-dpll-j-type-clockQRdpll_usb_clkdcoldo_ck@1b4ti,fixed-factor-clockRpdpll_usb_m2_ck@190ti,divider-clockRpVducati_clk_mux_ck@100 ti,mux-clockGSfunc_12m_fclkfixed-factor-clockTfunc_24m_clkfixed-factor-clockUfunc_24mc_fclkfixed-factor-clockTfunc_48m_fclk@108ti,divider-clockTfunc_48mc_fclkfixed-factor-clockTfunc_64m_fclk@108ti,divider-clockfunc_96m_fclk@108ti,divider-clockTinit_60m_fclk@104ti,divider-clockVYper_abe_nc_fclk@108ti,divider-clockJusb_phy_cm_clk32k@640ti,gate-clock@aclockdomainsl3_init_clkdmti,clockdomainRl4_ao_cm@600 ti,omap4-cm+ wclk@20 ti,clkctrl cl3_1_cm@700 ti,omap4-cm+ wclk@20 ti,clkctrl l3_2_cm@800 ti,omap4-cm+ wclk@20 ti,clkctrl ducati_cm@900 ti,omap4-cm + w clk@20 ti,clkctrl l3_dma_cm@a00 ti,omap4-cm + w clk@20 ti,clkctrl Wl3_emif_cm@b00 ti,omap4-cm + w clk@20 ti,clkctrl d2d_cm@c00 ti,omap4-cm + w clk@20 ti,clkctrl bl4_cfg_cm@d00 ti,omap4-cm + w clk@20 ti,clkctrl dl3_instr_cm@e00 ti,omap4-cm+ wclk@20 ti,clkctrl $ivahd_cm@f00 ti,omap4-cm+ wclk@20 ti,clkctrl iss_cm@1000 ti,omap4-cm+ wclk@20 ti,clkctrl hl3_dss_cm@1100 ti,omap4-cm+ wclk@20 ti,clkctrl l3_gfx_cm@1200 ti,omap4-cm+ wclk@20 ti,clkctrl l3_init_cm@1300 ti,omap4-cm+ wclk@20 ti,clkctrl Xl4_per_cm@1400 ti,omap4-cm+ wclock@20ti,clkctrl-l4-perti,clkctrl Diclock@1a0 ti,clkctrl-l4-secureti,clkctrl<ytarget-module@56000ti,sysc-omap2ti,sysc``,`(~revsyscsyss#  ! Wfck+ w`dma-controller@0ti,omap4430-sdmati,omap-sdma0g   ztarget-module@58000ti,sysc-omap2ti,sysc~revsyscsyss#! Xfck+ wPhsi@0 ti,omap4-hsi@P~sysgdd Xhsi_fck gGgdd_mpu+ w@hsi-port@2000ti,omap4-hsi-port (~txrx gChsi-port@3000ti,omap4-hsi-port08~txrx gDtarget-module@5e000ti,sysc Ydisabled+ w target-module@62000ti,sysc-omap2ti,sysc   ~revsyscsyss  XHfck+ w usbhstll@0 ti,usbhs-tll gNtarget-module@64000ti,sysc-omap4ti,sysc@@@~revsyscsyss X8fck+ w@usbhshost@0ti,usbhs-host+ w YZ[3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2ohci@800ti,ohci-omap3 gL"ehci@c00 ti,ehci-omap  gMtarget-module@66000ti,sysc-omap2ti,sysc```~revsyscsyss  \fck:]Arstctrl+ w`mmu@0ti,omap4-iommu gMsegment@80000 simple-bus+w      @@PP``pp` `p p        target-module@29000ti,sysc Ydisabled+ wtarget-module@2b000ti,sysc-omap2ti,sysc~revsyscsyss ! X@fck+ wusb_otg_hs@0ti,omap4-musbg\]mcdmaZ^b^ gusb2-phyq| _2target-module@2d000ti,sysc-omap2ti,sysc~revsyscsyss ! Xfck+ wocp2scp@0ti,omap-ocp2scp+ wusb2phy@80 ti,omap-usb2X`awkupclk^target-module@36000ti,sysc-omap2ti,sysc```~revsyscsyss! bfck+ w`target-module@4d000ti,sysc-omap2ti,sysc~revsyscsyss! bfck+ wtarget-module@59000ti,sysc-omap4-srti,sysc8~sysc cfck+ wsmartreflex@0ti,omap4-smartreflex-mpu gtarget-module@5b000ti,sysc-omap4-srti,sysc8~sysc cfck+ wsmartreflex@0ti,omap4-smartreflex-iva gftarget-module@5d000ti,sysc-omap4-srti,sysc8~sysc cfck+ wsmartreflex@0ti,omap4-smartreflex-core gtarget-module@60000ti,sysc Ydisabled+ wtarget-module@74000ti,sysc-omap4ti,sysc@@ ~revsysc  dfck+ w@mailbox@0ti,omap4-mailbox gmbox-ipu  mbox-dsp  target-module@76000ti,sysc-omap2ti,sysc```~revsyscsyss ! dfck+ w`spinlock@0ti,omap4-hwspinlocksegment@100000 simple-bus+`w  00target-module@0ti,sysc-omap4ti,syscctrl_module_pad_core ~revsysc+ wpinmux@40 ti,omap4-padconfpinctrl-single@+<' (default efjpinmux_mcpdm_pins(Epinmux_uart2_pins Empinmux_uart3_pins Ekpinmux_uart4_pinsEnpinmux_twl6040_pinsE`spinmux_dmic_pins Epinmux_mcbsp1_pins Epinmux_mcbsp2_pins Epinmux_mcspi1_pins E{pinmux_dss_hdmi_pinsEZ\^epinmux_tpd12s015_pinsE"HX fpinmux_i2c1_pinsEopinmux_i2c2_pinsExpinmux_i2c3_pinsElpinmux_i2c4_pinsEpinmux_wl12xx_gpioE<pinmux_wl12xx_pins8E:  pinmux_enet_enable_gpioE0 pinmux_ks8851_pinsE|pinmux_twl6030_pinsE^Apomap4_padconf_global@5a0sysconsimple-busp+ wpgpbias_regulator@60ti,pbias-omap4ti,pbias-omap`*gpbias_mmc_omap41pbias_mmc_omap4@w@X-target-module@2000ti,sysc Ydisabled+ w target-module@8000ti,sysc Ydisabled+ wtarget-module@a000ti,sysc-omap4ti,sysc ~revsysc  p hfck+ wsegment@180000 simple-bus+segment@200000 simple-bus+hw!!  @ @P P` `p p ! 0!0  !!`!`p!p@!@P!P!!""`"`p"p""""!!target-module@4000ti,sysc Ydisabled+ w@target-module@6000ti,sysc Ydisabled+ w`target-module@a000ti,sysc Ydisabled+ wtarget-module@c000ti,sysc Ydisabled+ wtarget-module@10000ti,sysc Ydisabled+ wtarget-module@12000ti,sysc Ydisabled+ w target-module@14000ti,sysc Ydisabled+ w@target-module@16000ti,sysc Ydisabled+ w`target-module@18000ti,sysc Ydisabled+ wtarget-module@1c000ti,sysc Ydisabled+ wtarget-module@1e000ti,sysc Ydisabled+ wtarget-module@20000ti,sysc Ydisabled+ wtarget-module@26000ti,sysc Ydisabled+ w`target-module@28000ti,sysc Ydisabled+ wtarget-module@2a000ti,sysc Ydisabled+ wsegment@280000 simple-bus+segment@300000 simple-bus+w042@@2@ `2`p2p2232 2@target-module@0ti,sysc Ydisabled+xw@@@ ``pp @interconnect@48000000ti,omap4-l4-persimple-bus0HHHHHH~aplaia0ia1ia2ia3+wH H segment@0 simple-bus+w  00@@PP``ppPP``pp  00 ` ` p p``pp``pp             @ @ ` ` @     0 0 @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscPTX~revsyscsyss! i0fck+ wserial@0ti,omap4-uart gJ`lJjdefault ktarget-module@32000ti,sysc-omap2-timerti,sysc   ~revsyscsyss' ! ifck+ w timer@0ti,omap3430-timerifcktimer_sys_ck g&target-module@34000ti,sysc-omap4-timerti,sysc@@ ~revsysc i fck+ w@timer@0ti,omap4430-timeri fcktimer_sys_ck g'target-module@36000ti,sysc-omap4-timerti,sysc`` ~revsysc i(fck+ w`timer@0ti,omap4430-timeri(fcktimer_sys_ck g(target-module@3e000ti,sysc-omap4-timerti,sysc ~revsysc i0fck+ wtimer@0ti,omap4430-timeri0fcktimer_sys_ck g-target-module@40000ti,sysc Ydisabled+ wtarget-module@55000ti,sysc-omap2ti,syscPPQ~revsyscsyss!i@i@ fckdbclk+ wPgpio@0ti,omap4-gpio g@P'<}target-module@57000ti,sysc-omap2ti,syscppq~revsyscsyss!iHiH fckdbclk+ wpgpio@0ti,omap4-gpio g@P'<target-module@59000ti,sysc-omap2ti,sysc~revsyscsyss!iPiP fckdbclk+ wgpio@0ti,omap4-gpio g @P'<ttarget-module@5b000ti,sysc-omap2ti,sysc~revsyscsyss!iXiX fckdbclk+ wgpio@0ti,omap4-gpio g!@P'<target-module@5d000ti,sysc-omap2ti,sysc~revsyscsyss!i`i` fckdbclk+ wgpio@0ti,omap4-gpio g"@P'<target-module@60000ti,sysc-omap2ti,sysc~revsyscsyss! ifck+ wi2c@0 ti,omap4-i2c g=+default l`tmp105@48 ti,tmp105Hbh1780@29 rohm,bh1780)target-module@6a000ti,sysc-omap2ti,syscPTX~revsyscsyss! i fck+ wserial@0ti,omap4-uart gH`ltarget-module@6c000ti,sysc-omap2ti,syscPTX~revsyscsyss! i(fck+ wserial@0ti,omap4-uart gI`lIjdefault mtarget-module@6e000ti,sysc-omap2ti,syscPTX~revsyscsyss! i8fck+ wserial@0ti,omap4-uart gF`lFjdefault ntarget-module@70000ti,sysc-omap2ti,sysc~revsyscsyss! ifck+ wi2c@0 ti,omap4-i2c g8+default o`twl@48H g ti,twl6030'<default pqrtcti,twl4030-rtcg regulator-vaux1ti,twl6030-vaux1@B@X-regulator-vaux2ti,twl6030-vaux2@OX*regulator-vaux3ti,twl6030-vaux3@B@X-regulator-vmmcti,twl6030-vmmc@OX-regulator-vppti,twl6030-vpp@w@X&%regulator-vusimti,twl6030-vusim@OX,@ regulator-vdacti,twl6030-vdacregulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxioregulator-vusbti,twl6030-vusbrregulator-v1v8ti,twl6030-v1v8uregulator-v2v1ti,twl6030-v2v1vusb-comparatorti,twl6030-usbg rpwmti,twl6030-pwmpwmledti,twl6030-pwmledgpadcti,twl6030-gpadcgtwl@4b ti,twl6040Kdefault s gw tuvw(wvibra7FU f target-module@72000ti,sysc-omap2ti,sysc   ~revsyscsyss! ifck+ w i2c@0 ti,omap4-i2c g9+default x`target-module@76000ti,sysc-omap4ti,sysc`` ~revsysc ifck+ w`target-module@78000ti,sysc-omap2ti,sysc~revsyscsyss ! i8fck+ welm@0ti,am3352-elm  g Ydisabledtarget-module@86000ti,sysc-omap2-timerti,sysc```~revsyscsyss' ! ifck+ w`timer@0ti,omap3430-timerifcktimer_sys_ck g.target-module@88000ti,sysc-omap4-timerti,sysc ~revsysc ifck+ wtimer@0ti,omap4430-timerifcktimer_sys_ck g/target-module@90000ti,sysc-omap2ti,sysc   ~revsysc y fck+ w rng@0 ti,omap4-rng  g4target-module@96000ti,sysc-omap2ti,sysc `~sysc  ifck+ w `mcbsp@0ti,omap4-mcbsp~mpu gcommonwzz txrx Ydisabledtarget-module@98000ti,sysc-omap4ti,sysc   ~revsysc ifck+ w spi@0ti,omap4-mcspi gA+@z#z$z%z&z'z(z)z* tx0rx0tx1rx1tx2rx2tx3rx3default {eth@0default |ks8851n6 }g~  target-module@9a000ti,sysc-omap4ti,sysc   ~revsysc ifck+ w spi@0ti,omap4-mcspi gB+ z+z,z-z.tx0rx0tx1rx1target-module@9c000ti,sysc-omap4ti,sysc   ~revsysc Xfck+ w mmc@0ti,omap4-hsmmc gSz=z>txrx target-module@9e000ti,sysc Ydisabled+ w target-module@a2000ti,sysc Ydisabled+ w target-module@a4000ti,sysc Ydisabled+w @ Ptarget-module@a5000ti,sysc-omap2ti,sysc P0 P4 P8~revsyscsyss! yfck+ w Pdes@0 ti,omap4-des gRzuzttxrxtarget-module@a8000ti,sysc Ydisabled+ w @target-module@ad000ti,sysc-omap4ti,sysc   ~revsysc ifck+ w mmc@0ti,omap4-hsmmc g^zMzNtxrx Ydisabledtarget-module@b0000ti,sysc Ydisabled+ w target-module@b2000ti,sysc-omap2ti,sysc   ~revsyscsyss!\ ihfck+ w 1w@0 ti,omap3-1w g:target-module@b4000ti,sysc-omap4ti,sysc @ @ ~revsysc Xfck+ w @mmc@0ti,omap4-hsmmc gVz/z0txrx target-module@b8000ti,sysc-omap4ti,sysc   ~revsysc ifck+ w spi@0ti,omap4-mcspi g[+zztx0rx0target-module@ba000ti,sysc-omap4ti,sysc   ~revsysc ifck+ w spi@0ti,omap4-mcspi g0+zFzGtx0rx0target-module@d1000ti,sysc-omap4ti,sysc   ~revsysc ifck+ w mmc@0ti,omap4-hsmmc g`z9z:txrx Ydisabledtarget-module@d5000ti,sysc-omap4ti,sysc P P ~revsysc i@fck+ w Pmmc@0ti,omap4-hsmmc g;z;z<txrxdefault  $+wlcore@2 ti,wl1281 g7Ksegment@200000 simple-bus+w55target-module@150000ti,sysc-omap2ti,sysc~revsyscsyss! ifck+ wi2c@0 ti,omap4-i2c g>+default `hmc5843@1ehoneywell,hmc5843interconnect@40100000ti,omap4-l4-abesimple-pm-bus@@~laap`+w@IIsegment@0simple-pm-bus+0w  00@@PP``pp  00      IIIII I I0I0I@I@IPIPI`I`IpIpIIIIIIIIIIIIIIIII I I0I0IIIIIIIIIIIIIIIIIIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,sysc ~sysc  I(fck+w I I mcbsp@0ti,omap4-mcbspI ~mpudma gcommonwz!z"txrxYokaydefault target-module@24000ti,sysc-omap2ti,sysc@~sysc  I0fck+w@I@I@mcbsp@0ti,omap4-mcbspI@~mpudma gcommonwzztxrxYokaydefault target-module@26000ti,sysc-omap2ti,sysc`~sysc  I8fck+w`I`I`mcbsp@0ti,omap4-mcbspI`~mpudma gcommonwzztxrx Ydisabledtarget-module@28000ti,sysc-mcaspti,sysc ~revsysc I fck+wIItarget-module@2a000ti,sysc Ydisabled+wIItarget-module@2e000ti,sysc-omap4ti,sysc ~revsysc Ifck+wIIdmic@0ti,omap4-dmicI~mpudma grzCup_linkYokaydefault target-module@30000ti,sysc-omap2ti,sysc~revsyscsyss"! Ihfck+wIIwdt@0ti,omap4-wdtti,omap3-wdt gPtarget-module@32000ti,sysc-omap4ti,sysc   ~revsysc Ifck+w I I Yokaydefault mcpdm@0ti,omap4-mcpdmI ~mpudma gpzAzBup_linkdn_linkpdmclktarget-module@38000ti,sysc-omap4-timerti,sysc ~revsysc IHfck+wIItimer@0ti,omap4430-timerIIHfcktimer_sys_ck g)ntarget-module@3a000ti,sysc-omap4-timerti,sysc ~revsysc IPfck+wIItimer@0ti,omap4430-timerIIPfcktimer_sys_ck g*ntarget-module@3c000ti,sysc-omap4-timerti,sysc ~revsysc IXfck+wIItimer@0ti,omap4430-timerIIXfcktimer_sys_ck g+ntarget-module@3e000ti,sysc-omap4-timerti,sysc ~revsysc I`fck+wIItimer@0ti,omap4430-timerII`fcktimer_sys_ck g,ntarget-module@80000ti,sysc Ydisabled+wIItarget-module@a0000ti,sysc Ydisabled+w I I target-module@c0000ti,sysc Ydisabled+w I I target-module@f1000ti,sysc-omap4ti,sysc ~revsysc  Ifck+wIIsram@40304000 mmio-sram@0@gpmc@50000000ti,omap4430-gpmcP+ gzrxtx{gpmcHfck'<@Ptarget-module@52000000ti,sysc-omap4ti,syscissRR ~revsyscp hfck+ wRtarget-module@55082000ti,sysc-omap2ti,syscU U U ~revsyscsyss  fck:Arstctrl wU +mmu@0ti,omap4-iommu gdMtarget-module@4012c000ti,sysc-omap4ti,sysc@@ ~revsysc I@fck+w@IIdmm@4e000000 ti,omap4-dmmN gqdmmemif@4c000000 ti,emif-4dL gnemif1 emif@4d000000 ti,emif-4dM goemif2 dsp ti,omap4-dsp !,:] \3omap4-dsp-fw.xe64TA Ydisabledipu@55020000 ti,omap4-ipuU~l2ram,: 3omap4-ipu-fw.xem3A Ydisabledtarget-module@4b501000ti,sysc-omap2ti,syscKPKPKP~revsyscsyss! yfck+ wKPaes@0 ti,omap4-aes gUzozntxrxtarget-module@4b701000ti,sysc-omap2ti,syscKpKpKp~revsyscsyss! yfck+ wKpaes@0 ti,omap4-aes g@zrzqtxrxtarget-module@4b100000ti,sysc-omap3-shamti,syscKKK~revsyscsyss ! y(fck+ wKsham@0ti,omap4-sham g3zwrxregulator-abb-mpu ti,abb-v21abb_mpu+Ha2rYokayJ0{J0`~base-addressint-addressxO1regulator-abb-iva ti,abb-v21abb_iva+Ha2r YdisabledJ0{J0`~base-addressint-addresstarget-module@56000000ti,sysc-omap4ti,syscVV ~revsysc fck+ wV 'target-module@58000000ti,sysc-omap2ti,syscXX ~revsyss!0 fckhdmi_clksys_clktv_clk+ wXdss@0 ti,omap4-dssYokay fck+ wtarget-module@1000ti,sysc-omap2ti,sysc~revsyscsyss  !  fcksys_clk+ wdispc@0ti,omap4-dispc g fcktarget-module@2000ti,sysc-omap2ti,sysc   ~revsyscsyss !  fcksys_clk+ w encoder@0 YdisabledHfckicktarget-module@3000ti,sysc-omap2ti,sysc0~rev sys_clk+ w0encoder@0ti,omap4-venc Ydisabled fcktarget-module@4000ti,sysc-omap2ti,sysc@@@~revsyscsyss !+ w@encoder@0 ti,omap4-dsi@ ~protophypll g5Yokay  fcksys_clk+portendpointpanel@0tpo,taalpanel-dsi-cmlcd0 tportendpointtarget-module@5000ti,sysc-omap2ti,syscPPP~revsyscsyss !+ wPencoder@0 ti,omap4-dsi@ ~protophypll gTYokay  fcksys_clk+portendpointpanel@0tpo,taalpanel-dsi-cmlcd1 tportendpointtarget-module@6000ti,sysc-omap4ti,sysc`` ~revsysc  fckdss_clk+ w` encoder@0ti,omap4-hdmi ~wppllphycore geYokay  fcksys_clkzL audio_txportendpointbandgap@4a002260J"`J#,ti,omap4430-bandgap thermal-zonescpu_thermal N tripscpu_alert  passivecpu_crit H  criticalcooling-mapsmap0 $ )lpddr2#Elpida,ECB240ABACNjedec,lpddr2-s4 8 @  I W d p       lpddr2-timings@0jedec,lpddr2-timings  ׄ R FP :  ' L L L : | +P 0_ 6~@ <B@ Dp Pplpddr2-timings@1jedec,lpddr2-timings   R FP :  ' ' L L : | +P 0_ 6~@ <B@ Dp Ppmemory@80000000memoryЀ@fixedregulator-vdd-ethdefault regulator-fixed1VDD_ETH@2ZX2Z } c ua~fixedregulator-vbatregulator-fixed1VBAT@98pX98p cwleds gpio-ledsdebug0omap4:green:debug0 }debug1omap4:green:debug1 debug2omap4:green:debug2 debug3omap4:green:debug3 debug4omap4:green:debug4 }user1omap4:blue:user  user2omap4:red:user  user3omap4:green:user  pwmleds pwm-ledskpadomap4::keypad w5 chargingomap4:green:chrg w5 backlightpwm-backlight w58 (2<FPZdnx soundti,abe-twl6040 SDP4430  I   { Headset StereophoneHSOLHeadset StereophoneHSOREarphone SpkEPExt SpkHFLExt SpkHFRLine OutAUXLLine OutAUXRVibratorVIBRALVibratorVIBRARHSMICHeadset MicHeadset MicHeadset Mic BiasMAINMICMain Handset MicMain Handset MicMain Mic BiasSUBMICSub Handset MicSub Handset MicMain Mic BiasAFMLLine InAFMRLine InDMicDigital MicDigital MicDigital Mic1 Biaswl12xx_vmmcdefault regulator-fixed1vwl1271@w@Xw@ } upencoder ti,tpd12s015$}} }ports+port@0endpointport@1endpointconnectorhdmi-connectorhdmicportendpoint compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3mmc0mmc1mmc2mmc3mmc4serial0serial1serial2serial3rproc0rproc1display0display1display2device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleti,hwmodsinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptssramrangesreg-namesti,sysc-sidle#clock-cellsti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividers#reset-cells#power-domain-cellsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentskeypad,num-rowskeypad,num-columnslinux,keymaplinux,input-no-autorepeat#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesremote-wakeup-connectedresetsreset-names#iommu-cellsusb-phyphysphy-namesmultipointnum-epsram-bitsctrl-moduleinterface-typemodepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellspinctrl-namespinctrl-0sysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highvddvibl-supplyvddvibr-supplyti,vibldrv-resti,vibrdrv-resti,viblmotor-resti,vibrmotor-resti,buffer-sizedmasdma-namesti,spi-num-csspi-max-frequencyvdd-supplyreset-gpiosti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removablecap-power-off-cardref-clock-frequencytcxo-clock-frequencypower-domainsti,timer-dspgpmc,num-csgpmc,num-waitpinsti,no-idle-on-initti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertcs1-useddevice-handleti,bootregiommusfirmware-namemboxesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_inforemote-endpointlaneslabelvdda-supply#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicedensityio-widthtRPab-min-tcktRCD-min-tcktWR-min-tcktRASmin-min-tcktRRD-min-tcktWTR-min-tcktXP-min-tcktRTP-min-tcktCKE-min-tcktCKESR-min-tcktFAW-min-tckmin-freqmax-freqtRPabtRCDtWRtRAS-mintRRDtWTRtXPtRTPtCKESRtDQSCK-maxtFAWtZQCStZQCLtZQinittRAS-max-nstDQSCK-max-deratedregulator-boot-onstartup-delay-uspwmsmax-brightnessbrightness-levelsdefault-brightness-levelti,modelti,jack-detectionti,mclk-freqti,mcpdmti,dmicti,twl6040ti,audio-routing