C89( 9\compulab,omap5-cm-t54ti,omap5&7CompuLab CM-T54chosenaliases?=/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?B/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?G/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0?L/ocp/interconnect@48000000/segment@0/target-module@7a000/i2c@0?Q/ocp/interconnect@48000000/segment@0/target-module@7c000/i2c@0?V/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0?[/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0?`/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0?e/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0?j/ocp/interconnect@48000000/segment@0/target-module@d5000/mmc@0Bo/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Bw/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@66000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@68000/serial@0 /ocp/dsp/ocp/ipu@55020000 /connector0 /connector1 /displaycpuscpu@0cpuarm,cortex-a15B@,`cpu %cpu@1cpuarm,cortex-a15B@,`cpu thermal-zonescpu_thermal-CQaAtripscpu_alertnzpassive%cpu_critnHz criticalcooling-mapsmap0 gpu_thermal-CQauPtripsgpu_critnHz criticalcore_thermal-CQatripscore_critnHz criticaltimerarm,armv7-timer0   &pmuarm,cortex-a15-pmuinterrupt-controller@48211000arm,cortex-a15-gic@H!H! H!@ H!` &%interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(&%socti,omap-inframpu ti,omap4-mpumpuocpti,omap5-l3-nocsimple-busl3_main_1l3_main_2l3_main_30D D0E@  interconnect@4ae00000ti,omap5-l4-wkupsimple-busJJJ aplaia0$JJJsegment@0 simple-bus`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc@@ revsysc 0fck @counter@0ti,omap-counter32k@target-module@6000ti,sysc-omap4ti,sysc`rev ` prm@0ti,omap5-prmsimple-bus     clockssys_clkin@110 ti,mux-clock %abe_dpll_bypass_clk_mux@108 ti,mux-clock%1abe_dpll_clk_mux@10c ti,mux-clock %0custefuse_sys_gfclk_divfixed-factor-clock'2dss_syc_gfclk_divfixed-factor-clock'2%Hwkupaon_iclk_mux@108 ti,mux-clock%l3instr_ts_gclk_divfixed-factor-clock'2clockdomainswkupaon_cm@1900 ti,omap4-cm clk@20 ti,clkctrl \% prm@400#ti,omap5-prm-instti,omap-prm-inst<%jprm@500#ti,omap5-prm-instti,omap-prm-instI%prm@700#ti,omap5-prm-instti,omap-prm-inst<%prm@1200#ti,omap5-prm-instti,omap-prm-inst<prm@1c00#ti,omap5-prm-instti,omap-prm-inst<target-module@a000ti,sysc-omap4ti,syscrev scrm@0ti,omap5-scrmclocksauxclk0_src_gate_ck@310 ti,composite-no-wait-gate-clock]%auxclk0_src_mux_ck@310ti,composite-mux-clock ]%auxclk0_src_ckti,composite-clock%auxclk0_ck@310ti,divider-clock]j%&auxclk1_src_gate_ck@314 ti,composite-no-wait-gate-clock]%auxclk1_src_mux_ck@314ti,composite-mux-clock ]%auxclk1_src_ckti,composite-clock%auxclk1_ck@314ti,divider-clock]j%'auxclk2_src_gate_ck@318 ti,composite-no-wait-gate-clock]%auxclk2_src_mux_ck@318ti,composite-mux-clock ]%auxclk2_src_ckti,composite-clock%auxclk2_ck@318ti,divider-clock]j%(auxclk3_src_gate_ck@31c ti,composite-no-wait-gate-clock]% auxclk3_src_mux_ck@31cti,composite-mux-clock ]%!auxclk3_src_ckti,composite-clock !%"auxclk3_ck@31cti,divider-clock"]j%)auxclk4_src_gate_ck@320 ti,composite-no-wait-gate-clock] %#auxclk4_src_mux_ck@320ti,composite-mux-clock ] %$auxclk4_src_ckti,composite-clock#$%%auxclk4_ck@320ti,divider-clock%]j %*auxclkreq0_ck@210 ti,mux-clock&'()*]auxclkreq1_ck@214 ti,mux-clock&'()*]auxclkreq2_ck@218 ti,mux-clock&'()*]auxclkreq3_ck@21c ti,mux-clock&'()*]clockdomainstarget-module@c000ti,sysc-omap4ti,syscrev pinmux@840 ti,omap5-padconfpinctrl-single@<upinmux_ads7846_pins%vpinmux_palmas_sys_nirq_pins(%pomap5_scm_wkup_pad_conf@da0&ti,omap5-scm-wkup-pad-confsimple-bus ` `scm_conf@0sysconsimple-bus` `clocks@0fref_xtal_ckti,gate-clock]segment@10000 simple-bus`@@PPtarget-module@0ti,sysc-omap2ti,syscrevsyscsyss   fckdbclk gpio@0ti,omap4-gpio %xtarget-module@4000ti,sysc-omap2ti,sysc@@@revsyscsyss" fck @wdt@0ti,omap5-wdtti,omap3-wdt Ptarget-module@8000ti,sysc-omap4-timerti,sysc revsysc fck /timer@0ti,omap5430-timer fcktimer_sys_ck %: I Ytarget-module@c000ti,sysc-omap2ti,sysc revsysc"  Xfck keypad@0ti,omap4-keypadsegment@20000 simple-bus``  00pptarget-module@0ti,sysc pdisabled target-module@2000ti,sysc pdisabled  target-module@6000ti,sysc pdisabledH`p (*0interconnect@4a000000ti,omap5-l4-cfgsimple-busJJJ aplaia0TJJJJ J (J(0J0segment@0 simple-bush 00@@PP``pp  00 ``pp @@PP@@@PP``target-module@2000ti,sysc-omap4ti,sysc rev  scm@0ti,omap5-scm-coresimple-bus scm_conf@0syscon%kscm@800%ti,omap5-scm-padconf-coresimple-bus pinmux@40 ti,omap5-padconfpinctrl-single@uwdefault+,pinmux_led_gpio_pinsp%+pinmux_i2c1_pins%opinmux_i2c2_pinsxz%rpinmux_mmc1_pins0%zpinmux_mmc2_pinsP  %pinmux_mmc3_pins0dfhjln%|pinmux_wlan_gpios_pins\^%}pinmux_usbhost_pins0hv%,pinmux_dss_hdmi_pins%pinmux_lcd_pins2%pinmux_hdmi_conn_pins%pinmux_dss_dpi_pins%pinmux_mcspi1_pins %uomap5_padconf_global@5a0sysconsimple-bus %-pbias_regulator@60ti,pbias-omap5ti,pbias-omap`-pbias_mmc_omap5pbias_mmc_omap5w@2Z%ytarget-module@4000ti,sysc-omap4ti,sysc@rev @cm_core_aon@0 ti,omap5-cm-core-aonsimple-bus  clockspad_clks_src_ck fixed-clock%.pad_clks_ck@108ti,gate-clock.]%Ksecure_32k_clk_src_ck fixed-clockslimbus_src_clk fixed-clock%/slimbus_clk@108ti,gate-clock/] %Esys_32k_ck fixed-clock%virt_12000000_ck fixed-clock% virt_13000000_ck fixed-clock]@% virt_16800000_ck fixed-clockY% virt_19200000_ck fixed-clock$% virt_26000000_ck fixed-clock%virt_27000000_ck fixed-clock%virt_38400000_ck fixed-clockI%xclk60mhsp1_ck fixed-clock%exclk60mhsp2_ck fixed-clock%fdpll_abe_ck@1e0ti,omap4-dpll-m4xen-clock01%2dpll_abe_x2_ckti,omap4-dpll-x2-clock2%3dpll_abe_m2x2_ck@1f0ti,divider-clock3j%4abe_24m_fclkfixed-factor-clock4'2%Gabe_clk@108ti,divider-clock4j%Fabe_iclk@528ti,divider-clock5](abe_lp_clk_divfixed-factor-clock4'2%dpll_abe_m3x2_ck@1f4ti,divider-clock3j%6dpll_core_byp_mux@12c ti,mux-clock6],%7dpll_core_ck@120ti,omap4-dpll-core-clock7 $,(%8dpll_core_x2_ckti,omap4-dpll-x2-clock8%9dpll_core_h21x2_ck@150ti,divider-clock9j?P%:c2c_fclkfixed-factor-clock:'2%;c2c_iclkfixed-factor-clock;'2dpll_core_h11x2_ck@138ti,divider-clock9j?8dpll_core_h12x2_ck@13cti,divider-clock9j?<%<dpll_core_h13x2_ck@140ti,divider-clock9j?@dpll_core_h14x2_ck@144ti,divider-clock9j?D%\dpll_core_h22x2_ck@154ti,divider-clock9j?Tdpll_core_h23x2_ck@158ti,divider-clock9j?Xdpll_core_h24x2_ck@15cti,divider-clock9j?\dpll_core_m2_ck@130ti,divider-clock8j0dpll_core_m3x2_ck@134ti,divider-clock9j4%iva_dpll_hs_clk_divfixed-factor-clock<'2%=dpll_iva_byp_mux@1ac ti,mux-clock=]%>dpll_iva_ck@1a0ti,omap4-dpll-clock>I?Ep}@%?dpll_iva_x2_ckti,omap4-dpll-x2-clock?%@dpll_iva_h11x2_ck@1b8ti,divider-clock@j?IA`%Adpll_iva_h12x2_ck@1bcti,divider-clock@j?IB$%Bmpu_dpll_hs_clk_divfixed-factor-clock<'2%Cdpll_mpu_ck@160ti,omap5-mpu-dpll-clockC`dlh%dpll_mpu_m2_ck@170ti,divider-clockjpper_dpll_hs_clk_divfixed-factor-clock6'2%Lusb_dpll_hs_clk_divfixed-factor-clock6'2%Rl3_iclk_div@100ti,divider-clockj]<%Dgpu_l3_iclkfixed-factor-clockD'2l4_root_clk_div@100ti,divider-clockj]Dslimbus1_slimbus_clk@560ti,gate-clockE] `aess_fclk@528ti,divider-clockF]j(%5mcasp_sync_mux_ck@540 ti,mux-clock GHI]@%Jmcasp_gfclk@540 ti,mux-clock JKE]@dummy_ck fixed-clockclockdomainsmpu_cm@300 ti,omap4-cm clk@20 ti,clkctrl dsp_cm@400 ti,omap4-cm clk@20 ti,clkctrl %iabe_cm@500 ti,omap4-cm clk@20 ti,clkctrl d%target-module@8000ti,sysc-omap4ti,syscrev  cm_core@0ti,omap5-cm-coresimple-bus   clocksdpll_per_byp_mux@14c ti,mux-clockL]L%Mdpll_per_ck@140ti,omap4-dpll-clockM@DLH%Ndpll_per_x2_ckti,omap4-dpll-x2-clockN%Odpll_per_h11x2_ck@158ti,divider-clockOj?X%Udpll_per_h12x2_ck@15cti,divider-clockOj?\dpll_per_h14x2_ck@164ti,divider-clockOj?d%]dpll_per_m2_ck@150ti,divider-clockNjP%Wdpll_per_m2x2_ck@150ti,divider-clockOjP%Vdpll_per_m3x2_ck@154ti,divider-clockOjT%dpll_unipro1_ck@200ti,omap4-dpll-clock %Pdpll_unipro1_clkdcoldofixed-factor-clockP'2%Zdpll_unipro1_m2_ck@210ti,divider-clockPj%[dpll_unipro2_ck@1c0ti,omap4-dpll-clock%Qdpll_unipro2_clkdcoldofixed-factor-clockQ'2dpll_unipro2_m2_ck@1d0ti,divider-clockQjdpll_usb_byp_mux@18c ti,mux-clockR]%Sdpll_usb_ck@180ti,omap4-dpll-j-type-clockS%Tdpll_usb_clkdcoldofixed-factor-clockT'2dpll_usb_m2_ck@190ti,divider-clockTj%Xfunc_128m_clkfixed-factor-clockU'2func_12m_fclkfixed-factor-clockV'2func_24m_clkfixed-factor-clockW'2%Ifunc_48m_fclkfixed-factor-clockV'2func_96m_fclkfixed-factor-clockV'2%Yl3init_60m_fclk@104ti,divider-clockX%diss_ctrlclk@1320ti,gate-clockY] lli_txphy_clk@f20ti,gate-clockZ] lli_txphy_ls_clk@f20ti,gate-clock[]  usb_phy_cm_clk32k@640ti,gate-clock]@%lfdif_fclk@1328ti,divider-clockU]j(gpu_core_gclk_mux@1520 ti,mux-clock\]] gpu_hyd_gclk_mux@1520 ti,mux-clock\]] hsi_fclk@1638ti,divider-clockV]j8clockdomainsl3init_clkdmti,clockdomainTl3main1_cm@700 ti,omap4-cm clk@20 ti,clkctrl l3main2_cm@800 ti,omap4-cm clk@20 ti,clkctrl ipu_cm@900 ti,omap4-cm   clk@20 ti,clkctrl %dma_cm@a00 ti,omap4-cm   clk@20 ti,clkctrl %cemif_cm@b00 ti,omap4-cm   clk@20 ti,clkctrl l4cfg_cm@d00 ti,omap4-cm   clk@20 ti,clkctrl %ml3instr_cm@e00 ti,omap4-cm clk@20 ti,clkctrl l4per_cm@1000 ti,omap4-cm clock@20ti,clkctrl-l4perti,clkctrl \%nclock@1a0ti,clkctrl-l4secti,clkctrl<%sdss_cm@1400 ti,omap4-cm clk@20 ti,clkctrl %gpu_cm@1500 ti,omap4-cm clk@20 ti,clkctrl %l3init_cm@1600 ti,omap4-cm clk@20 ti,clkctrl %^target-module@20000ti,sysc-omap4ti,sysc revsysc ^fck omap_dwc3@0ti,dwc3 ]* 4_;`dwc3@10000 snps,dwc3$\\]GperipheralhostotgWab\usb2-phyusb3-phy fperipheraltarget-module@56000ti,sysc-omap2ti,sysc``,`(revsyscsyss#   cfck `dma-controller@0ti,omap4430-sdmati,omap-sdma0  ny %ttarget-module@58000ti,sysc pdisabled0 0target-module@5e000ti,sysc pdisabled  target-module@62000ti,sysc-omap2ti,sysc   revsyscsyss  ^Hfck  usbhstll@0 ti,usbhs-tll Ntarget-module@64000ti,sysc-omap4ti,sysc@@ revsysc ^8fck @usbhshost@0ti,usbhs-host  def3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 ehci-hsic ehci-hsicohci@800ti,ohci-omap3 Lehci@c00 ti,ehci-omap  M Wghtarget-module@66000ti,sysc-omap2ti,sysc```revsyscsyss  ifckjrstctrl `mmu@0ti,omap4-iommu %target-module@70000ti,sysc pdisabled @target-module@75000ti,sysc pdisabled Psegment@80000 simple-bus      @@PP``pp` `p p  @@@PP``pp @@ @P P` `p p  @@ @P P` `p p target-module@0ti,sysc-omap2ti,syscrevsyscsyss  ^fck<@@@PP``ppocp2scp@0ti,omap-ocp2scp usb2phy@4000 ti,omap-usb2@|kl^wkupclkrefclk%ausb3phy@4400 ti,omap-usb3DHdL@phy_rxphy_txpll_ctrlkpl^wkupclksysclkrefclk%btarget-module@10000ti,sysc-omap2ti,syscrevsyscsyss  ^fck<@@@PP``ppocp2scp@0ti,omap-ocp2scp phy@6000ti,phy-pipe3-sata`ddh@phy_rxphy_txpll_ctrlkt^hsysclkrefclk%target-module@20000ti,sysc pdisabled<@@@PP``pptarget-module@36000ti,sysc pdisabled `target-module@4d000ti,sysc pdisabled target-module@59000ti,sysc pdisabled target-module@5b000ti,sysc pdisabled target-module@5d000ti,sysc pdisabled target-module@60000ti,sysc pdisabled target-module@74000ti,sysc-omap4ti,sysc@@ revsysc  mfck @mailbox@0ti,omap4-mailbox  %mbox-ipu - 8%mbox-dsp - 8%target-module@76000ti,sysc-omap2ti,sysc```revsyscsyss  mfck `spinlock@0ti,omap4-hwspinlockCsegment@100000 simple-bus`  00target-module@2000ti,sysc pdisabled  target-module@8000ti,sysc pdisabled target-module@a000ti,sysc pdisabled target-module@40000ti,sysc pdisabled segment@180000 simple-bussegment@200000 simple-bus!!  ` `p p@ @P P ! 0!0  !!`!`p!p@!@P!P!!""`"`p"p""""!!!!@"@P"P 0 0   " 0"0target-module@2000ti,sysc pdisabled  target-module@4000ti,sysc pdisabled @target-module@6000ti,sysc pdisabled `target-module@8000ti,sysc pdisabled target-module@a000ti,sysc pdisabled target-module@c000ti,sysc pdisabled target-module@10000ti,sysc pdisabled target-module@12000ti,sysc pdisabled  target-module@14000ti,sysc pdisabled @target-module@16000ti,sysc pdisabled `target-module@18000ti,sysc pdisabled target-module@1a000ti,sysc pdisabled target-module@1c000ti,sysc pdisabled target-module@1e000ti,sysc pdisabled target-module@20000ti,sysc pdisabled target-module@22000ti,sysc pdisabled  target-module@24000ti,sysc pdisabled @target-module@26000ti,sysc pdisabled `target-module@28000ti,sysc pdisabled target-module@2a000ti,sysc pdisabled segment@280000 simple-bussegment@300000 simple-businterconnect@48000000ti,omap5-l4-persimple-bus0HHHHHHaplaia0ia1ia2ia3H H segment@0 simple-bus  00@@PP``ppPP``pp  0000@@  0 0``pp          @ @ P P ` ` @   ``pp @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscPTXrevsyscsyss n0fck serial@0ti,omap4-uart Jltarget-module@32000ti,sysc-omap4-timerti,sysc   revsysc nfck  timer@0ti,omap5430-timernfcktimer_sys_ck &target-module@34000ti,sysc-omap4-timerti,sysc@@ revsysc n fck @timer@0ti,omap5430-timern fcktimer_sys_ck 'target-module@36000ti,sysc-omap4-timerti,sysc`` revsysc n(fck `timer@0ti,omap5430-timern(fcktimer_sys_ck (target-module@3e000ti,sysc-omap4-timerti,sysc revsysc n0fck timer@0ti,omap5430-timern0fcktimer_sys_ck -Qtarget-module@51000ti,sysc-omap2ti,syscrevsyscsyssnn fckdbclk gpio@0ti,omap4-gpio #%target-module@53000ti,sysc-omap2ti,sysc001revsyscsyssnn fckdbclk 0gpio@0ti,omap4-gpio y%target-module@55000ti,sysc-omap2ti,syscPPQrevsyscsyssn@n@ fckdbclk Pgpio@0ti,omap4-gpio target-module@57000ti,sysc-omap2ti,syscppqrevsyscsyssnHnH fckdbclk pgpio@0ti,omap4-gpio %target-module@59000ti,sysc-omap2ti,syscrevsyscsyssnPnP fckdbclk gpio@0ti,omap4-gpio  %target-module@5b000ti,sysc-omap2ti,syscrevsyscsyssnXnX fckdbclk gpio@0ti,omap4-gpio !target-module@5d000ti,sysc-omap2ti,syscrevsyscsyssn`n` fckdbclk gpio@0ti,omap4-gpio "target-module@60000ti,sysc-omap2ti,syscrevsyscsyss nfck i2c@0 ti,omap4-i2c =target-module@66000ti,sysc-omap2ti,sysc`P`T`Xrevsyscsyss nPfck `serial@0ti,omap4-uart iltarget-module@68000ti,sysc-omap2ti,syscPTXrevsyscsyss nXfck serial@0ti,omap4-uart jltarget-module@6a000ti,sysc-omap2ti,syscPTXrevsyscsyss n fck serial@0ti,omap4-uart Hltarget-module@6c000ti,sysc-omap2ti,syscPTXrevsyscsyss n(fck serial@0ti,omap4-uart Iltarget-module@6e000ti,sysc-omap2ti,syscPTXrevsyscsyss n8fck serial@0ti,omap4-uart Fltarget-module@70000ti,sysc-omap2ti,syscrevsyscsyss nfck i2c@0 ti,omap4-i2c 8wdefaultoat24@50 atmel,24c02^Ppalmas@48 ti,palmasHpwdefault g%qpalmas_usbti,palmas-usb-vid%_rtcti,palmas-rtc&qpalmas_pmicti,palmas-pmic&q Gshort-irqregulatorssmps123smps123 '`%smps45smps45 '0smps6smps6``smps7smps7w@w@smps8smps8 '0smps9smps92Z2Zsmps10_out2 smps10_out2LK@LK@smps10_out1 smps10_out1LK@LK@%`ldo1ldo1w@w@ldo2ldo22Z2Z%ldo3ldo3``ldo4ldo4w@w@%ldo5ldo5w@w@ldo6ldo6OOldo7ldo7 pdisabledldo8ldo8--ldo9ldo9w@-%{ldolnldolnw@w@ldousbldousb1P1Pregen3regen3target-module@72000ti,sysc-omap2ti,sysc   revsyscsyss nfck  i2c@0 ti,omap4-i2c 9wdefaultr%target-module@78000ti,sysc pdisabled target-module@7a000ti,sysc-omap2ti,syscrevsyscsyss nfck i2c@0 ti,omap4-i2c >target-module@7c000ti,sysc-omap2ti,syscrevsyscsyss nHfck i2c@0 ti,omap4-i2c <target-module@86000ti,sysc-omap4-timerti,sysc`` revsysc nfck `timer@0ti,omap5430-timernfcktimer_sys_ck .Qtarget-module@88000ti,sysc-omap4-timerti,sysc revsysc nfck timer@0ti,omap5430-timernfcktimer_sys_ck /Qtarget-module@90000ti,sysc-omap2ti,sysc   revsysc s fck  rng@0 ti,omap4-rng  4target-module@98000ti,sysc-omap4ti,sysc   revsysc nfck  spi@0ti,omap4-mcspi A@ t#t$t%t&t't(t)t* %tx0rx0tx1rx1tx2rx2tx3rx3target-module@9a000ti,sysc-omap4ti,sysc   revsysc nfck  spi@0ti,omap4-mcspi B  t+t,t-t.%tx0rx0tx1rx1wdefaultuads7846@0wdefaultv ti,ads7846/w:`&x LxYbkt} target-module@9c000ti,sysc-omap4ti,sysc   revsysc ^fck  mmc@0ti,omap4-hsmmc S t=t>%txrxywdefaultz {target-module@a2000ti,sysc pdisabled  target-module@a4000ti,sysc pdisabled @ Ptarget-module@a5000ti,sysc-omap2ti,sysc P0 P4 P8revsyscsyss sfck  P pdisableddes@0 ti,omap4-des R tutt%txrxtarget-module@a8000ti,sysc pdisabled  @target-module@ad000ti,sysc-omap4ti,sysc   revsysc nfck  mmc@0ti,omap4-hsmmc ^ tMtN%txrxwdefault|} ~"target-module@b2000ti,sysc pdisabled  target-module@b4000ti,sysc-omap4ti,sysc @ @ revsysc ^fck  @mmc@0ti,omap4-hsmmc V t/t0%txrxwdefault "target-module@b8000ti,sysc-omap4ti,sysc   revsysc nfck  spi@0ti,omap4-mcspi [ tt%tx0rx0target-module@ba000ti,sysc-omap4ti,sysc   revsysc nfck  spi@0ti,omap4-mcspi 0 tFtG%tx0rx0target-module@d1000ti,sysc-omap4ti,sysc   revsysc nfck  mmc@0ti,omap4-hsmmc ` t9t:%txrx pdisabledtarget-module@d5000ti,sysc-omap4ti,sysc P P revsysc n@fck  Pmmc@0ti,omap4-hsmmc ; t;t<%txrx pdisabledsegment@200000 simple-businterconnect@40100000ti,omap5-l4-abesimple-pm-bus@@laap3@IIsegment@0simple-pm-bus0  00@@PP``pp  00      IIIII I I0I0I@I@IPIPI`I`IpIpIIIIIIIIIIIIIIIII I I0I0IIIIIIIIIIIIIIIIIIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,sysc sysc  (fck I I mcbsp@0ti,omap4-mcbspI mpudma GcommonA t!t"%txrx pdisabledtarget-module@24000ti,sysc-omap2ti,sysc@sysc  0fck@I@I@mcbsp@0ti,omap4-mcbspI@mpudma GcommonA tt%txrx pdisabledtarget-module@26000ti,sysc-omap2ti,sysc`sysc  8fck`I`I`mcbsp@0ti,omap4-mcbspI`mpudma GcommonA tt%txrx pdisabledtarget-module@28000ti,sysc pdisabledIItarget-module@2a000ti,sysc pdisabledIItarget-module@2e000ti,sysc-omap4ti,sysc revsysc fckIIdmic@0ti,omap4-dmicImpudma r tC%up_link pdisabledtarget-module@30000ti,sysc pdisabledIItarget-module@32000ti,sysc-omap4ti,sysc   revsysc fck I I  pdisabledmcpdm@0ti,omap4-mcpdmI mpudma p tAtB%up_linkdn_linktarget-module@38000ti,sysc-omap4-timerti,sysc revsysc HfckIItimer@0ti,omap5430-timerIHHfcktimer_sys_ck )PQtarget-module@3a000ti,sysc-omap4-timerti,sysc revsysc PfckIItimer@0ti,omap5430-timerIPHfcktimer_sys_ck *PQtarget-module@3c000ti,sysc-omap4-timerti,sysc revsysc XfckIItimer@0ti,omap5430-timerIXHfcktimer_sys_ck +Ptarget-module@3e000ti,sysc-omap4-timerti,sysc revsysc `fckIItimer@0ti,omap5430-timerI`Hfcktimer_sys_ck ,PQtarget-module@80000ti,sysc pdisabledIItarget-module@a0000ti,sysc pdisabled I I target-module@c0000ti,sysc pdisabled I I target-module@f1000ti,sysc-omap4ti,sysc revsysc  fckIIsram@40300000 mmio-sram@0%gpmc@50000000ti,omap4430-gpmcP  t%rxtx]igpmcDfcktarget-module@55082000ti,sysc-omap2ti,syscU U U revsyscsyss  fckrstctrl U mmu@0ti,omap4-iommu d{%dsp ti,omap5-dsp kj iomap5-dsp-fw.xe64T pdisabledipu@55020000 ti,omap5-ipuUl2ram omap5-ipu-fw.xem4 pdisableddmm@4e000000 ti,omap5-dmmN qdmmemif@4c000000 ti,emif-4d5emif1L nemif@4d000000 ti,emif-4d5emif2M otarget-module@4b501000ti,sysc-omap2ti,syscKPKPKPrevsyscsyss sfck KPaes@0 ti,omap4-aes U totn%txrxtarget-module@4b701000ti,sysc-omap2ti,syscKpKpKprevsyscsyss sfck Kpaes@0 ti,omap4-aes @ trtq%txrxtarget-module@4b100000ti,sysc-omap3-shamti,syscKKKrevsyscsyss  s(fck Ksham@0ti,omap4-sham 3 tw%rxbandgap@4a0021e0 J! J#, J#,J#< ~ti,omap5430-bandgap%sata@4a141100snps,dwc-ahciJJ 6W \sata-phy ^hsata)target-module@56000000ti,sysc-omap4ti,syscVV revsysc   fck Vtarget-module@58000000ti,sysc-omap2ti,syscXX revsyss0 fckhdmi_clksys_clktv_clk Xdss@0 ti,omap5-dsspokay fck wdefaulttarget-module@1000ti,sysc-omap2ti,syscrevsyscsyss   fck dispc@0ti,omap5-dispc  fcktarget-module@2000ti,sysc-omap2ti,sysc   revsyscsyss  fck  encoder@0ti,omap5-rfbi pdisabledDfckicktarget-module@4000ti,sysc-omap2ti,sysc@@@revsyscsyss  @encoder@0 ti,omap5-dsi@@protophypll 5 pdisabled  fcksys_clktarget-module@9000ti,sysc-omap2ti,syscrevsyscsyss  encoder@0 ti,omap5-dsi@@protophypll 7pokay  fcksys_clk;target-module@40000ti,sysc-omap4ti,sysc revsysc  fckdss_clk encoder@0ti,omap5-hdmi wppllphycore epokay  fcksys_clk tL %audio_txFwdefaultportendpointR b%portendpoint@0Rh%endpoint@1Rh%regulator-abb-mpu ti,abb-v2abb_mpus2 J|J`J!J3base-addressint-addressefuse-addressldo-address0,regulator-abb-mm ti,abb-v2abb_mms2 J|J`J!J3base-addressint-addressefuse-addressldo-address0memory@80000000memoryfixed-regulator-mmcsdregulator-fixed vmmcsd_fixed2Z2Z%fixed-regulator-vwlan-pdnregulator-fixedvwlan_pdn_fixed2Z2Z T %fixed-regulator-vwlanregulator-fixed vwlan_fixed2Z2Z T%~ads7846-regregulator-fixed ads7846-reg2Z2Z%whsusb2_phyusb-nop-xceiv  %ghsusb3_phyusb-nop-xceiv %hleds gpio-ledsled1 Heartbeat  heartbeat +offdisplay!startek,startek-kd050cpanel-dpi lcdwdefault 9panel-timing@ F  N V( c( o+ y      portendpointR%connector0hdmi-connector hdmiawdefault portendpointR%encoder0 ti,tfp410portsport@0endpointR%port@1endpointR%connector1dvi-connector dvi  portendpointR% #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4mmc0mmc1mmc2mmc3mmc4serial0serial1serial2serial3serial4serial5rproc0rproc1display0display1display2device_typeregoperating-pointsclocksclock-namesclock-latency#cooling-cellscpu0-supplyphandlepolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-deviceinterruptsinterrupt-controller#interrupt-cellsti,hwmodssramrangesdma-rangesreg-namesti,sysc-sidle#clock-cellsti,index-starts-at-oneclock-multclock-div#reset-cells#power-domain-cellsti,bit-shiftti,max-div#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsstatuspinctrl-namespinctrl-0sysconregulator-nameregulator-min-microvoltregulator-max-microvoltclock-frequencyti,index-power-of-twoti,dividersassigned-clock-ratesti,sysc-midleutmi-modeextconvbus-supplyinterrupt-namesphysphy-namesdr_mode#dma-cellsdma-channelsdma-requestsport2-modeport3-moderemote-wakeup-connectedresetsreset-names#iommu-cellssyscon-phy-power#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellsti,timer-pwmpagesizeti,system-power-controllerti,enable-vbus-detectionti,enable-id-detectionti,wakeupti,ldo6-vibratorregulator-always-onregulator-boot-onti,smps-rangestartup-delay-usti,spi-num-csdmasdma-namesvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removablepower-domainsti,buffer-sizeti,timer-dspgpmc,num-csgpmc,num-waitpinsti,iommu-bus-err-backti,bootregiommusfirmware-namemboxesti,no-idle-on-initphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alert#thermal-sensor-cellsports-implementedvdd-supplyvdda-supplyremote-endpointlanesdata-linesti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infovin-supplyenable-active-highreset-gpioslabellinux,default-triggerdefault-stateenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activehpd-gpiosdigitalddc-i2c-bus