_j8Y4(6X,radxa,rockrockchip,rk3188 7Radxa Rockaliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/mmc@1021c000f/mmc@10214000l/mmc@10218000r/serial@10124000z/serial@10126000/serial@20064000/serial@20068000/spi@20070000/spi@20074000bus ,simple-busdma-controller@20018000,arm,pl330arm,primecell @ apb_pclk:dma-controller@2001c000,arm,pl330arm,primecell @ apb_pclk  disableddma-controller@20078000,arm,pl330arm,primecell @ apb_pclkoscillator ,fixed-clockn6!.xin24mgpu@10090000",rockchip,rk3188-maliarm,mali-400  buscoreAQfx okayx 5mgpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3}cache-controller@10138000,arm,pl310-cache4scu@1013c000,arm,cortex-a9-scuglobal-timer@1013c200,arm,cortex-a9-global-timer     disabledlocal-timer@1013c600,arm,cortex-a9-twd-timer   interrupt-controller@1013d000,arm,cortex-a9-gicserial@10124000&,rockchip,rk3188-uartsnps,dw-apb-uart@ "baudclkapb_pclk@L okaydefaultserial@10126000&,rockchip,rk3188-uartsnps,dw-apb-uart` #baudclkapb_pclkAM okaydefaultqos@1012d000,syscon qos@1012e000,syscon qos@1012f000,syscon qos@1012f080,syscon qos@1012f100,syscon qos@1012f180,syscon qos@1012f200,syscon qos@1012f280,syscon usb@10180000,rockchip,rk3066-usbsnps,dwc2 otgotg#@@ 2 7usb2-phy okayusb@101c0000 ,snps,dwc2 otghost2 7usb2-phy okayethernet@10204000,rockchip,rk3188-emac @< AD hclkmacrefNdXrmii okaydefault  a e ethernet-phy@0 mmc@10214000,rockchip,rk2928-dw-mshc!@ Hbiuciupurx-txfQreset okaydefaultmmc@10218000,rockchip,rk2928-dw-mshc! Ibiuciupurx-txfRreset  disabledmmc@1021c000,rockchip,rk2928-dw-mshc! Jbiuciupurx-txfSreset  disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfd @<reboot-mode,syscon-reboot-mode@RBRBRB  RBpower-controller!,rockchip,rk3188-power-controllerpower-domain@7hO+power-domain@6 +power-domain@8+grf@20008000,syscon i2c@2002d000,rockchip,rk3188-i2c  (Ai2cP  disableddefaulti2c@2002f000,rockchip,rk3188-i2c  )AQi2c okaydefaultrtc@51,haoyu,hym8563Q default!.xin32kact8846@5a,active-semi,act8846Z okay2default J!U!`!k!v"!!regulatorsREG1VCC_DDROOREG2VDD_LOGB@B@REG3VDD_ARM Yp6REG4VCC_IO2Z2Z"REG5VDD_10B@B@REG6 VDD_HDMI&%&%REG7VCC_18w@w@REG8VCCA_332Z2ZREG9 VCC_RMII2Z2Z REG10 VCCIO_WL2Z2ZREG11 VCC18_IOw@w@REG12VCC_28**pwm@20030000,rockchip,rk2928-pwm F  disableddefault#pwm@20030010,rockchip,rk2928-pwm F okaydefault$watchdog@2004c000 ,rockchip,rk3188-wdtsnps,dw-wdt K 3 okaypwm@20050020,rockchip,rk2928-pwm  G okaydefault%pwm@20050030,rockchip,rk2928-pwm 0G okaydefault&i2c@20056000,rockchip,rk3188-i2c ` *ARi2c  disableddefault'i2c@2005a000,rockchip,rk3188-i2c  +ASi2c  disableddefault(i2c@2005e000,rockchip,rk3188-i2c  4ATi2c  disableddefault)serial@20064000&,rockchip,rk3188-uartsnps,dw-apb-uart @ $baudclkapb_pclkBN okaydefault*serial@20068000&,rockchip,rk3188-uartsnps,dw-apb-uart  %baudclkapb_pclkCO okaydefault+saradc@2006c000,rockchip,saradc  GJsaradcapb_pclkfW saradc-apb  disabledspi@20070000(,rockchip,rk3188-spirockchip,rk3066-spiEHspiclkapb_pclk & p  utxrx  disableddefault,-./spi@20074000(,rockchip,rk3188-spirockchip,rk3066-spiFIspiclkapb_pclk ' @p  utxrx  disableddefault0123cpus rockchip,rk3066-smpcpu@0cpu,arm,cortex-a9$45@C5fW6cpu@1cpu,arm,cortex-a9$4C5fW6cpu@2cpu,arm,cortex-a9$4C5fW6cpu@3cpu,arm,cortex-a9$4C5fW6opp_table0,operating-points-v2b5opp-312000000mt Y@opp-504000000m ntHopp-600000000m#Ft~opp-816000000m0,topp-1008000000m<tg8opp-1200000000mGt0opp-1416000000mTfrtopp-1608000000m_"tpdisplay-subsystem,rockchip,display-subsystem78sram@10080000 ,mmio-sram smp-sram@0,rockchip,rk3066-smp-sramPvop@1010c000,rockchip,rk3188-vop aclk_vopdclk_vophclk_vop}fdef axiahbdclk  disabledport7vop@1010e000,rockchip,rk3188-vop aclk_vopdclk_vophclk_vop}fghi axiahbdclk  disabledport8timer@2000e000,,rockchip,rk3188-timerrockchip,rk3288-timer  .EW pclktimertimer@200380a0,,rockchip,rk3188-timerrockchip,rk3288-timer   @BZ pclktimeri2s@1011a000(,rockchip,rk3188-i2srockchip,rk3066-i2s  default9Ki2s_clki2s_hclkp::utxrx  disabledsound@1011e000,,rockchip,rk3188-spdifrockchip,rk3066-spdif N mclkhclkp:utx default; okay@clock-controller@20000000,rockchip,rk3188-cru A!efuse@20010000,rockchip,rk3188-efuse @[ pclk_efusecpu_leakage@17phy0,rockchip,rk3188-usb-phyrockchip,rk3288-usb-phyA okayusb-phy@10c Qphyclk!usb-phy@11cRphyclk!pinctrl,rockchip,rk3188-pinctrlA<gpio0@2000a000,rockchip,rk3188-gpio-bank0  6U gpio1@2003c000,rockchip,gpio-bank  7V gpio2@2003e000,rockchip,gpio-bank  8W Cgpio3@20080000,rockchip,gpio-bank  9X pcfg_pull_up,>pcfg_pull_down9pcfg_pull_noneH=emmcemmc-clkU=emmc-cmdU>emmc-rstU=emacemac-xferU======== emac-mdio U== i2c0i2c0-xfer U==i2c1i2c1-xfer U==i2c2i2c2-xfer U=='i2c3i2c3-xfer U==(i2c4i2c4-xfer U==)lcdc1lcdc1-dclkU=lcdc1-denU=lcdc1-hsyncU=lcdc1-vsyncU=lcdc1-rgb24U========= = = = = ===========pwm0pwm0-outU=#pwm1pwm1-outU=$pwm2pwm2-outU=%pwm3pwm3-outU=&spi0spi0-clkU>,spi0-cs0U>/spi0-txU>-spi0-rxU>.spi0-cs1U>spi1spi1-clkU>0spi1-cs0U>3spi1-rxU>2spi1-txU>1spi1-cs1U>uart0uart0-xfer U>=uart0-ctsU=uart0-rtsU=uart1uart1-xfer U>=uart1-ctsU=uart1-rtsU=uart2uart2-xfer U> =*uart3uart3-xfer U > =+uart3-ctsU =uart3-rtsU =sd0sd0-clkU=sd0-cmdU=sd0-cdU=sd0-wpU =sd0-pwrU=sd0-bus-width1U=sd0-bus-width4@U====sdmmc-pwrU=Esd1sd1-clkU=sd1-cmdU=sd1-cdU=sd1-wpU=sd1-bus-width1U=sd1-bus-width4@U====i2s0i2s0-bus`U======9spdifspdif-txU=;pcfg-output-lowc?act8846act8846-dvs0-ctlU? hym8563rtc-intU>lan8720aphy-intU> ir-receiverir-recv-pinU =Busbhost-vbus-drvU=Fotg-vbus-drvU=Dmemory@60000000memory`gpio-keys ,gpio-keysnpower ytGPIO Key Powerdgpio-leds ,gpio-ledsled-0rock:green:user1 y offled-1rock:blue:user2 yoffled-2rock:red:power yoffsound,simple-audio-cardSPDIFsimple-audio-card,dai-link@1cpu@codecAspdif-out,linux,spdif-ditAir-receiver,gpio-ir-receiver y defaultBusb-otg-regulator,regulator-fixed CdefaultD otg-vbusLK@LK@sdmmc-regulator,regulator-fixed sdmmc-supply2Z2Z defaultE+"usb-host-regulator,regulator-fixed defaultF host-pwrLK@LK@vsys-regulator,regulator-fixedvsysLK@LK@! #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4mshc0mshc1mshc2serial0serial1serial2serial3spi0spi1rangesreginterrupts#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclocksclock-namesphandlestatusclock-frequency#clock-cellsclock-output-namesassigned-clocksassigned-clock-ratesresetsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthpinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modephyphy-supplydmasdma-namesfifo-depthreset-namesvmmc-supplybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qossystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-on#pwm-cells#io-channel-cellsenable-methoddevice_typenext-level-cacheclock-latencyoperating-points-v2cpu-supplyopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsrockchip,playback-channelsrockchip,capture-channels#sound-dai-cells#reset-cells#phy-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disablerockchip,pinsoutput-lowautorepeatgpioslinux,codelabellinux,input-typewakeup-sourcedebounce-intervaldefault-statesimple-audio-card,namesound-daienable-active-highgpioregulator-boot-onstartup-delay-usvin-supply