8( H%amarula,vyasa-rk3288rockchip,rk3288&7Amarula Vyasa-RK3288aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/mmc@ff0f0000k/mmc@ff0c0000q/mmc@ff0d0000w/mmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5<rV acpu@501cpuarm,cortex-a12'@5<rV acpu@502cpuarm,cortex-a12'@5<rV acpu@503cpuarm,cortex-a12'@5<rV acpu-opp-tableoperating-points-v2iaopp-126000000t{ opp-216000000t { opp-312000000t{ opp-408000000tQ{ opp-600000000t#F{ opp-696000000t)|{~opp-816000000t0,{B@opp-1008000000t<{opp-1200000000tG{opp-1416000000tTfr{Oopp-1512000000tZJ{ opp-1608000000t_"{pbus simple-busdma-controller@ff250000arm,pl330arm,primecell%@5 apb_pclkadma-controller@ff600000arm,pl330arm,primecell`@5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@5 apb_pclka[reserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24ma timerarm,armv7-timer0   n64timer@ff810000rockchip,rk3288-timer  H 5a  pclktimerdisplay-subsystemrockchip,display-subsystemK mmc@ff0c0000rockchip,rk3288-dw-mshcQр 5Drvbiuciuciu-driveciu-sample_  @jresetokayvdefault mmc@ff0d0000rockchip,rk3288-dw-mshcQр 5Eswbiuciuciu-driveciu-sample_ ! @jreset disabledmmc@ff0e0000rockchip,rk3288-dw-mshcQр 5Ftxbiuciuciu-driveciu-sample_ "@jreset disabledmmc@ff0f0000rockchip,rk3288-dw-mshcQр 5Guybiuciuciu-driveciu-sample_ #@jresetokayvdefaultsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW jsaradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -default  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .default!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault% disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault& disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault' disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault(okayaqserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7 *5MUbaudclkapb_pclktxrxdefault) disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8 *5NVbaudclkapb_pclktxrxdefault* disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9 *5OWbaudclkapb_pclkdefault+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart : *5PXbaudclkapb_pclktxrxdefault, disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ; *5QYbaudclkapb_pclk  txrxdefault- disabledthermal-zonesreserve_thermal7M[.cpu_thermal7dM[.tripscpu_alert0kpwpassivea/cpu_alert1k$wpassivea0cpu_critk_w criticalcooling-mapsmap0/0map100gpu_thermal7dM[.tripsgpu_alert0kpwpassivea1gpu_critk_w criticalcooling-mapsmap01 2tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk jtsadc-apbinitdefaultsleep3435sokaya.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq585fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB jstmmacethokay&66Minputdefault789:Z;ergmiin 'B@ <0usb@ff500000 generic-ehciP 5=usbokayusb@ff520000 generic-ohciR )5=usb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghost> usb2-phyokaydefault?usb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg @@ @ usb2-phyokayAusb@ff5c0000 generic-ehci\ 5 disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5LdefaultBokaypmic@1brockchip,rk808&Cxin32krk808-clkout2defaultDE%FTF`FlFxFFFFFFregulatorsDCDC_REG1vdd_arm qp.a regulator-state-mem@DCDC_REG2vdd_gpu P.avregulator-state-memYqB@DCDC_REG3vcc_ddr.regulator-state-memYDCDC_REG4vcc_io2Z2Z.aregulator-state-memYq2ZLDO_REG1vcc_tp2Z2Z.regulator-state-memYq2ZLDO_REG2 vcc_codec2Z2Z.regulator-state-mem@LDO_REG3vdd_10B@B@.regulator-state-memYqB@LDO_REG4vcc_gpsw@w@.regulator-state-memYqw@LDO_REG5 vccio_sdw@2Z.aregulator-state-memYq2ZLDO_REG6 vdd10_lcdB@B@.regulator-state-memYqB@LDO_REG7vcc_18w@w@.aZregulator-state-memYqw@LDO_REG8 vcc18_lcdw@w@.regulator-state-memYqw@SWITCH_REG1vcc_sd2Z2Z.aregulator-state-memYSWITCH_REG2vcc_lan2Z2Z.a;regulator-state-memYi2c@ff660000rockchip,rk3288-i2cf =i2c5NdefaultG disabledpwm@ff680000rockchip,rk3288-pwmhdefaultH5_pwm disabledpwm@ff680010rockchip,rk3288-pwmhdefaultI5_pwm disabledpwm@ff680020rockchip,rk3288-pwmh defaultJ5_pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultK5_pwm disabledsram@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsapower-controller!rockchip,rk3288-power-controller&h6 a^power-domain@9 5chgfdehilkj$LMNOPQRSTpower-domain@11 5opUVpower-domain@12 5Wpower-domain@13 5XYreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv5H&jk$#gׄeрxhрxhasyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwa5edp-phyrockchip,rk3288-dp-phy5h24m disabledanio-domains"rockchip,rk3288-io-voltage-domainokayZ*4?ZM;[iyZusbphyrockchip,rk3288-usb-phyokayusb-phy@320 5]phyclk jphy-reseta@usb-phy@33445^phyclk jphy-reseta=usb-phy@348H5_phyclk jphy-reseta>watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif5T mclkhclk[tx 6default\5 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 55Ri2s_clki2s_hclk[[txrxdefault] disabledcrypto@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk jcrypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkiface disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclk ^ ilm jcoreaxiahbvop@ff930000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vop ^ def jaxiahbdclk_okayporta endpoint@0"`arendpoint@1"aaoendpoint@2"baiendpoint@3"caliommu@ff930300rockchip,iommu  vopb_mmu5 aclkiface ^ okaya_vop@ff940000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vop ^  jaxiahbdclkdokayporta endpoint@0"easendpoint@1"fapendpoint@2"gajendpoint@3"hamiommu@ff940300rockchip,iommu  vopl_mmu5 aclkiface ^ okayadmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclk ^ 5 disabledportsportendpoint@0"iabendpoint@1"jaglvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdck ^ 5 disabledportsport@0endpoint@0"lacendpoint@1"mahdp@ff970000rockchip,rk3288-dp@ b5icdppclkndp ^ ojdp5 disabledportsport@0endpoint@0"oaaendpoint@1"pafhdmi@ff980000rockchip,rk3288-dw-hdmi*5 g5hmniahbisfrcec ^ okay2qportsportendpoint@0"ra`endpoint@1"saevideo-codec@ff9a0000rockchip,rk3288-vpu   vepuvdpu5 aclkhclkt ^ iommu@ff9a0800rockchip,iommu vpu_mmu5 aclkiface ^ atiommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5u ^ okay>va2gpu-opp-tableoperating-points-v2auopp-100000000t{~opp-200000000t {~opp-300000000t{B@opp-400000000tׄ{opp-600000000t#F{qos@ffaa0000syscon aXqos@ffaa0080syscon aYqos@ffad0000syscon aMqos@ffad0100syscon aNqos@ffad0180syscon aOqos@ffad0400syscon aPqos@ffad0480syscon aQqos@ffad0500syscon aLqos@ffad0800syscon aRqos@ffad0880syscon aSqos@ffad0900syscon aTqos@ffae0000syscon aWqos@ffaf0000syscon aUqos@ffaf0080syscon aVefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu-id@7cpu_leakage@17interrupt-controller@ffc01000 arm,gic-400J_@ @ `   apinctrlrockchip,rk3288-pinctrl5gpio0@ff750000rockchip,gpio-banku Q5@pJ_aCgpio1@ff780000rockchip,gpio-bankx R5ApJ_gpio2@ff790000rockchip,gpio-banky S5BpJ_gpio3@ff7a0000rockchip,gpio-bankz T5CpJ_gpio4@ff7b0000rockchip,gpio-bank{ U5DpJ_a<gpio5@ff7c0000rockchip,gpio-bank| V5EpJ_gpio6@ff7d0000rockchip,gpio-bank} W5FpJ_gpio7@ff7e0000rockchip,gpio-bank~ X5GpJ_a~gpio8@ff7f0000rockchip,gpio-bank Y5HpJ_ahdmihdmi-cec-c0whdmi-cec-c7whdmi-ddc wwhdmi-ddc-unwedge xwvcc50-hdmi-en wapcfg-output-lowaxpcfg-pull-upaypcfg-pull-downazpcfg-pull-noneawpcfg-pull-none-12ma a{suspendglobal-pwroffwaEddrio-pwroffwddr0-retentionyddr1-retentionyedpedp-hpd zi2c0i2c0-xfer wwaBi2c1i2c1-xfer wwa%i2c2i2c2-xfer  w waGi2c3i2c3-xfer wwa&i2c4i2c4-xfer wwa'i2c5i2c5-xfer wwa(i2s0i2s0-bus`wwwwwwa]lcdclcdc-ctl@wwwwaksdmmcsdmmc-clkwa sdmmc-cmdyasdmmc-cdyasdmmc-bus1ysdmmc-bus4@yyyyasdio0sdio0-bus1ysdio0-bus4@yyyysdio0-cmdysdio0-clkwsdio0-cdysdio0-wpysdio0-pwrysdio0-bkpwrysdio0-intysdio1sdio1-bus1ysdio1-bus4@yyyysdio1-cdysdio1-wpysdio1-bkpwrysdio1-intysdio1-cmdysdio1-clkwsdio1-pwr yemmcemmc-clkwaemmc-cmdyaemmc-pwr yaemmc-bus1yemmc-bus4@yyyyemmc-bus8yyyyyyyyaspi0spi0-clk yaspi0-cs0 yaspi0-txyaspi0-rxyaspi0-cs1yspi1spi1-clk yaspi1-cs0 ya spi1-rxyaspi1-txyaspi2spi2-cs1yspi2-clkya!spi2-cs0ya$spi2-rxya#spi2-tx ya"uart0uart0-xfer ywa)uart0-ctsyuart0-rtswuart1uart1-xfer y wa*uart1-cts yuart1-rts wuart2uart2-xfer ywa+uart3uart3-xfer ywa,uart3-cts yuart3-rts wuart4uart4-xfer ywa-uart4-cts yuart4-rts wtsadcotp-pin wa3otp-out wa4pwm0pwm0-pinwaHpwm1pwm1-pinwaIpwm2pwm2-pinwaJpwm3pwm3-pinwaKgmacrgmii-pinswwww{{{{www {{wwa7rmii-pinswwwwwwwwwwphy-int ya:phy-pmebya9phy-rst|a8spdifspdif-tx wa\pcfg-output-higha|pmicpmic-intyaDusb_hostphy-pwr-en |a?usb2-pwr-en wausb_otgotg-vbus-drv wachosen/serial@ff690000memorymemorydc12-vbatregulator-fixed dc12_vbat.a}vboot-3v3regulator-fixed vboot_3v32Z2Z.}vsys-regulatorregulator-fixedvcc_sys8u 8u .}aFvboot-5vregulator-fixed vboot_svLK@LK@.}v3g-3v3regulator-fixedv3g_3v32Z2Z.}vsus-5vregulator-fixedvsus_5vLK@LK@.avcc50-hdmiregulator-fixed vcc50_hdmi  ~ default.vusb1-5vregulator-fixed vusb1_5v  C defaultLK@LK@aAvusb2-5vregulator-fixed vusb2_5v   defaultLK@LK@.external-gmac-clock fixed-clocksY@ ext_gmaca6 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizevbus-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathvin-supplyenable-active-high