Ð þíÑù8Êx(Ê@'Seeed Studio Odyssey-STM32MP157C BoardF!seeed,stm32mp157c-odysseyseeed,stm32mp157c-odyssey-somst,stm32mp157cpuscpu@0!arm,cortex-a7,&¾6€8rxtx disabledaudio-controller@4000c000!st,stm32h7-i2sTH@À T3 3=>8rxtx disabledaudio-controller@4000d000!st,stm32h7-spdifrxTH@Ð 'kclk Ta 3]^ 8rxrx-ctrl disabledserial@4000e000!st,stm32h7-uartH@à T& • disabledserial@4000f000!st,stm32h7-uartH@ð T' – disabledserial@40010000!st,stm32h7-uartH@ T4 —okayedefaultsserial@40011000!st,stm32h7-uartH@ T5 ˜ disabledi2c@40012000!st,stm32mp15-i2cH@  }eventerrorT  ‰ML ›okayedefaultsleeps © ³dÊi2c@40013000!st,stm32mp15-i2cH@0 }eventerrorT!" ŠML ›okayedefaults ³¹Êstpmic@33 !st,stpmic1H3 â ›Šregulators!st,stpmic1-regulatorsö  )buck18vddcoreG 5_™pw‹¢buck28vdd_ddrG™p_™pw‹¢Lbuck38vddG2Z _2Z wÄ‹¢Lbuck48v3v3G2Z _2Z w¢‹L ldo1 8v1v8_audioGw@_w@wTldo2 8v3v3_hdmiG2Z _2Z wTldo38vtt_ddrG¡ _ q°w¢ldo48vdd_usbTldo58vddaG,@ _,@ TÒldo6 8v1v2_hdmiGO€_O€wTvref_ddr 8vref_ddrwboost8bst_outTLpwr_sw1 8vbus_otgT pwr_sw28vbus_swT äonkey!st,stpmic1-onkeyT}onkey-fallingonkey-risingÿ watchdog!st,stpmic1-wdt disabledi2c@40014000!st,stm32mp15-i2cH@@ }eventerrorTHI ‹ML › disabledi2c@40015000!st,stm32mp15-i2cH@P }eventerrorTkl ML › disabledcec@40016000 !st,stm32-cecH@` T^ ˆ 'cechdmi-cec disableddac@40017000!st,stm32h7-dac-coreH@p 'pclk disableddac@1 !st,stm32-dacH disableddac@2 !st,stm32-dacH disabledserial@40018000!st,stm32h7-uartH@€ TR š disabledserial@40019000!st,stm32h7-uartH@ TS › disabledtimer@44000000!st,stm32-timersHD Î'intp3   8ch1ch2ch3ch4uptrigcom disabledpwm !st,stm32-pwmB disabledtimer@0!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledtimer@44001000!st,stm32-timersHD Ï'intp3/0123458ch1ch2ch3ch4uptrigcom disabledpwm !st,stm32-pwmB disabledtimer@7!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledserial@44003000!st,stm32h7-uartHD0 TG ™ disabledspi@44004000!st,stm32h7-spiHD@ T# ‚MLH 3%&8rxtx disabledaudio-controller@44004000!st,stm32h7-i2sTHD@ T# 3%&8rxtx disabledspi@44005000!st,stm32h7-spiHDP TT …MLI 3ST8rxtx disabledtimer@44006000!st,stm32-timersHD` Ð'int@3ijkl8ch1uptrigcom disabledpwm !st,stm32-pwmB disabledtimer@14!st,stm32h7-timer-triggerH disabledtimer@44007000!st,stm32-timersHDp Ñ'int 3mn8ch1up disabledpwm !st,stm32-pwmB disabledtimer@15!st,stm32h7-timer-triggerH disabledtimer@44008000!st,stm32-timersHD€ Ò'int 3op8ch1up disabledpwm !st,stm32-pwmB disabledtimer@16!st,stm32h7-timer-triggerH disabledspi@44009000!st,stm32h7-spiHD TU †MLJ 3UV8rxtx disabledsai@4400a000!st,stm32h7-sai D HD D£ð TWMLP disabledaudio-controller@4400a004T!st,stm32-sai-sub-aH  ž'sai_ck3W disabledaudio-controller@4400a024T!st,stm32-sai-sub-bH$  ž'sai_ck3X disabledsai@4400b000!st,stm32h7-sai D°HD°D³ð T[MLQ disabledaudio-controller@4400b004T!st,stm32-sai-sub-aH  Ÿ'sai_ck3Y disabledaudio-controller@4400b024T!st,stm32-sai-sub-bH$  Ÿ'sai_ck3Z disabledsai@4400c000!st,stm32h7-sai DÀHDÀDÃð TrMLR disabledaudio-controller@4400c004T!st,stm32-sai-sub-aH   'sai_ck3q disabledaudio-controller@4400c024T!st,stm32-sai-sub-bH$   'sai_ck3r disableddfsdm@4400d000!st,stm32mp1-dfsdmHDÐ œ'dfsdm disabledfilter@0!st,stm32-dfsdm-adcH Tn3e8rx disabledfilter@1!st,stm32-dfsdm-adcH To3f8rx disabledfilter@2!st,stm32-dfsdm-adcH Tp3g8rx disabledfilter@3!st,stm32-dfsdm-adcH Tq3h8rx disabledfilter@4!st,stm32-dfsdm-adcH Ts3[8rx disabledfilter@5!st,stm32-dfsdm-adcH T~3\8rx disableddma-controller@48000000 !st,stm32-dmaHH`T   / GMLÀ$/:Ldma-controller@48001000 !st,stm32-dmaHH`T89:;<DEF HMLÁ$/:Ldma-router@48002000!st,stm32h7-dmamuxHH $:€GS IMLÂLadc@48003000!st,stm32mp1-adc-coreHH0TZ J¢'busadc›Š disabledLadc@0!st,stm32mp1-adcHrT3 8rx disabledadc@100!st,stm32mp1-adcHrT3 8rx disabledsdmmc@48004000!arm,pl18xarm,primecell`1€HH@ T‰}cmd_irq x 'apb_pclkMLÐwˆš' disabledusb-otg@49000000!st,stm32mp15-hsotgsnps,dwc2HI ¦'otgMLȨdwc2 Tb´à  Õ€€@@@@ äotgì disabledmailbox@4c001000!st,stm32mp1-ipccúHL,âde= }rxtxwakeup S›okayL1dcmi@4c006000!st,stm32-dcmiHL` TNMM M'mclk3K 8tx disabledrcc@50000000!st,stm32mp1-rccsysconHP°Lpwr@50001000!st,stm32mp1,pwr-regHPreg118reg11GÈà_Èàreg188reg18Gw@_w@usb338usb33G2Z _2Z Lpwr_mcu@50001014!st,stm32mp151-pwr-mcusysconHPL*interrupt-controller@5000d000!st,stm32mp1-extisyscon›ŠHPÐLsyscon@50020000!st,stm32mp157-syscfgsysconHP 3Ltimer@50021000!st,stm32-lptimerHP 'mux disabledpwm!st,stm32-pwm-lpB disabledtrigger@1!st,stm32-lptimer-triggerH disabledcounter!st,stm32-lptimer-counter disabledtimer@50022000!st,stm32-lptimerHP  ‘'mux disabledpwm!st,stm32-pwm-lpB disabledtrigger@2!st,stm32-lptimer-triggerH disabledtimer@50023000!st,stm32-lptimerHP0 ’'mux disabledpwm!st,stm32-pwm-lpB disabledtimer@50024000!st,stm32-lptimerHP@ “'mux disabledpwm!st,stm32-pwm-lpB disabledvrefbuf@50025000!st,stm32-vrefbufHPPGã`_&%  4 disabledsai@50027000!st,stm32h7-sai PpHPpPsð T’MLˆ disabledaudio-controller@50027004T!st,stm32-sai-sub-aH  ¡'sai_ck3c disabledaudio-controller@50027024T!st,stm32-sai-sub-bH$  ¡'sai_ck3d disabledthermal@50028000!st,stm32-thermalHP€ T“ 5'pclk disabledLhash@54002000!st,stm32f756-hashHT  TP aM …3 8in4 disabledrng@54003000 !st,stm32-rngHT0 |M †okaydma-controller@58000000!st,stm32h7-mdmaHX Tz dM $S :0Lmemory-controller@58002000!st,stm32mp1-fmc2-ebiHX  yM Ì disabledP`dhl€nand-controller@4,0!st,stm32mp1-fmc2-nfcHH   T0H3    8txrxecc disabledspi@58003000!st,stm32f469-qspiHX0p Aqspiqspi_mm T\038txrx zM Î disabledsdmmc@58005000!arm,pl18xarm,primecell`1€HXP T1}cmd_irq v 'apb_pclkM Ðwˆš'okayedefaultopendrainsleeps©K U^iu sdmmc@58007000!arm,pl18xarm,primecell`1€HXp T|}cmd_irq w 'apb_pclkM Ñwˆš'okayedefaultopendrainsleeps©K‹™Ÿiu §´crc@58009000!st,stm32f7-crcHX n disabledethernet@5800a000#!st,stm32mp1-dwmacsnps,dwmac-4.20aHX   Astmmacethâ=}macirq.'stmmacethmac-clk-txmac-clk-rxeth-ckethstp( igh{pÁËÜå okays!©"edefaultsleep rgmii-id"è,#7{½G½^sY@sstmmac-axi-config‚’¢L mdio0!snps,dwmac-mdioethernet-phy@7H ¬$¸'È,L#usbh-ohci@5800c000 !generic-ohciHXÀ oM Ø TJ disabledL%usbh-ehci@5800d000 !generic-ehciHXÐ oM Ø TKÚ% disableddisplay-controller@5a001000!st,stm32-ltdcHZTXY §'lcdM  disabledportwatchdog@5a002000!st,stm32mp1-iwdgHZ  : 'pclklsiokayä usbphyc@5a006000!st,stm32mp1-usbphycHZ` M  disabledusb-phy@0ðHusb-phy@1ðHserial@5c000000!st,stm32h7-uartH\ T% ” disabledspi@5c001000!st,stm32h7-spiH\ TV ‡M @03"#8rxtx disabledi2c@5c002000!st,stm32mp15-i2cH\  }eventerrorT_` ŒM B › disabledrtc@5c004000!st,stm32mp1-rtcH\@ AÀ 'pclkrtc_ck Tokayefuse@5c005000!st,stm32mp15-bsecH\Pcalib@5cH\calib@5eH^i2c@5c009000!st,stm32mp15-i2cH\ }eventerrorT‡ˆ ŽM C  › disabledpin-controller@50002000!st,stm32mp157-pinctrl P ¤r `ÿû L&gpio@50002000(›ŠH T4GPIOAokayAH&L gpio@50003000(›ŠH U4GPIOBokayAH&gpio@50004000(›ŠH  V4GPIOCokayAH& gpio@50005000(›ŠH0 W4GPIODokayAH&0gpio@50006000(›ŠH@ X4GPIOEokayAH&@gpio@50007000(›ŠHP Y4GPIOFokayAH&Pgpio@50008000(›ŠH` Z4GPIOGokayAH&`L$gpio@50009000(›ŠHp [4GPIOHokayAH&pgpio@5000a000(›ŠH€ \4GPIOIokayA H&€ Lgpio@5000b000(›ŠH ]4GPIOJ disabledgpio@5000c000(›ŠH  ^4GPIOK disabledadc1-in6-0pinsT\adc12-ain-0pinsT#\]^adc12-ain-1pinsT\]adc12-usb-cc-pins-0pinsTcec-0pinsT[hycec-sleep-0pinsTcec-1pinsT[hycec-sleep-1pinsTdac-ch1-0pinsTdac-ch2-0pinsTdcmi-0pins<Txyz{|~„Fwƒ[dcmi-sleep-0pins<Txyz{|~„Fwƒrgmii-0L!pins1 Te d m n " B  ! [ƒypins2T [ƒypins3T$ %     [rgmii-sleep-0L"pins1<Tedmn"B!$%rgmii-1pins1 Te d m n " B  ! [ƒypins2T [ƒypins3T$ % v w   [rgmii-sleep-1pins1<Tedmn"B!$%vwrgmii-2pins1 Te d  n " B k ! [ƒypins2T [ƒypins3T$ % v    [rgmii-sleep-2pins1<Tedn"Bk!$%vrmii-0pins1Tm n   ! [ƒypins2 T$ %  [rmii-sleep-0pins1$Tmn!$%fmc-0pins14T4 5 ; < > ? 0 1 G H I J i [ƒypins2T6 “fmc-sleep-0pins8T45;<>?01GHIJ6ii2c1-0L pinsT<_[hyi2c1-sleep-0L pinsT<_i2c1-1pinsT^_[hyi2c1-sleep-1pinsT^_i2c2-0L pinsTtu[hyi2c2-sleep-0pinsTtui2c2-1pinsTu[hyi2c2-sleep-1pinsTui2c2-2pinsTQu[hyi2c2-sleep-2pinsTQui2c5-0pinsT  [hyi2c5-sleep-0pinsT  i2c5-1pinsT01[hyi2c5-sleep-1pinsT01i2s2-0pins Tƒ yƒ[i2s2-sleep-0pins Tƒ ltdc-0pinspTgŠ‰Zrsxyz |OEF}~€‚9lj:„8[ƒyltdc-sleep-0pinspTgŠ‰Zrsxyz |OEF}~€‚9lj:„8ltdc-1pinspTŽŒ§‘’“”•–—˜™š› ¡¢œžŸ£¤¥¦[ƒyltdc-sleep-1pinspTŽŒ§‘’“”•–—˜™š› ¡¢œžŸ£¤¥¦ltdc-2pins1TT  36:KLMOt xyz}…†‰Š[ƒypins2TN[ƒyltdc-sleep-2pins1XT 36:KLMOtxyz}…†‰ŠNltdc-3pins1Tg[ƒypins2lTŠ‰Mmsxy{|OE}Kt ‹ h9lj:L‡[ƒyltdc-sleep-3pinspTgŠ‰Mmsxy{|OE}Kt‹h9lj:L‡m-can1-0pins1T} yƒ[pins2T‰ [m_can1-sleep-0pinsT}‰m-can1-1pins1T yƒ[pins2T [m_can1-sleep-1pinsT  m-can2-0pins1T yƒ[pins2T [m_can2-sleep-0pinsTpwm1-0pins TIKN ƒypwm1-sleep-0pins TIKNpwm2-0pinsT ƒypwm2-sleep-0pinsTpwm3-0pinsT' ƒypwm3-sleep-0pinsT'pwm3-1pinsT[ƒypwm3-sleep-1pinsTpwm4-0pinsT>? ƒypwm4-sleep-0pinsT>?pwm4-1pinsT= ƒypwm4-sleep-1pinsT=pwm5-0pinsT{ ƒypwm5-sleep-0pinsT{pwm5-1pins T{|€[ƒypwm5-sleep-1pins T{|€pwm8-0pinsT‚ ƒypwm8-sleep-0pinsT‚pwm12-0pinsTv ƒypwm12-sleep-0pinsTvqspi-clk-0pinsTZ [ƒyqspi-clk-sleep-0pinsTZqspi-bk1-0pins1TX Y W V [ƒypins2T “ƒyqspi-bk1-sleep-0pinsTXYWVqspi-bk2-0pins1Tr s j g [ƒypins2T “ƒyqspi-bk2-sleep-0pinsTrsjg sai2a-0pinsT… † ‡ @ yƒ[sai2a-sleep-0pinsT…†‡@sai2a-1pins1 T† ‡ = yƒ[sai2a-sleep-1pins T†‡=sai2a-2pins T=;<yƒ[sai2b-0pins1 TL M N yƒ[pins2T[ [sai2b-sleep-0pinsT[LMNsai2b-1pinsT[ [sai2b-sleep-1pinsT[sai2b-2pins1T[ [sai2b-sleep-2pinsT[sai4a-0pinsT yƒ[sai4a-sleep-0pinsTsdmmc1-b4-0Lpins1T( ) * + 2 yƒ[pins2T, yƒ[sdmmc1-b4-od-0Lpins1T( ) * + yƒ[pins2T, yƒ[pins3T2 yh[sdmmc1-b4-sleep-0LpinsT()*+,2sdmmc1-dir-0pins1 TR '  yƒ“pins2TD “sdmmc1-dir-sleep-0pinsTR'Dsdmmc1-dir-1pins1 TR N  yƒ“pins2TD “sdmmc1-dir-sleep-1pinsTRNDsdmmc2-b4-0Lpins1T    f yƒ“pins2TC yƒ“sdmmc2-b4-od-0Lpins1T    yƒ“pins2TC yƒ“pins3Tf yh“sdmmc2-b4-sleep-0LpinsTCfsdmmc2-b4-1pins1T    f yƒ[pins2TC yƒ[sdmmc2-b4-od-1pins1T    yƒ[pins2TC yƒ[pins3Tf yh[sdmmc2-d47-0pinsT E 3 yƒ“sdmmc2-d47-sleep-0pinsT E3sdmmc2-d47-1pinsT & ' yƒ[sdmmc2-d47-sleep-1pinsT &'sdmmc2-d47-2pinsT  & ' yƒ“sdmmc2-d47-sleep-2pinsT&'sdmmc2-d47-3LpinsT E ' sdmmc2-d47-sleep-3LpinsT E'sdmmc3-b4-0pins1TP T U 7 Q yƒ“pins2To yƒ“sdmmc3-b4-od-0pins1TP T U 7 yƒ“pins2To yƒ“pins3TQ yh“sdmmc3-b4-sleep-0pinsTPTU7oQsdmmc3-b4-1pins1TP T 5 7 0 yƒ“pins2To yƒ“sdmmc3-b4-od-1pins1TP T 5 7 yƒ“pins2To yƒ“pins3T0 yh“sdmmc3-b4-sleep-1pinsTPT57o0spdifrx-0pinsTl [spdifrx-sleep-0pinsTlspi2-0pins1Tƒ[ƒypins2T‚[uart4-0Lpins1Tk[ƒypins2T [uart4-idle-0pins1Tkpins2T [uart4-sleep-0pinsTkuart4-1pins1T1 [ƒypins2T [uart4-2pins1Tk[ƒypins2T [uart7-0pins1TH[ƒypins2 TGJI[uart7-1pins1TW[ƒypins2TV[uart7-2pins1TH[ƒypins2TG[uart7-idle-2pins1THpins2TG[uart7-sleep-2pinsTHGuart8-0pins1TA [ƒypins2T@ [uart8rtscts-0pinsTg j [spi4-0pinsTLF[ƒypins2TM[usart2-0pins1TU4[ƒypins2T63[usart2-sleep-0pinsTU463usart2-1pins1TU[ƒypins2TTO[usart2-sleep-1pinsTUTOusart2-2pins1T54[ƒypins2T63[usart2-idle-2pins1T53pins2T4[ƒypins3T6[usart2-sleep-2pinsT5463usart3-0pins1T[ƒypins2T [usart3-1pins1Th [ƒypins2T Š [usart3-idle-1pins1TŠpins2Th [ƒypins3T [usart3-sleep-1pinsThŠusart3-2pins1Th [ƒypins2T [usart3-idle-2pins1Tpins2Th [ƒypins3T [usart3-sleep-2pinsThusbotg-hs-0pinsT usbotg-fs-dp-dm-0pinsT  pin-controller-z@54004000!st,stm32mp157-z-pinctrl T@ûr `ÿ L'gpio@54004000(›ŠH _4GPIOZ¯ okayAH'i2c2-0pinsT[hyi2c2-sleep-0pinsTi2c4-0pinsT”•[hyi2c4-sleep-0pinsT”•spi1-0pins1T’[ƒypins2T‘[can@4400e000 !bosch,m_canHDàDAm_canmessage_ramT }int0int1  'hclkcclk ¾  disabledcan@4400f000 !bosch,m_canHDðD(Am_canmessage_ramT }int0int1  'hclkcclk ¾  disabledgpu@59000000 !vivante,gcHY Tm e~ 'buscoreM ÅÍ(okaydsi@5a000000 !st,stm32-dsiHZ £)¤'pclkrefpx_clkM ¨apb disabledportscryp@54001000!st,stm32mp1-crypHT TO `M „ disabledahb!st,mlahbsimple-bus$Ý800m4@10000000!st,stm32mp1-m4H08M ! è  û *okay+,-./0%111,vq0vq1shutdownrTDmemory@c0000000 Dheartbeat X$ Mheartbeataliasesc/soc/ethernet@5800a000m/soc/serial@40010000chosenuserial0:115200n8 #address-cells#size-cellsmodelcompatibleclock-frequencydevice_typeregphandleinterruptsinterrupt-affinityinterrupt-parentmethod#interrupt-cellsinterrupt-controller#clock-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisst,syscfgstatusrangesclocksclock-namesdmasdma-names#pwm-cellsresets#sound-dai-cellspinctrl-namespinctrl-0interrupt-namesst,syscfg-fmpwakeup-sourcepinctrl-1i2c-scl-rising-time-nsi2c-scl-falling-time-nsinterrupts-extendedldo1-supplyldo3-supplyldo6-supplypwr_sw1-supplypwr_sw2-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-initial-moderegulator-over-current-protectionst,mask-resetregulator-boot-onregulator-active-dischargepower-off-time-sec#io-channel-cells#dma-cellsst,mem2memdma-requestsdma-mastersdma-channelsarm,primecell-periphidcap-sd-highspeedcap-mmc-highspeedmax-frequencyreset-namesg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizedr_modeusb33d-supply#mbox-cellsst,proc-id#reset-cells#thermal-sensor-cellsdma-maxburstreg-namespinctrl-2cd-gpiosdisable-wpst,neg-edgebus-widthvmmc-supplynon-removableno-sdno-sdiovqmmc-supplymmc-ddr-3_3vst,sysconsnps,mixed-burstsnps,pblsnps,en-tx-lpi-clockgatingsnps,axi-configsnps,tsophy-modemax-speedphy-handleassigned-clocksassigned-clock-parentsassigned-clock-ratesst,eth-clk-selsnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blenreset-gpiosreset-assert-usreset-deassert-uscompaniontimeout-sec#phy-cellspins-are-numberedst,packagegpio-controller#gpio-cellsst,bank-namengpiosgpio-rangespinmuxbias-disabledrive-open-drainslew-ratedrive-push-pullbias-pull-upbias-pull-downst,bank-ioportbosch,mram-cfgcontiguous-areadma-rangesst,syscfg-holdbootst,syscfg-tzst,syscfg-pddsmemory-regionmboxesmbox-namesno-mapcolorfunctionlinux,default-triggerethernet0serial0stdout-path