Ð þí1ß8.x(g.@ V2P-CA5s%# arm,vexpress,v2p-ca5sarm,vexpress+<Kfixed-regulator-0 regulator-fixedW3V3f2Z ~2Z –ªclk24mhz fixed-clock²¿n6 Ïv2m:clk24mhzª refclk1mhz fixed-clock²¿B@Ïv2m:refclk1mhzªrefclk32khz fixed-clock²¿€Ïv2m:refclk32khzªleds gpio-ledsled-1âv2m:green:user1 è îheartbeatled-2âv2m:green:user2 èîdisk-activityled-3âv2m:green:user3 èîcpu0led-4âv2m:green:user4 èîcpu1led-5âv2m:green:user5 èîcpu2led-6âv2m:green:user6 èîcpu3led-7âv2m:green:user7 èîcpu4led-8âv2m:green:user8 èîcpu5bus@8000000 simple-bus<K`   ?´/            !!""##$$%%&&''(())**motherboard-busV2M-P1=rs1 arm,vexpress,v2m-p1simple-bus<K flash@0 arm,vexpress-flashcfi-flashPTpartitions arm,arm-firmware-suitepsram@100000000 arm,vexpress-psrammtd-ram PTethernet@202000000 smsc,lan9118smsc,lan9115 P_jmiis€•¨¶usb@203000000 nxp,usb-isp1761 P_Æiofpga-bus@300000000 simple-bus<K sysreg@10000 arm,vexpress-sysregP<K ªgpio@8 arm,vexpress-sysreg,sys_ledPÐàªgpio@48 arm,vexpress-sysreg,sys_mciPHÐàªgpio@4c arm,vexpress-sysreg,sys_flashPLÐàsysctl@20000 arm,sp810arm,primecellP ìórefclktimclkapb_pclk²0Ïtimerclken0timerclken1timerclken2timerclken3 ÿªi2c@30000 arm,versatile-i2cP<Kpcie-switch@60 idt,89hpes32h8P`aaci@40000 arm,pl041arm,primecellP_ ì óapb_pclkmmci@50000 arm,pl180arm,primecellP_  & /8·Fì ómclkapb_pclkkmi@60000 arm,pl050arm,primecellP_ ì óKMIREFCLKapb_pclkkmi@70000 arm,pl050arm,primecellP_ ì óKMIREFCLKapb_pclkserial@90000 arm,pl011arm,primecellP _ì óuartclkapb_pclkserial@a0000 arm,pl011arm,primecellP _ì óuartclkapb_pclkserial@b0000 arm,pl011arm,primecellP _ì óuartclkapb_pclkserial@c0000 arm,pl011arm,primecellP _ì óuartclkapb_pclkwdt@f0000 arm,sp805arm,primecellP_ìówdog_clkapb_pclktimer@110000 arm,sp804arm,primecellP_ìótimclken1timclken2apb_pclktimer@120000 arm,sp804arm,primecellP_ìótimclken1timclken2apb_pclki2c@160000 arm,versatile-i2cP<Kdvi-transmitter@39 sil,sii9022-tpisil,sii9022P9ports<Kport@0PendpointR ªdvi-transmitter@60 sil,sii9022-cpisil,sii9022P`rtc@170000 arm,pl031arm,primecellP_ì óapb_pclkcompact-flash@1a0000 arm,vexpress-cfata-genericPbclcd@1f0000 arm,pl111arm,primecellP lcombined_ì óclcdclkapb_pclk|7ù€‘ portendpointR Ÿª mcc arm,vexpress,config-bus¹oscclk0 arm,vexpress-oscÔí}x@“‡² Ïv2m:oscclk0oscclk1 arm,vexpress-oscÔíjepßÒ@² Ïv2m:oscclk1ª oscclk2 arm,vexpress-oscÔín6n6² Ïv2m:oscclk2ª volt-vio arm,vexpress-voltÔWVIO–âVIOtemp-mcc arm,vexpress-tempÔâMCCreset arm,vexpress-resetÔmuxfpga arm,vexpress-muxfpgaÔshutdown arm,vexpress-shutdownÔreboot arm,vexpress-rebootÔ dvimode arm,vexpress-dvimodeÔ chosenaliases?ø/bus@8000000/motherboard-bus/iofpga-bus@300000000/serial@90000?/bus@8000000/motherboard-bus/iofpga-bus@300000000/serial@a0000?/bus@8000000/motherboard-bus/iofpga-bus@300000000/serial@b0000?/bus@8000000/motherboard-bus/iofpga-bus@300000000/serial@c0000=/bus@8000000/motherboard-bus/iofpga-bus@300000000/i2c@160000</bus@8000000/motherboard-bus/iofpga-bus@300000000/i2c@30000cpus<Kcpu@0"cpu arm,cortex-a5P.cpu@1"cpu arm,cortex-a5P.memory@80000000"memoryP€@reserved-memory<Kvram@18000000 shared-dma-poolP€?ª hdlcd@2a110000 arm,hdlcdP* _Uìópxlclkmemory-controller@2a150000 arm,pl341arm,primecellP*ì óapb_pclkmemory-controller@2a190000 arm,pl354arm,primecellP*_VWì óapb_pclkscu@2c000000 arm,cortex-a5-scuP,Xtimer@2c000600 arm,cortex-a5-twd-timerP,  _ timer@2c0002006 arm,cortex-a5-global-timerarm,cortex-a9-global-timerP,  _ ìwatchdog@2c000620 arm,cortex-a5-twd-wdtP,  _interrupt-controller@2c001000$ arm,cortex-a5-gicarm,cortex-a9-gic <FP,,ªcache-controller@2c0f0000 arm,pl310-cacheP, _T[ªpmu arm,cortex-a5-pmu_DEdcc arm,vexpress,config-bus¹oscclk0 arm,vexpress-oscÔíúð€õá²Ïoscclk0ªoscclk1 arm,vexpress-oscÔíLK@úð€²Ïoscclk1ªoscclk2 arm,vexpress-oscÔíÄ´'²Ïoscclk2oscclk3 arm,vexpress-oscÔíjep Õ³@²Ïoscclk3ªoscclk4 arm,vexpress-oscÔíÄ´Ä´²Ïoscclk4oscclk5 arm,vexpress-oscÔí}x@“‡²Ïoscclk5ªtemp-dcc arm,vexpress-tempÔâDCChsb@40000000 simple-bus<K @@ `/$%&' modelarm,hbiarm,vexpress,sitecompatibleinterrupt-parent#address-cells#size-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onphandle#clock-cellsclock-frequencyclock-output-nameslabelgpioslinux,default-triggerranges#interrupt-cellsinterrupt-map-maskinterrupt-maparm,v2m-memory-mapregbank-widthinterruptsphy-modereg-io-widthsmsc,irq-active-highsmsc,irq-push-pullvdd33a-supplyvddvario-supplyport1-otggpio-controller#gpio-cellsclocksclock-namesassigned-clocksassigned-clock-parentscd-gpioswp-gpiosmax-frequencyvmmc-supplyremote-endpointreg-shiftinterrupt-namesmax-memory-bandwidthmemory-regionarm,pl11x,tft-r0g0b0-padsarm,vexpress,config-bridgearm,vexpress-sysreg,funcfreq-rangeserial0serial1serial2serial3i2c0i2c1device_typenext-level-cacheno-mapinterrupt-controllercache-level