Ð þí7[83Ä(—3ŒV2P-CA9‘" arm,vexpress,v2p-ca9arm,vexpress+<Kbus@40000000 simple-bus<KPW@DHL^ o?´‚            !!""##$$%%&&''(())**motherboardV2M-P1 arm,vexpress,v2m-p1simple-bus<K^Wflash@0,00000000 arm,vexpress-flashcfi-flash”partitions arm,arm-firmware-suitepsram@2,00000000 arm,vexpress-psrammtd-ram ”ethernet@3,02000000 smsc,lan9118smsc,lan9115 Ÿªmii³ÀÕèöusb@3,03000000 nxp,usb-isp1761 Ÿiofpga@7,00000000 simple-bus<KWsysreg@0 arm,vexpress-sysreg<K Wgpio@8 arm,vexpress-sysreg,sys_led(gpio@48 arm,vexpress-sysreg,sys_mciH(gpio@4c arm,vexpress-sysreg,sys_flashL(sysctl@1000 arm,sp810arm,primecell 4;refclktimclkapb_pclkG0Ttimerclken0timerclken1timerclken2timerclken3 gwi2c@2000 arm,versatile-i2c <Kpcie-switch@60 idt,89hpes32h8`aaci@4000 arm,pl041arm,primecell@Ÿ 4 ;apb_pclkmmci@5000 arm,pl180arm,primecellPŸ  Ž — ·®4;mclkapb_pclkkmi@6000 arm,pl050arm,primecell`Ÿ 4;KMIREFCLKapb_pclkkmi@7000 arm,pl050arm,primecellpŸ 4;KMIREFCLKapb_pclkuart@9000 arm,pl011arm,primecellŸ4 ;uartclkapb_pclkuart@a000 arm,pl011arm,primecell Ÿ4 ;uartclkapb_pclkuart@b000 arm,pl011arm,primecell°Ÿ4 ;uartclkapb_pclkuart@c000 arm,pl011arm,primecellÀŸ4 ;uartclkapb_pclkwdt@f000 arm,sp805arm,primecellðŸ4;wdog_clkapb_pclktimer@11000 arm,sp804arm,primecellŸ4;timclken1timclken2apb_pclktimer@12000 arm,sp804arm,primecell Ÿ4;timclken1timclken2apb_pclki2c@16000 arm,versatile-i2c`<Kdvi-transmitter@39 sil,sii9022-tpisil,sii90229ports<Kport@0endpointº port@1endpointº dvi-transmitter@60 sil,sii9022-cpisil,sii9022`rtc@17000 arm,pl031arm,primecellpŸ4 ;apb_pclkcompact-flash@1a000 arm,vexpress-cfata-generic ¡Êclcd@1f000 arm,pl111arm,primecellð ÔcombinedŸ4 ;clcdclkapb_pclkä7ù€ù portendpointº  fixed-regulator-0 regulator-fixed!3V302Z H2Z `clk24mhz fixed-clockGtn6 Tv2m:clk24mhzrefclk1mhz fixed-clockGtB@Tv2m:refclk1mhzrefclk32khz fixed-clockGt€Tv2m:refclk32khzleds gpio-ledsuser1„v2m:green:user1 ‘ Šheartbeatuser2„v2m:green:user2 ‘Šmmc0user3„v2m:green:user3 ‘Šcpu0user4„v2m:green:user4 ‘Šcpu1user5„v2m:green:user5 ‘Šcpu2user6„v2m:green:user6 ‘Šcpu3user7„v2m:green:user7 ‘Šcpu4user8„v2m:green:user8 ‘Šcpu5mcc arm,vexpress,config-bus oscclk0 arm,vexpress-osc»Ô}x@“‡G Tv2m:oscclk0oscclk1 arm,vexpress-osc»ÔjepßÒ@G Tv2m:oscclk1 oscclk2 arm,vexpress-osc»Ôn6n6G Tv2m:oscclk2 volt-vio arm,vexpress-volt»!VIO`„VIOtemp-mcc arm,vexpress-temp»„MCCreset arm,vexpress-reset»muxfpga arm,vexpress-muxfpga»shutdown arm,vexpress-shutdown»reboot arm,vexpress-reboot» dvimode arm,vexpress-dvimode» chosenaliases6ß/bus@40000000/motherboard/iofpga@7,00000000/uart@90006ç/bus@40000000/motherboard/iofpga@7,00000000/uart@a0006ï/bus@40000000/motherboard/iofpga@7,00000000/uart@b0006÷/bus@40000000/motherboard/iofpga@7,00000000/uart@c0006ÿ/bus@40000000/motherboard/iofpga@7,00000000/i2c@160005/bus@40000000/motherboard/iofpga@7,00000000/i2c@2000cpus<Kcpu@0 cpu arm,cortex-a9cpu@1 cpu arm,cortex-a9cpu@2 cpu arm,cortex-a9cpu@3 cpu arm,cortex-a9memory@60000000 memory`@reserved-memory<KWvram@4c000000 shared-dma-poolL€& clcd@10020000 arm,pl111arm,primecell Ôcombined Ÿ,4;clcdclkapb_pclkä©•Àportendpointº  memory-controller@100e0000 arm,pl341arm,primecell4 ;apb_pclkmemory-controller@100e1000 arm,pl354arm,primecellŸ-.4 ;apb_pclktimer@100e4000 arm,sp804arm,primecell@Ÿ01 4;timer0clktimer1clkapb_pclk -disabledwatchdog@100e5000 arm,sp805arm,primecellP Ÿ34;wdog_clkapb_pclkscu@1e000000 arm,cortex-a9-scuXtimer@1e000600 arm,cortex-a9-twd-timer  Ÿ watchdog@1e000620 arm,cortex-a9-twd-wdt  Ÿinterrupt-controller@1e001000 arm,cortex-a9-gic^<4cache-controller@1e00a000 arm,pl310-cache  Ÿ+IW c tpmu arm,cortex-a9-pmu0Ÿ<=>?„dcc arm,vexpress,config-bus extsaxiclk arm,vexpress-osc»ÔÉÀúð€G Textsaxiclkclcdclk arm,vexpress-osc»Ô˜–€Ä´GTclcdclktcrefclk arm,vexpress-osc»Ô÷Š@õáG Ttcrefclkvolt-vd10 arm,vexpress-volt»!VD10`„VD10volt-vd10-s2 arm,vexpress-volt»!VD10_S2`„VD10_S2volt-vd10-s3 arm,vexpress-volt»!VD10_S3`„VD10_S3volt-vcc1v8 arm,vexpress-volt»!VCC1V8`„VCC1V8volt-ddr2vtt arm,vexpress-volt»!DDR2VTT`„DDR2VTTvolt-vcc3v3» arm,vexpress-volt!VCC3V3`„VCC3V3amp-vd10-s2 arm,vexpress-amp»„VD10_S2amp-vd10-s3 arm,vexpress-amp»„VD10_S3power-vd10-s2 arm,vexpress-power»  „PVD10_S2power-vd10-s3 arm,vexpress-power»  „PVD10_S3hsb@e0000000 simple-bus<K Wà ^o`‚$%&' modelarm,hbiarm,vexpress,sitecompatibleinterrupt-parent#address-cells#size-cellsranges#interrupt-cellsinterrupt-map-maskinterrupt-mapregbank-widthinterruptsphy-modereg-io-widthsmsc,irq-active-highsmsc,irq-push-pullvdd33a-supplyvddvario-supplyport1-otgphandlegpio-controller#gpio-cellsclocksclock-names#clock-cellsclock-output-namesassigned-clocksassigned-clock-parentscd-gpioswp-gpiosmax-frequencyvmmc-supplyremote-endpointreg-shiftinterrupt-namesmax-memory-bandwidthmemory-regionarm,pl11x,tft-r0g0b0-padsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onclock-frequencylabellinux,default-triggerarm,vexpress,config-bridgearm,vexpress-sysreg,funcfreq-rangeserial0serial1serial2serial3i2c0i2c1device_typenext-level-cacheno-mapstatusinterrupt-controllercache-unifiedcache-levelarm,data-latencyarm,tag-latencyinterrupt-affinity